[linux-2.6-block.git] / arch / sparc / kernel / time.c

/* linux/arch/sparc/kernel/time.c
 *
 * Copyright (C) 1995 David S. Miller (davem@davemloft.net)
 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
 *
 * Chris Davis (cdavis@cois.on.ca) 03/27/1998
 * Added support for the intersil on the sun4/4200
 *
 * Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
 * Support for MicroSPARC-IIep, PCI CPU.
 *
 * This file handles the Sparc specific time handling details.
 *
 * 1997-09-10	Updated NTP code according to technical memorandum Jan '96
 *		"A Kernel Model for Precision Timekeeping" by Dave Mills
 */
#include <linux/errno.h>
#include <linux/module.h>
#include <linux/sched.h>
#include <linux/kernel.h>
#include <linux/param.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/time.h>
#include <linux/timex.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/ioport.h>
#include <linux/profile.h>
#include <linux/of.h>
#include <linux/of_device.h>

#include <asm/oplib.h>
#include <asm/timer.h>
#include <asm/mostek.h>
#include <asm/system.h>
#include <asm/irq.h>
#include <asm/io.h>
#include <asm/idprom.h>
#include <asm/machines.h>
#include <asm/sun4paddr.h>
#include <asm/page.h>
#include <asm/pcic.h>
#include <asm/irq_regs.h>

#include "irq.h"

DEFINE_SPINLOCK(rtc_lock);
static enum sparc_clock_type sp_clock_typ;
DEFINE_SPINLOCK(mostek_lock);
void __iomem *mstk48t02_regs = NULL;
static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
static int set_rtc_mmss(unsigned long);
static int sbus_do_settimeofday(struct timespec *tv);

#ifdef CONFIG_SUN4
struct intersil *intersil_clock;
#define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
	(intsil_cmd)

#define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
	(intsil_cmd)

#define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
	( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
	  INTERSIL_INTR_ENABLE))

#define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
	( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
	  INTERSIL_INTR_ENABLE))

#define intersil_read_intr(intersil_reg, towhere) towhere = \
	intersil_reg->int_intr_reg

#endif

unsigned long profile_pc(struct pt_regs *regs)
{
	extern char __copy_user_begin[], __copy_user_end[];
	extern char __atomic_begin[], __atomic_end[];
	extern char __bzero_begin[], __bzero_end[];

	unsigned long pc = regs->pc;

	if (in_lock_functions(pc) ||
	    (pc >= (unsigned long) __copy_user_begin &&
	     pc < (unsigned long) __copy_user_end) ||
	    (pc >= (unsigned long) __atomic_begin &&
	     pc < (unsigned long) __atomic_end) ||
	    (pc >= (unsigned long) __bzero_begin &&
	     pc < (unsigned long) __bzero_end))
		pc = regs->u_regs[UREG_RETPC];
	return pc;
}

EXPORT_SYMBOL(profile_pc);

__volatile__ unsigned int *master_l10_counter;
__volatile__ unsigned int *master_l10_limit;

/*
 * timer_interrupt() needs to keep up the real-time clock,
 * as well as call the "do_timer()" routine every clocktick
 */

#define TICK_SIZE (tick_nsec / 1000)

static irqreturn_t timer_interrupt(int dummy, void *dev_id)
{
	/* last time the cmos clock got updated */
	static long last_rtc_update;

#ifndef CONFIG_SMP
	profile_tick(CPU_PROFILING);
#endif

	/* Protect counter clear so that do_gettimeoffset works */
	write_seqlock(&xtime_lock);
#ifdef CONFIG_SUN4
	if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
	   (idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
		int temp;
        	intersil_read_intr(intersil_clock, temp);
		/* re-enable the irq */
		enable_pil_irq(10);
	}
#endif
	clear_clock_irq();

	do_timer(1);

	/* Determine when to update the Mostek clock. */
	if (ntp_synced() &&
	    xtime.tv_sec > last_rtc_update + 660 &&
	    (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
	    (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
	  if (set_rtc_mmss(xtime.tv_sec) == 0)
	    last_rtc_update = xtime.tv_sec;
	  else
	    last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
	}
	write_sequnlock(&xtime_lock);

#ifndef CONFIG_SMP
	update_process_times(user_mode(get_irq_regs()));
#endif
	return IRQ_HANDLED;
}

/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
static void __devinit kick_start_clock(void)
{
	struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
	unsigned char sec;
	int i, count;

	prom_printf("CLOCK: Clock was stopped. Kick start ");

	spin_lock_irq(&mostek_lock);

	/* Turn on the kick start bit to start the oscillator. */
	regs->creg |= MSTK_CREG_WRITE;
	regs->sec &= ~MSTK_STOP;
	regs->hour |= MSTK_KICK_START;
	regs->creg &= ~MSTK_CREG_WRITE;

	spin_unlock_irq(&mostek_lock);

	/* Delay to allow the clock oscillator to start. */
	sec = MSTK_REG_SEC(regs);
	for (i = 0; i < 3; i++) {
		while (sec == MSTK_REG_SEC(regs))
			for (count = 0; count < 100000; count++)
				/* nothing */ ;
		prom_printf(".");
		sec = regs->sec;
	}
	prom_printf("\n");

	spin_lock_irq(&mostek_lock);

	/* Turn off kick start and set a "valid" time and date. */
	regs->creg |= MSTK_CREG_WRITE;
	regs->hour &= ~MSTK_KICK_START;
	MSTK_SET_REG_SEC(regs,0);
	MSTK_SET_REG_MIN(regs,0);
	MSTK_SET_REG_HOUR(regs,0);
	MSTK_SET_REG_DOW(regs,5);
	MSTK_SET_REG_DOM(regs,1);
	MSTK_SET_REG_MONTH(regs,8);
	MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
	regs->creg &= ~MSTK_CREG_WRITE;

	spin_unlock_irq(&mostek_lock);

	/* Ensure the kick start bit is off. If it isn't, turn it off. */
	while (regs->hour & MSTK_KICK_START) {
		prom_printf("CLOCK: Kick start still on!\n");

		spin_lock_irq(&mostek_lock);
		regs->creg |= MSTK_CREG_WRITE;
		regs->hour &= ~MSTK_KICK_START;
		regs->creg &= ~MSTK_CREG_WRITE;
		spin_unlock_irq(&mostek_lock);
	}

	prom_printf("CLOCK: Kick start procedure successful.\n");
}

/* Return nonzero if the clock chip battery is low. */
static inline int has_low_battery(void)
{
	struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
	unsigned char data1, data2;

	spin_lock_irq(&mostek_lock);
	data1 = regs->eeprom[0];	/* Read some data. */
	regs->eeprom[0] = ~data1;	/* Write back the complement. */
	data2 = regs->eeprom[0];	/* Read back the complement. */
	regs->eeprom[0] = data1;	/* Restore the original value. */
	spin_unlock_irq(&mostek_lock);

	return (data1 == data2);	/* Was the write blocked? */
}

static void __devinit mostek_set_system_time(void)
{
	unsigned int year, mon, day, hour, min, sec;
	struct mostek48t02 *mregs;

	mregs = (struct mostek48t02 *)mstk48t02_regs;
	if(!mregs) {
		prom_printf("Something wrong, clock regs not mapped yet.\n");
		prom_halt();
	}		
	spin_lock_irq(&mostek_lock);
	mregs->creg |= MSTK_CREG_READ;
	sec = MSTK_REG_SEC(mregs);
	min = MSTK_REG_MIN(mregs);
	hour = MSTK_REG_HOUR(mregs);
	day = MSTK_REG_DOM(mregs);
	mon = MSTK_REG_MONTH(mregs);
	year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
	xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
	xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
        set_normalized_timespec(&wall_to_monotonic,
                                -xtime.tv_sec, -xtime.tv_nsec);
	mregs->creg &= ~MSTK_CREG_READ;
	spin_unlock_irq(&mostek_lock);
}

/* Probe for the real time clock chip on Sun4 */
static inline void sun4_clock_probe(void)
{
#ifdef CONFIG_SUN4
	int temp;
	struct resource r;

	memset(&r, 0, sizeof(r));
	if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
		sp_clock_typ = MSTK48T02;
		r.start = sun4_clock_physaddr;
		mstk48t02_regs = of_ioremap(&r, 0,
				       sizeof(struct mostek48t02), NULL);
		mstk48t08_regs = NULL;  /* To catch weirdness */
		intersil_clock = NULL;  /* just in case */

		/* Kick start the clock if it is completely stopped. */
		if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
			kick_start_clock();
	} else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
		/* intersil setup code */
		printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
		sp_clock_typ = INTERSIL;
		r.start = sun4_clock_physaddr;
		intersil_clock = (struct intersil *) 
		    of_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
		mstk48t02_regs = 0;  /* just be sure */
		mstk48t08_regs = NULL;  /* ditto */
		/* initialise the clock */

		intersil_intr(intersil_clock,INTERSIL_INT_100HZ);

		intersil_start(intersil_clock);

		intersil_read_intr(intersil_clock, temp);
                while (!(temp & 0x80))
                        intersil_read_intr(intersil_clock, temp);

                intersil_read_intr(intersil_clock, temp);
                while (!(temp & 0x80))
                        intersil_read_intr(intersil_clock, temp);

		intersil_stop(intersil_clock);

	}
#endif
}

#ifndef CONFIG_SUN4
static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
{
	struct device_node *dp = op->node;
	const char *model = of_get_property(dp, "model", NULL);

	if (!model)
		return -ENODEV;

	if (!strcmp(model, "mk48t02")) {
		sp_clock_typ = MSTK48T02;

		/* Map the clock register io area read-only */
		mstk48t02_regs = of_ioremap(&op->resource[0], 0,
					    sizeof(struct mostek48t02),
					    "mk48t02");
		mstk48t08_regs = NULL;  /* To catch weirdness */
	} else if (!strcmp(model, "mk48t08")) {
		sp_clock_typ = MSTK48T08;
		mstk48t08_regs = of_ioremap(&op->resource[0], 0,
					    sizeof(struct mostek48t08),
					    "mk48t08");

		mstk48t02_regs = &mstk48t08_regs->regs;
	} else
		return -ENODEV;

	/* Report a low battery voltage condition. */
	if (has_low_battery())
		printk(KERN_CRIT "NVRAM: Low battery voltage!\n");

	/* Kick start the clock if it is completely stopped. */
	if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
		kick_start_clock();

	mostek_set_system_time();

	return 0;
}

static struct of_device_id __initdata clock_match[] = {
	{
		.name = "eeprom",
	},
	{},
};

static struct of_platform_driver clock_driver = {
	.match_table	= clock_match,
	.probe		= clock_probe,
	.driver		= {
		.name	= "clock",
	},
};


/* Probe for the mostek real time clock chip. */
static int __init clock_init(void)
{
	return of_register_driver(&clock_driver, &of_platform_bus_type);
}

/* Must be after subsys_initcall() so that busses are probed.  Must
 * be before device_initcall() because things like the RTC driver
 * need to see the clock registers.
 */
fs_initcall(clock_init);
#endif /* !CONFIG_SUN4 */

static void __init sbus_time_init(void)
{

	BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
	btfixup();

	if (ARCH_SUN4)
		sun4_clock_probe();

	sparc_init_timers(timer_interrupt);
	
#ifdef CONFIG_SUN4
	if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
		mostek_set_system_time();
	} else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
		/* initialise the intersil on sun4 */
		unsigned int year, mon, day, hour, min, sec;
		int temp;
		struct intersil *iregs;

		iregs=intersil_clock;
		if(!iregs) {
			prom_printf("Something wrong, clock regs not mapped yet.\n");
			prom_halt();
		}

		intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
		disable_pil_irq(10);
		intersil_stop(iregs);
		intersil_read_intr(intersil_clock, temp);

		temp = iregs->clk.int_csec;

		sec = iregs->clk.int_sec;
		min = iregs->clk.int_min;
		hour = iregs->clk.int_hour;
		day = iregs->clk.int_day;
		mon = iregs->clk.int_month;
		year = MSTK_CVT_YEAR(iregs->clk.int_year);

		enable_pil_irq(10);
		intersil_start(iregs);

		xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
		xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
	        set_normalized_timespec(&wall_to_monotonic,
 	                               -xtime.tv_sec, -xtime.tv_nsec);
		printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
	}
#endif

	/* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
	local_irq_enable();
}

void __init time_init(void)
{
#ifdef CONFIG_PCI
	extern void pci_time_init(void);
	if (pcic_present()) {
		pci_time_init();
		return;
	}
#endif
	sbus_time_init();
}

static inline unsigned long do_gettimeoffset(void)
{
	unsigned long val = *master_l10_counter;
	unsigned long usec = (val >> 10) & 0x1fffff;

	/* Limit hit?  */
	if (val & 0x80000000)
		usec += 1000000 / HZ;

	return usec;
}

/* Ok, my cute asm atomicity trick doesn't work anymore.
 * There are just too many variables that need to be protected
 * now (both members of xtime, et al.)
 */
void do_gettimeofday(struct timeval *tv)
{
	unsigned long flags;
	unsigned long seq;
	unsigned long usec, sec;
	unsigned long max_ntp_tick = tick_usec - tickadj;

	do {
		seq = read_seqbegin_irqsave(&xtime_lock, flags);
		usec = do_gettimeoffset();

		/*
		 * If time_adjust is negative then NTP is slowing the clock
		 * so make sure not to go into next possible interval.
		 * Better to lose some accuracy than have time go backwards..
		 */
		if (unlikely(time_adjust < 0))
			usec = min(usec, max_ntp_tick);

		sec = xtime.tv_sec;
		usec += (xtime.tv_nsec / 1000);
	} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));

	while (usec >= 1000000) {
		usec -= 1000000;
		sec++;
	}

	tv->tv_sec = sec;
	tv->tv_usec = usec;
}

EXPORT_SYMBOL(do_gettimeofday);

int do_settimeofday(struct timespec *tv)
{
	int ret;

	write_seqlock_irq(&xtime_lock);
	ret = bus_do_settimeofday(tv);
	write_sequnlock_irq(&xtime_lock);
	clock_was_set();
	return ret;
}

EXPORT_SYMBOL(do_settimeofday);

static int sbus_do_settimeofday(struct timespec *tv)
{
	time_t wtm_sec, sec = tv->tv_sec;
	long wtm_nsec, nsec = tv->tv_nsec;

	if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
		return -EINVAL;

	/*
	 * This is revolting. We need to set "xtime" correctly. However, the
	 * value in this location is the value at the most recent update of
	 * wall time.  Discover what correction gettimeofday() would have
	 * made, and then undo it!
	 */
	nsec -= 1000 * do_gettimeoffset();

	wtm_sec  = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
	wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);

	set_normalized_timespec(&xtime, sec, nsec);
	set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);

	ntp_clear();
	return 0;
}

/*
 * BUG: This routine does not handle hour overflow properly; it just
 *      sets the minutes. Usually you won't notice until after reboot!
 */
static int set_rtc_mmss(unsigned long nowtime)
{
	int real_seconds, real_minutes, mostek_minutes;
	struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
	unsigned long flags;
#ifdef CONFIG_SUN4
	struct intersil *iregs = intersil_clock;
	int temp;
#endif

	/* Not having a register set can lead to trouble. */
	if (!regs) {
#ifdef CONFIG_SUN4
		if(!iregs)
		return -1;
	 	else {
			temp = iregs->clk.int_csec;

			mostek_minutes = iregs->clk.int_min;

			real_seconds = nowtime % 60;
			real_minutes = nowtime / 60;
			if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
				real_minutes += 30;	/* correct for half hour time zone */
			real_minutes %= 60;

			if (abs(real_minutes - mostek_minutes) < 30) {
				intersil_stop(iregs);
				iregs->clk.int_sec=real_seconds;
				iregs->clk.int_min=real_minutes;
				intersil_start(iregs);
			} else {
				printk(KERN_WARNING
			       "set_rtc_mmss: can't update from %d to %d\n",
				       mostek_minutes, real_minutes);
				return -1;
			}
			
			return 0;
		}
#endif
	}

	spin_lock_irqsave(&mostek_lock, flags);
	/* Read the current RTC minutes. */
	regs->creg |= MSTK_CREG_READ;
	mostek_minutes = MSTK_REG_MIN(regs);
	regs->creg &= ~MSTK_CREG_READ;

	/*
	 * since we're only adjusting minutes and seconds,
	 * don't interfere with hour overflow. This avoids
	 * messing with unknown time zones but requires your
	 * RTC not to be off by more than 15 minutes
	 */
	real_seconds = nowtime % 60;
	real_minutes = nowtime / 60;
	if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
		real_minutes += 30;	/* correct for half hour time zone */
	real_minutes %= 60;

	if (abs(real_minutes - mostek_minutes) < 30) {
		regs->creg |= MSTK_CREG_WRITE;
		MSTK_SET_REG_SEC(regs,real_seconds);
		MSTK_SET_REG_MIN(regs,real_minutes);
		regs->creg &= ~MSTK_CREG_WRITE;
		spin_unlock_irqrestore(&mostek_lock, flags);
		return 0;
	} else {
		spin_unlock_irqrestore(&mostek_lock, flags);
		return -1;
	}
}
Commit	Line	Data
64d329ee	1	/* linux/arch/sparc/kernel/time.c
1da177e4	2	*
64d329ee	3	* Copyright (C) 1995 David S. Miller (davem@davemloft.net)
1da177e4 LT	4	* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
	5	*
	6	* Chris Davis (cdavis@cois.on.ca) 03/27/1998
	7	* Added support for the intersil on the sun4/4200
	8	*
	9	* Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
	10	* Support for MicroSPARC-IIep, PCI CPU.
	11	*
	12	* This file handles the Sparc specific time handling details.
	13	*
	14	* 1997-09-10 Updated NTP code according to technical memorandum Jan '96
	15	* "A Kernel Model for Precision Timekeeping" by Dave Mills
	16	*/
1da177e4 LT	17	#include <linux/errno.h>
	18	#include <linux/module.h>
	19	#include <linux/sched.h>
	20	#include <linux/kernel.h>
	21	#include <linux/param.h>
	22	#include <linux/string.h>
	23	#include <linux/mm.h>
	24	#include <linux/interrupt.h>
	25	#include <linux/time.h>
	26	#include <linux/timex.h>
	27	#include <linux/init.h>
	28	#include <linux/pci.h>
	29	#include <linux/ioport.h>
	30	#include <linux/profile.h>
454eeb2d	31	#include <linux/of.h>
764f2579	32	#include <linux/of_device.h>
1da177e4 LT	33
1da177e4 LT	34	#include <asm/oplib.h>
1da177e4 LT	35	#include <asm/timer.h>
	36	#include <asm/mostek.h>
	37	#include <asm/system.h>
	38	#include <asm/irq.h>
	39	#include <asm/io.h>
	40	#include <asm/idprom.h>
	41	#include <asm/machines.h>
	42	#include <asm/sun4paddr.h>
	43	#include <asm/page.h>
	44	#include <asm/pcic.h>
0d84438d	45	#include <asm/irq_regs.h>
1da177e4	46
32231a66 AV	47	#include "irq.h"
32231a66 AV	48
1da177e4	49	DEFINE_SPINLOCK(rtc_lock);
c61c65cd	50	static enum sparc_clock_type sp_clock_typ;
1da177e4 LT	51	DEFINE_SPINLOCK(mostek_lock);
1da177e4 LT	52	void __iomem *mstk48t02_regs = NULL;
c316ef04	53	static struct mostek48t08 __iomem *mstk48t08_regs = NULL;
1da177e4 LT	54	static int set_rtc_mmss(unsigned long);
	55	static int sbus_do_settimeofday(struct timespec *tv);
	56
	57	#ifdef CONFIG_SUN4
	58	struct intersil *intersil_clock;
	59	#define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
	60	(intsil_cmd)
	61
	62	#define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
	63	(intsil_cmd)
	64
	65	#define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
	66	( INTERSIL_START \| INTERSIL_32K \| INTERSIL_NORMAL \| INTERSIL_24H \|\
	67	INTERSIL_INTR_ENABLE))
	68
	69	#define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
	70	( INTERSIL_STOP \| INTERSIL_32K \| INTERSIL_NORMAL \| INTERSIL_24H \|\
	71	INTERSIL_INTR_ENABLE))
	72
	73	#define intersil_read_intr(intersil_reg, towhere) towhere = \
	74	intersil_reg->int_intr_reg
	75
	76	#endif
	77
	78	unsigned long profile_pc(struct pt_regs *regs)
	79	{
	80	extern char __copy_user_begin[], __copy_user_end[];
	81	extern char __atomic_begin[], __atomic_end[];
	82	extern char __bzero_begin[], __bzero_end[];
1da177e4 LT	83
	84	unsigned long pc = regs->pc;
	85
	86	if (in_lock_functions(pc) \|\|
	87	(pc >= (unsigned long) __copy_user_begin &&
	88	pc < (unsigned long) __copy_user_end) \|\|
	89	(pc >= (unsigned long) __atomic_begin &&
	90	pc < (unsigned long) __atomic_end) \|\|
	91	(pc >= (unsigned long) __bzero_begin &&
8a8b836b	92	pc < (unsigned long) __bzero_end))
1da177e4 LT	93	pc = regs->u_regs[UREG_RETPC];
	94	return pc;
	95	}
	96
9550e59c MH	97	EXPORT_SYMBOL(profile_pc);
9550e59c MH	98
1da177e4 LT	99	__volatile__ unsigned int *master_l10_counter;
	100	__volatile__ unsigned int *master_l10_limit;
	101
	102	/*
	103	* timer_interrupt() needs to keep up the real-time clock,
	104	* as well as call the "do_timer()" routine every clocktick
	105	*/
	106
	107	#define TICK_SIZE (tick_nsec / 1000)
	108
5dc0742b	109	static irqreturn_t timer_interrupt(int dummy, void *dev_id)
1da177e4 LT	110	{
	111	/* last time the cmos clock got updated */
	112	static long last_rtc_update;
	113
	114	#ifndef CONFIG_SMP
0d84438d	115	profile_tick(CPU_PROFILING);
1da177e4 LT	116	#endif
	117
	118	/* Protect counter clear so that do_gettimeoffset works */
	119	write_seqlock(&xtime_lock);
	120	#ifdef CONFIG_SUN4
	121	if((idprom->id_machtype == (SM_SUN4 \| SM_4_260)) \|\|
	122	(idprom->id_machtype == (SM_SUN4 \| SM_4_110))) {
	123	int temp;
	124	intersil_read_intr(intersil_clock, temp);
	125	/* re-enable the irq */
	126	enable_pil_irq(10);
	127	}
	128	#endif
	129	clear_clock_irq();
	130
3171a030	131	do_timer(1);
1da177e4 LT	132
1da177e4 LT	133	/* Determine when to update the Mostek clock. */
b149ee22	134	if (ntp_synced() &&
1da177e4 LT	135	xtime.tv_sec > last_rtc_update + 660 &&
	136	(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
	137	(xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
	138	if (set_rtc_mmss(xtime.tv_sec) == 0)
	139	last_rtc_update = xtime.tv_sec;
	140	else
	141	last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
	142	}
	143	write_sequnlock(&xtime_lock);
	144
aa02cd2d PZ	145	#ifndef CONFIG_SMP
	146	update_process_times(user_mode(get_irq_regs()));
	147	#endif
1da177e4 LT	148	return IRQ_HANDLED;
	149	}
	150
	151	/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
42e28264	152	static void __devinit kick_start_clock(void)
1da177e4 LT	153	{
	154	struct mostek48t02 regs = (struct mostek48t02 )mstk48t02_regs;
	155	unsigned char sec;
	156	int i, count;
	157
	158	prom_printf("CLOCK: Clock was stopped. Kick start ");
	159
	160	spin_lock_irq(&mostek_lock);
	161
	162	/* Turn on the kick start bit to start the oscillator. */
	163	regs->creg \|= MSTK_CREG_WRITE;
	164	regs->sec &= ~MSTK_STOP;
	165	regs->hour \|= MSTK_KICK_START;
	166	regs->creg &= ~MSTK_CREG_WRITE;
	167
	168	spin_unlock_irq(&mostek_lock);
	169
	170	/* Delay to allow the clock oscillator to start. */
	171	sec = MSTK_REG_SEC(regs);
	172	for (i = 0; i < 3; i++) {
	173	while (sec == MSTK_REG_SEC(regs))
	174	for (count = 0; count < 100000; count++)
	175	/* nothing */ ;
	176	prom_printf(".");
	177	sec = regs->sec;
	178	}
	179	prom_printf("\n");
	180
	181	spin_lock_irq(&mostek_lock);
	182
	183	/* Turn off kick start and set a "valid" time and date. */
	184	regs->creg \|= MSTK_CREG_WRITE;
	185	regs->hour &= ~MSTK_KICK_START;
	186	MSTK_SET_REG_SEC(regs,0);
	187	MSTK_SET_REG_MIN(regs,0);
	188	MSTK_SET_REG_HOUR(regs,0);
	189	MSTK_SET_REG_DOW(regs,5);
	190	MSTK_SET_REG_DOM(regs,1);
	191	MSTK_SET_REG_MONTH(regs,8);
	192	MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
	193	regs->creg &= ~MSTK_CREG_WRITE;
	194
	195	spin_unlock_irq(&mostek_lock);
	196
	197	/* Ensure the kick start bit is off. If it isn't, turn it off. */
	198	while (regs->hour & MSTK_KICK_START) {
	199	prom_printf("CLOCK: Kick start still on!\n");
	200
	201	spin_lock_irq(&mostek_lock);
	202	regs->creg \|= MSTK_CREG_WRITE;
	203	regs->hour &= ~MSTK_KICK_START;
	204	regs->creg &= ~MSTK_CREG_WRITE;
	205	spin_unlock_irq(&mostek_lock);
	206	}
	207
	208	prom_printf("CLOCK: Kick start procedure successful.\n");
	209	}
	210
	211	/* Return nonzero if the clock chip battery is low. */
64d329ee	212	static inline int has_low_battery(void)
1da177e4 LT	213	{
	214	struct mostek48t02 regs = (struct mostek48t02 )mstk48t02_regs;
	215	unsigned char data1, data2;
	216
	217	spin_lock_irq(&mostek_lock);
	218	data1 = regs->eeprom[0]; /* Read some data. */
	219	regs->eeprom[0] = ~data1; /* Write back the complement. */
	220	data2 = regs->eeprom[0]; /* Read back the complement. */
	221	regs->eeprom[0] = data1; /* Restore the original value. */
	222	spin_unlock_irq(&mostek_lock);
	223
	224	return (data1 == data2); /* Was the write blocked? */
	225	}
	226
42e28264	227	static void __devinit mostek_set_system_time(void)
96ba989d BB	228	{
	229	unsigned int year, mon, day, hour, min, sec;
	230	struct mostek48t02 *mregs;
	231
	232	mregs = (struct mostek48t02 *)mstk48t02_regs;
	233	if(!mregs) {
	234	prom_printf("Something wrong, clock regs not mapped yet.\n");
	235	prom_halt();
	236	}
	237	spin_lock_irq(&mostek_lock);
	238	mregs->creg \|= MSTK_CREG_READ;
	239	sec = MSTK_REG_SEC(mregs);
	240	min = MSTK_REG_MIN(mregs);
	241	hour = MSTK_REG_HOUR(mregs);
	242	day = MSTK_REG_DOM(mregs);
	243	mon = MSTK_REG_MONTH(mregs);
	244	year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
	245	xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
	246	xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
	247	set_normalized_timespec(&wall_to_monotonic,
	248	-xtime.tv_sec, -xtime.tv_nsec);
	249	mregs->creg &= ~MSTK_CREG_READ;
	250	spin_unlock_irq(&mostek_lock);
	251	}
	252
1da177e4	253	/* Probe for the real time clock chip on Sun4 */
64d329ee	254	static inline void sun4_clock_probe(void)
1da177e4 LT	255	{
	256	#ifdef CONFIG_SUN4
	257	int temp;
	258	struct resource r;
	259
	260	memset(&r, 0, sizeof(r));
	261	if( idprom->id_machtype == (SM_SUN4 \| SM_4_330) ) {
	262	sp_clock_typ = MSTK48T02;
	263	r.start = sun4_clock_physaddr;
454eeb2d	264	mstk48t02_regs = of_ioremap(&r, 0,
1da177e4 LT	265	sizeof(struct mostek48t02), NULL);
	266	mstk48t08_regs = NULL; /* To catch weirdness */
	267	intersil_clock = NULL; /* just in case */
	268
	269	/* Kick start the clock if it is completely stopped. */
	270	if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
	271	kick_start_clock();
	272	} else if( idprom->id_machtype == (SM_SUN4 \| SM_4_260)) {
	273	/* intersil setup code */
	274	printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
	275	sp_clock_typ = INTERSIL;
	276	r.start = sun4_clock_physaddr;
	277	intersil_clock = (struct intersil *)
454eeb2d	278	of_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
1da177e4 LT	279	mstk48t02_regs = 0; /* just be sure */
	280	mstk48t08_regs = NULL; /* ditto */
	281	/* initialise the clock */
	282
	283	intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
	284
	285	intersil_start(intersil_clock);
	286
	287	intersil_read_intr(intersil_clock, temp);
	288	while (!(temp & 0x80))
	289	intersil_read_intr(intersil_clock, temp);
	290
	291	intersil_read_intr(intersil_clock, temp);
	292	while (!(temp & 0x80))
	293	intersil_read_intr(intersil_clock, temp);
	294
	295	intersil_stop(intersil_clock);
	296
	297	}
	298	#endif
	299	}
	300
96ba989d	301	#ifndef CONFIG_SUN4
ee5caf0e	302	static int __devinit clock_probe(struct of_device op, const struct of_device_id match)
1da177e4	303	{
ee5caf0e	304	struct device_node *dp = op->node;
8271f042	305	const char *model = of_get_property(dp, "model", NULL);
1da177e4	306
ee5caf0e DM	307	if (!model)
ee5caf0e DM	308	return -ENODEV;
1da177e4	309
ee5caf0e	310	if (!strcmp(model, "mk48t02")) {
1da177e4	311	sp_clock_typ = MSTK48T02;
ee5caf0e	312
1da177e4	313	/* Map the clock register io area read-only */
ee5caf0e DM	314	mstk48t02_regs = of_ioremap(&op->resource[0], 0,
	315	sizeof(struct mostek48t02),
	316	"mk48t02");
1da177e4	317	mstk48t08_regs = NULL; /* To catch weirdness */
ee5caf0e	318	} else if (!strcmp(model, "mk48t08")) {
1da177e4	319	sp_clock_typ = MSTK48T08;
ee5caf0e DM	320	mstk48t08_regs = of_ioremap(&op->resource[0], 0,
	321	sizeof(struct mostek48t08),
	322	"mk48t08");
1da177e4 LT	323
1da177e4 LT	324	mstk48t02_regs = &mstk48t08_regs->regs;
ee5caf0e DM	325	} else
ee5caf0e DM	326	return -ENODEV;
1da177e4 LT	327
	328	/* Report a low battery voltage condition. */
	329	if (has_low_battery())
	330	printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
	331
	332	/* Kick start the clock if it is completely stopped. */
	333	if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
	334	kick_start_clock();
ee5caf0e	335
96ba989d BB	336	mostek_set_system_time();
96ba989d BB	337
ee5caf0e DM	338	return 0;
	339	}
	340
fd098316	341	static struct of_device_id __initdata clock_match[] = {
ee5caf0e DM	342	{
	343	.name = "eeprom",
	344	},
	345	{},
	346	};
	347
	348	static struct of_platform_driver clock_driver = {
ee5caf0e DM	349	.match_table = clock_match,
ee5caf0e DM	350	.probe = clock_probe,
a2cd1558 SR	351	.driver = {
	352	.name = "clock",
	353	},
ee5caf0e DM	354	};
	355
	356
	357	/* Probe for the mostek real time clock chip. */
96ba989d	358	static int __init clock_init(void)
ee5caf0e	359	{
37b7754a	360	return of_register_driver(&clock_driver, &of_platform_bus_type);
1da177e4 LT	361	}
1da177e4 LT	362
96ba989d BB	363	/* Must be after subsys_initcall() so that busses are probed. Must
	364	* be before device_initcall() because things like the RTC driver
	365	* need to see the clock registers.
	366	*/
	367	fs_initcall(clock_init);
	368	#endif /* !CONFIG_SUN4 */
	369
c61c65cd	370	static void __init sbus_time_init(void)
1da177e4	371	{
1da177e4 LT	372
	373	BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
	374	btfixup();
	375
	376	if (ARCH_SUN4)
	377	sun4_clock_probe();
1da177e4 LT	378
	379	sparc_init_timers(timer_interrupt);
	380
	381	#ifdef CONFIG_SUN4
	382	if(idprom->id_machtype == (SM_SUN4 \| SM_4_330)) {
96ba989d	383	mostek_set_system_time();
1da177e4 LT	384	} else if(idprom->id_machtype == (SM_SUN4 \| SM_4_260) ) {
1da177e4 LT	385	/* initialise the intersil on sun4 */
96ba989d BB	386	unsigned int year, mon, day, hour, min, sec;
	387	int temp;
	388	struct intersil *iregs;
1da177e4 LT	389
	390	iregs=intersil_clock;
	391	if(!iregs) {
	392	prom_printf("Something wrong, clock regs not mapped yet.\n");
	393	prom_halt();
	394	}
	395
	396	intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
	397	disable_pil_irq(10);
	398	intersil_stop(iregs);
	399	intersil_read_intr(intersil_clock, temp);
	400
	401	temp = iregs->clk.int_csec;
	402
	403	sec = iregs->clk.int_sec;
	404	min = iregs->clk.int_min;
	405	hour = iregs->clk.int_hour;
	406	day = iregs->clk.int_day;
	407	mon = iregs->clk.int_month;
	408	year = MSTK_CVT_YEAR(iregs->clk.int_year);
	409
	410	enable_pil_irq(10);
	411	intersil_start(iregs);
	412
	413	xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
	414	xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
	415	set_normalized_timespec(&wall_to_monotonic,
	416	-xtime.tv_sec, -xtime.tv_nsec);
	417	printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
	418	}
	419	#endif
	420
	421	/* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
	422	local_irq_enable();
	423	}
	424
	425	void __init time_init(void)
	426	{
	427	#ifdef CONFIG_PCI
	428	extern void pci_time_init(void);
	429	if (pcic_present()) {
	430	pci_time_init();
	431	return;
	432	}
	433	#endif
	434	sbus_time_init();
	435	}
	436
3115624e	437	static inline unsigned long do_gettimeoffset(void)
1da177e4	438	{
000775c5 DM	439	unsigned long val = *master_l10_counter;
	440	unsigned long usec = (val >> 10) & 0x1fffff;
	441
	442	/* Limit hit? */
	443	if (val & 0x80000000)
	444	usec += 1000000 / HZ;
	445
	446	return usec;
1da177e4 LT	447	}
1da177e4 LT	448
1da177e4 LT	449	/* Ok, my cute asm atomicity trick doesn't work anymore.
1da177e4 LT	450	* There are just too many variables that need to be protected
8ef38609	451	* now (both members of xtime, et al.)
1da177e4 LT	452	*/
	453	void do_gettimeofday(struct timeval *tv)
	454	{
	455	unsigned long flags;
	456	unsigned long seq;
	457	unsigned long usec, sec;
	458	unsigned long max_ntp_tick = tick_usec - tickadj;
	459
	460	do {
1da177e4 LT	461	seq = read_seqbegin_irqsave(&xtime_lock, flags);
1da177e4 LT	462	usec = do_gettimeoffset();
1da177e4 LT	463
	464	/*
	465	* If time_adjust is negative then NTP is slowing the clock
	466	* so make sure not to go into next possible interval.
	467	* Better to lose some accuracy than have time go backwards..
	468	*/
8ef38609	469	if (unlikely(time_adjust < 0))
1da177e4 LT	470	usec = min(usec, max_ntp_tick);
1da177e4 LT	471
1da177e4 LT	472	sec = xtime.tv_sec;
	473	usec += (xtime.tv_nsec / 1000);
	474	} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
	475
	476	while (usec >= 1000000) {
	477	usec -= 1000000;
	478	sec++;
	479	}
	480
	481	tv->tv_sec = sec;
	482	tv->tv_usec = usec;
	483	}
	484
	485	EXPORT_SYMBOL(do_gettimeofday);
	486
	487	int do_settimeofday(struct timespec *tv)
	488	{
	489	int ret;
	490
	491	write_seqlock_irq(&xtime_lock);
	492	ret = bus_do_settimeofday(tv);
	493	write_sequnlock_irq(&xtime_lock);
	494	clock_was_set();
	495	return ret;
	496	}
	497
	498	EXPORT_SYMBOL(do_settimeofday);
	499
	500	static int sbus_do_settimeofday(struct timespec *tv)
	501	{
	502	time_t wtm_sec, sec = tv->tv_sec;
	503	long wtm_nsec, nsec = tv->tv_nsec;
	504
	505	if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
	506	return -EINVAL;
	507
	508	/*
	509	* This is revolting. We need to set "xtime" correctly. However, the
	510	* value in this location is the value at the most recent update of
	511	* wall time. Discover what correction gettimeofday() would have
	512	* made, and then undo it!
	513	*/
8ef38609	514	nsec -= 1000 * do_gettimeoffset();
1da177e4 LT	515
	516	wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
	517	wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
	518
	519	set_normalized_timespec(&xtime, sec, nsec);
	520	set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
	521
b149ee22	522	ntp_clear();
1da177e4 LT	523	return 0;
	524	}
	525
	526	/*
	527	* BUG: This routine does not handle hour overflow properly; it just
	528	* sets the minutes. Usually you won't notice until after reboot!
	529	*/
	530	static int set_rtc_mmss(unsigned long nowtime)
	531	{
	532	int real_seconds, real_minutes, mostek_minutes;
	533	struct mostek48t02 regs = (struct mostek48t02 )mstk48t02_regs;
	534	unsigned long flags;
	535	#ifdef CONFIG_SUN4
	536	struct intersil *iregs = intersil_clock;
	537	int temp;
	538	#endif
	539
	540	/* Not having a register set can lead to trouble. */
	541	if (!regs) {
	542	#ifdef CONFIG_SUN4
	543	if(!iregs)
	544	return -1;
	545	else {
	546	temp = iregs->clk.int_csec;
	547
	548	mostek_minutes = iregs->clk.int_min;
	549
	550	real_seconds = nowtime % 60;
	551	real_minutes = nowtime / 60;
	552	if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
	553	real_minutes += 30; /* correct for half hour time zone */
	554	real_minutes %= 60;
	555
	556	if (abs(real_minutes - mostek_minutes) < 30) {
	557	intersil_stop(iregs);
	558	iregs->clk.int_sec=real_seconds;
	559	iregs->clk.int_min=real_minutes;
	560	intersil_start(iregs);
	561	} else {
	562	printk(KERN_WARNING
	563	"set_rtc_mmss: can't update from %d to %d\n",
	564	mostek_minutes, real_minutes);
	565	return -1;
	566	}
	567
	568	return 0;
	569	}
	570	#endif
	571	}
	572
	573	spin_lock_irqsave(&mostek_lock, flags);
	574	/* Read the current RTC minutes. */
	575	regs->creg \|= MSTK_CREG_READ;
	576	mostek_minutes = MSTK_REG_MIN(regs);
	577	regs->creg &= ~MSTK_CREG_READ;
	578
	579	/*
	580	* since we're only adjusting minutes and seconds,
	581	* don't interfere with hour overflow. This avoids
	582	* messing with unknown time zones but requires your
	583	* RTC not to be off by more than 15 minutes
	584	*/
	585	real_seconds = nowtime % 60;
	586	real_minutes = nowtime / 60;
587	if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
588	real_minutes += 30; /* correct for half hour time zone */
589	real_minutes %= 60;
590
591	if (abs(real_minutes - mostek_minutes) < 30) {
592	regs->creg \|= MSTK_CREG_WRITE;
593	MSTK_SET_REG_SEC(regs,real_seconds);
594	MSTK_SET_REG_MIN(regs,real_minutes);
595	regs->creg &= ~MSTK_CREG_WRITE;
596	spin_unlock_irqrestore(&mostek_lock, flags);
597	return 0;
598	} else {
599	spin_unlock_irqrestore(&mostek_lock, flags);
600	return -1;
601	}
602	}