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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
a21cff3e DM |
2 | #ifndef _PSYCHO_COMMON_H |
3 | #define _PSYCHO_COMMON_H | |
4 | ||
2e57572a DM |
5 | /* U2P Programmer's Manual, page 13-55, configuration space |
6 | * address format: | |
7 | * | |
8 | * 32 24 23 16 15 11 10 8 7 2 1 0 | |
9 | * --------------------------------------------------------- | |
10 | * |0 0 0 0 0 0 0 0 1| bus | device | function | reg | 0 0 | | |
11 | * --------------------------------------------------------- | |
12 | */ | |
13 | #define PSYCHO_CONFIG_BASE(PBM) \ | |
14 | ((PBM)->config_space | (1UL << 24)) | |
15 | #define PSYCHO_CONFIG_ENCODE(BUS, DEVFN, REG) \ | |
16 | (((unsigned long)(BUS) << 16) | \ | |
17 | ((unsigned long)(DEVFN) << 8) | \ | |
18 | ((unsigned long)(REG))) | |
19 | ||
20 | static inline void *psycho_pci_config_mkaddr(struct pci_pbm_info *pbm, | |
21 | unsigned char bus, | |
22 | unsigned int devfn, | |
23 | int where) | |
24 | { | |
25 | return (void *) | |
26 | (PSYCHO_CONFIG_BASE(pbm) | | |
27 | PSYCHO_CONFIG_ENCODE(bus, devfn, where)); | |
28 | } | |
29 | ||
e6e00372 DM |
30 | enum psycho_error_type { |
31 | UE_ERR, CE_ERR, PCI_ERR | |
32 | }; | |
33 | ||
2e74a74f SR |
34 | void psycho_check_iommu_error(struct pci_pbm_info *pbm, |
35 | unsigned long afsr, | |
36 | unsigned long afar, | |
37 | enum psycho_error_type type); | |
e6e00372 | 38 | |
2e74a74f | 39 | irqreturn_t psycho_pcierr_intr(int irq, void *dev_id); |
e6e00372 | 40 | |
2e74a74f SR |
41 | int psycho_iommu_init(struct pci_pbm_info *pbm, int tsbsize, |
42 | u32 dvma_offset, u32 dma_mask, | |
43 | unsigned long write_complete_offset); | |
a21cff3e | 44 | |
2e74a74f SR |
45 | void psycho_pbm_init_common(struct pci_pbm_info *pbm, |
46 | struct platform_device *op, | |
47 | const char *chip_name, int chip_type); | |
1c03a55c | 48 | |
a21cff3e | 49 | #endif /* _PSYCHO_COMMON_H */ |