Commit | Line | Data |
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a2bd4fd1 DM |
1 | #include <linux/string.h> |
2 | #include <linux/kernel.h> | |
f85ff305 | 3 | #include <linux/of.h> |
a2bd4fd1 DM |
4 | #include <linux/init.h> |
5 | #include <linux/module.h> | |
6 | #include <linux/mod_devicetable.h> | |
7 | #include <linux/slab.h> | |
3f23de10 | 8 | #include <linux/errno.h> |
c1b1a5f1 | 9 | #include <linux/irq.h> |
3f23de10 SR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_platform.h> | |
a2bd4fd1 | 12 | |
3ca9fab4 DM |
13 | void __iomem *of_ioremap(struct resource *res, unsigned long offset, unsigned long size, char *name) |
14 | { | |
15 | unsigned long ret = res->start + offset; | |
6bda5736 | 16 | struct resource *r; |
3ca9fab4 | 17 | |
6bda5736 DM |
18 | if (res->flags & IORESOURCE_MEM) |
19 | r = request_mem_region(ret, size, name); | |
20 | else | |
21 | r = request_region(ret, size, name); | |
22 | if (!r) | |
3ca9fab4 DM |
23 | ret = 0; |
24 | ||
25 | return (void __iomem *) ret; | |
26 | } | |
27 | EXPORT_SYMBOL(of_ioremap); | |
28 | ||
e3a411a3 | 29 | void of_iounmap(struct resource *res, void __iomem *base, unsigned long size) |
3ca9fab4 | 30 | { |
e3a411a3 DM |
31 | if (res->flags & IORESOURCE_MEM) |
32 | release_mem_region((unsigned long) base, size); | |
33 | else | |
34 | release_region((unsigned long) base, size); | |
3ca9fab4 DM |
35 | } |
36 | EXPORT_SYMBOL(of_iounmap); | |
37 | ||
2b1e5978 DM |
38 | static int node_match(struct device *dev, void *data) |
39 | { | |
40 | struct of_device *op = to_of_device(dev); | |
41 | struct device_node *dp = data; | |
42 | ||
43 | return (op->node == dp); | |
44 | } | |
45 | ||
46 | struct of_device *of_find_device_by_node(struct device_node *dp) | |
47 | { | |
37b7754a | 48 | struct device *dev = bus_find_device(&of_platform_bus_type, NULL, |
2b1e5978 DM |
49 | dp, node_match); |
50 | ||
51 | if (dev) | |
52 | return to_of_device(dev); | |
53 | ||
54 | return NULL; | |
55 | } | |
56 | EXPORT_SYMBOL(of_find_device_by_node); | |
57 | ||
51e0f004 | 58 | unsigned int irq_of_parse_and_map(struct device_node *node, int index) |
44266215 DM |
59 | { |
60 | struct of_device *op = of_find_device_by_node(node); | |
61 | ||
62 | if (!op || index >= op->num_irqs) | |
51e0f004 | 63 | return 0; |
44266215 DM |
64 | |
65 | return op->irqs[index]; | |
66 | } | |
67 | EXPORT_SYMBOL(irq_of_parse_and_map); | |
68 | ||
5059625e DM |
69 | /* Take the archdata values for IOMMU, STC, and HOSTDATA found in |
70 | * BUS and propagate to all child of_device objects. | |
71 | */ | |
72 | void of_propagate_archdata(struct of_device *bus) | |
73 | { | |
74 | struct dev_archdata *bus_sd = &bus->dev.archdata; | |
75 | struct device_node *bus_dp = bus->node; | |
76 | struct device_node *dp; | |
77 | ||
78 | for (dp = bus_dp->child; dp; dp = dp->sibling) { | |
79 | struct of_device *op = of_find_device_by_node(dp); | |
80 | ||
81 | op->dev.archdata.iommu = bus_sd->iommu; | |
82 | op->dev.archdata.stc = bus_sd->stc; | |
83 | op->dev.archdata.host_controller = bus_sd->host_controller; | |
84 | op->dev.archdata.numa_node = bus_sd->numa_node; | |
85 | ||
86 | if (dp->child) | |
87 | of_propagate_archdata(op); | |
88 | } | |
89 | } | |
90 | ||
3f23de10 | 91 | struct bus_type of_platform_bus_type; |
37b7754a | 92 | EXPORT_SYMBOL(of_platform_bus_type); |
cf44bbc2 | 93 | |
a83f9823 | 94 | static inline u64 of_read_addr(const u32 *cell, int size) |
cf44bbc2 DM |
95 | { |
96 | u64 r = 0; | |
97 | while (size--) | |
98 | r = (r << 32) | *(cell++); | |
99 | return r; | |
100 | } | |
101 | ||
6bbc0b08 | 102 | static void get_cells(struct device_node *dp, int *addrc, int *sizec) |
cf44bbc2 DM |
103 | { |
104 | if (addrc) | |
105 | *addrc = of_n_addr_cells(dp); | |
106 | if (sizec) | |
107 | *sizec = of_n_size_cells(dp); | |
108 | } | |
109 | ||
110 | /* Max address size we deal with */ | |
111 | #define OF_MAX_ADDR_CELLS 4 | |
112 | ||
113 | struct of_bus { | |
114 | const char *name; | |
115 | const char *addr_prop_name; | |
116 | int (*match)(struct device_node *parent); | |
117 | void (*count_cells)(struct device_node *child, | |
118 | int *addrc, int *sizec); | |
a83f9823 DM |
119 | int (*map)(u32 *addr, const u32 *range, |
120 | int na, int ns, int pna); | |
e3c71a32 | 121 | unsigned long (*get_flags)(const u32 *addr, unsigned long); |
cf44bbc2 DM |
122 | }; |
123 | ||
124 | /* | |
125 | * Default translator (generic bus) | |
126 | */ | |
127 | ||
128 | static void of_bus_default_count_cells(struct device_node *dev, | |
129 | int *addrc, int *sizec) | |
130 | { | |
131 | get_cells(dev, addrc, sizec); | |
132 | } | |
133 | ||
a83f9823 DM |
134 | /* Make sure the least significant 64-bits are in-range. Even |
135 | * for 3 or 4 cell values it is a good enough approximation. | |
136 | */ | |
137 | static int of_out_of_range(const u32 *addr, const u32 *base, | |
138 | const u32 *size, int na, int ns) | |
cf44bbc2 | 139 | { |
a83f9823 DM |
140 | u64 a = of_read_addr(addr, na); |
141 | u64 b = of_read_addr(base, na); | |
cf44bbc2 | 142 | |
a83f9823 DM |
143 | if (a < b) |
144 | return 1; | |
cf44bbc2 | 145 | |
a83f9823 DM |
146 | b += of_read_addr(size, ns); |
147 | if (a >= b) | |
148 | return 1; | |
149 | ||
150 | return 0; | |
cf44bbc2 DM |
151 | } |
152 | ||
a83f9823 DM |
153 | static int of_bus_default_map(u32 *addr, const u32 *range, |
154 | int na, int ns, int pna) | |
cf44bbc2 | 155 | { |
a83f9823 DM |
156 | u32 result[OF_MAX_ADDR_CELLS]; |
157 | int i; | |
158 | ||
159 | if (ns > 2) { | |
160 | printk("of_device: Cannot handle size cells (%d) > 2.", ns); | |
161 | return -EINVAL; | |
162 | } | |
163 | ||
164 | if (of_out_of_range(addr, range, range + na + pna, na, ns)) | |
165 | return -EINVAL; | |
166 | ||
167 | /* Start with the parent range base. */ | |
168 | memcpy(result, range + na, pna * 4); | |
169 | ||
170 | /* Add in the child address offset. */ | |
171 | for (i = 0; i < na; i++) | |
172 | result[pna - 1 - i] += | |
173 | (addr[na - 1 - i] - | |
174 | range[na - 1 - i]); | |
175 | ||
176 | memcpy(addr, result, pna * 4); | |
cf44bbc2 DM |
177 | |
178 | return 0; | |
179 | } | |
180 | ||
e3c71a32 | 181 | static unsigned long of_bus_default_get_flags(const u32 *addr, unsigned long flags) |
cf44bbc2 | 182 | { |
e3c71a32 DM |
183 | if (flags) |
184 | return flags; | |
cf44bbc2 DM |
185 | return IORESOURCE_MEM; |
186 | } | |
187 | ||
cf44bbc2 DM |
188 | /* |
189 | * PCI bus specific translator | |
190 | */ | |
191 | ||
192 | static int of_bus_pci_match(struct device_node *np) | |
193 | { | |
7ee766d8 | 194 | if (!strcmp(np->name, "pci")) { |
a165b420 | 195 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
196 | |
197 | if (model && !strcmp(model, "SUNW,simba")) | |
198 | return 0; | |
199 | ||
a83f9823 DM |
200 | /* Do not do PCI specific frobbing if the |
201 | * PCI bridge lacks a ranges property. We | |
202 | * want to pass it through up to the next | |
203 | * parent as-is, not with the PCI translate | |
204 | * method which chops off the top address cell. | |
205 | */ | |
206 | if (!of_find_property(np, "ranges", NULL)) | |
207 | return 0; | |
208 | ||
209 | return 1; | |
210 | } | |
211 | ||
212 | return 0; | |
cf44bbc2 DM |
213 | } |
214 | ||
01f94c4a DM |
215 | static int of_bus_simba_match(struct device_node *np) |
216 | { | |
a165b420 | 217 | const char *model = of_get_property(np, "model", NULL); |
01f94c4a DM |
218 | |
219 | if (model && !strcmp(model, "SUNW,simba")) | |
220 | return 1; | |
8c2786cf DM |
221 | |
222 | /* Treat PCI busses lacking ranges property just like | |
223 | * simba. | |
224 | */ | |
7ee766d8 | 225 | if (!strcmp(np->name, "pci")) { |
8c2786cf DM |
226 | if (!of_find_property(np, "ranges", NULL)) |
227 | return 1; | |
228 | } | |
229 | ||
01f94c4a DM |
230 | return 0; |
231 | } | |
232 | ||
233 | static int of_bus_simba_map(u32 *addr, const u32 *range, | |
234 | int na, int ns, int pna) | |
235 | { | |
236 | return 0; | |
237 | } | |
238 | ||
cf44bbc2 DM |
239 | static void of_bus_pci_count_cells(struct device_node *np, |
240 | int *addrc, int *sizec) | |
241 | { | |
242 | if (addrc) | |
243 | *addrc = 3; | |
244 | if (sizec) | |
245 | *sizec = 2; | |
246 | } | |
247 | ||
a83f9823 DM |
248 | static int of_bus_pci_map(u32 *addr, const u32 *range, |
249 | int na, int ns, int pna) | |
cf44bbc2 | 250 | { |
a83f9823 DM |
251 | u32 result[OF_MAX_ADDR_CELLS]; |
252 | int i; | |
cf44bbc2 DM |
253 | |
254 | /* Check address type match */ | |
255 | if ((addr[0] ^ range[0]) & 0x03000000) | |
a83f9823 | 256 | return -EINVAL; |
cf44bbc2 | 257 | |
a83f9823 DM |
258 | if (of_out_of_range(addr + 1, range + 1, range + na + pna, |
259 | na - 1, ns)) | |
260 | return -EINVAL; | |
cf44bbc2 | 261 | |
a83f9823 DM |
262 | /* Start with the parent range base. */ |
263 | memcpy(result, range + na, pna * 4); | |
cf44bbc2 | 264 | |
a83f9823 DM |
265 | /* Add in the child address offset, skipping high cell. */ |
266 | for (i = 0; i < na - 1; i++) | |
267 | result[pna - 1 - i] += | |
268 | (addr[na - 1 - i] - | |
269 | range[na - 1 - i]); | |
270 | ||
271 | memcpy(addr, result, pna * 4); | |
272 | ||
273 | return 0; | |
cf44bbc2 DM |
274 | } |
275 | ||
e3c71a32 | 276 | static unsigned long of_bus_pci_get_flags(const u32 *addr, unsigned long flags) |
cf44bbc2 | 277 | { |
cf44bbc2 DM |
278 | u32 w = addr[0]; |
279 | ||
e3c71a32 DM |
280 | /* For PCI, we override whatever child busses may have used. */ |
281 | flags = 0; | |
cf44bbc2 DM |
282 | switch((w >> 24) & 0x03) { |
283 | case 0x01: | |
284 | flags |= IORESOURCE_IO; | |
e3c71a32 DM |
285 | break; |
286 | ||
cf44bbc2 DM |
287 | case 0x02: /* 32 bits */ |
288 | case 0x03: /* 64 bits */ | |
289 | flags |= IORESOURCE_MEM; | |
e3c71a32 | 290 | break; |
cf44bbc2 DM |
291 | } |
292 | if (w & 0x40000000) | |
293 | flags |= IORESOURCE_PREFETCH; | |
294 | return flags; | |
295 | } | |
296 | ||
cf44bbc2 DM |
297 | /* |
298 | * SBUS bus specific translator | |
299 | */ | |
300 | ||
301 | static int of_bus_sbus_match(struct device_node *np) | |
302 | { | |
956d039a DM |
303 | struct device_node *dp = np; |
304 | ||
305 | while (dp) { | |
306 | if (!strcmp(dp->name, "sbus") || | |
307 | !strcmp(dp->name, "sbi")) | |
308 | return 1; | |
309 | ||
310 | /* Have a look at use_1to1_mapping(). We're trying | |
311 | * to match SBUS if that's the top-level bus and we | |
312 | * don't have some intervening real bus that provides | |
313 | * ranges based translations. | |
314 | */ | |
315 | if (of_find_property(dp, "ranges", NULL) != NULL) | |
316 | break; | |
317 | ||
318 | dp = dp->parent; | |
319 | } | |
320 | ||
321 | return 0; | |
cf44bbc2 DM |
322 | } |
323 | ||
324 | static void of_bus_sbus_count_cells(struct device_node *child, | |
325 | int *addrc, int *sizec) | |
326 | { | |
327 | if (addrc) | |
328 | *addrc = 2; | |
329 | if (sizec) | |
330 | *sizec = 1; | |
331 | } | |
332 | ||
4130a4b2 DM |
333 | /* |
334 | * FHC/Central bus specific translator. | |
335 | * | |
336 | * This is just needed to hard-code the address and size cell | |
337 | * counts. 'fhc' and 'central' nodes lack the #address-cells and | |
338 | * #size-cells properties, and if you walk to the root on such | |
339 | * Enterprise boxes all you'll get is a #size-cells of 2 which is | |
340 | * not what we want to use. | |
341 | */ | |
342 | static int of_bus_fhc_match(struct device_node *np) | |
cf44bbc2 | 343 | { |
4130a4b2 DM |
344 | return !strcmp(np->name, "fhc") || |
345 | !strcmp(np->name, "central"); | |
cf44bbc2 DM |
346 | } |
347 | ||
4130a4b2 | 348 | #define of_bus_fhc_count_cells of_bus_sbus_count_cells |
cf44bbc2 DM |
349 | |
350 | /* | |
351 | * Array of bus specific translators | |
352 | */ | |
353 | ||
354 | static struct of_bus of_busses[] = { | |
355 | /* PCI */ | |
356 | { | |
357 | .name = "pci", | |
358 | .addr_prop_name = "assigned-addresses", | |
359 | .match = of_bus_pci_match, | |
360 | .count_cells = of_bus_pci_count_cells, | |
361 | .map = of_bus_pci_map, | |
cf44bbc2 DM |
362 | .get_flags = of_bus_pci_get_flags, |
363 | }, | |
01f94c4a DM |
364 | /* SIMBA */ |
365 | { | |
366 | .name = "simba", | |
367 | .addr_prop_name = "assigned-addresses", | |
368 | .match = of_bus_simba_match, | |
369 | .count_cells = of_bus_pci_count_cells, | |
370 | .map = of_bus_simba_map, | |
371 | .get_flags = of_bus_pci_get_flags, | |
372 | }, | |
cf44bbc2 DM |
373 | /* SBUS */ |
374 | { | |
375 | .name = "sbus", | |
376 | .addr_prop_name = "reg", | |
377 | .match = of_bus_sbus_match, | |
378 | .count_cells = of_bus_sbus_count_cells, | |
4130a4b2 DM |
379 | .map = of_bus_default_map, |
380 | .get_flags = of_bus_default_get_flags, | |
381 | }, | |
382 | /* FHC */ | |
383 | { | |
384 | .name = "fhc", | |
385 | .addr_prop_name = "reg", | |
386 | .match = of_bus_fhc_match, | |
387 | .count_cells = of_bus_fhc_count_cells, | |
388 | .map = of_bus_default_map, | |
389 | .get_flags = of_bus_default_get_flags, | |
cf44bbc2 DM |
390 | }, |
391 | /* Default */ | |
392 | { | |
393 | .name = "default", | |
394 | .addr_prop_name = "reg", | |
395 | .match = NULL, | |
396 | .count_cells = of_bus_default_count_cells, | |
397 | .map = of_bus_default_map, | |
cf44bbc2 DM |
398 | .get_flags = of_bus_default_get_flags, |
399 | }, | |
400 | }; | |
401 | ||
402 | static struct of_bus *of_match_bus(struct device_node *np) | |
403 | { | |
404 | int i; | |
405 | ||
406 | for (i = 0; i < ARRAY_SIZE(of_busses); i ++) | |
407 | if (!of_busses[i].match || of_busses[i].match(np)) | |
408 | return &of_busses[i]; | |
409 | BUG(); | |
410 | return NULL; | |
411 | } | |
412 | ||
413 | static int __init build_one_resource(struct device_node *parent, | |
414 | struct of_bus *bus, | |
415 | struct of_bus *pbus, | |
416 | u32 *addr, | |
417 | int na, int ns, int pna) | |
418 | { | |
6a23acf3 | 419 | const u32 *ranges; |
21cd8833 | 420 | int rone, rlen; |
cf44bbc2 DM |
421 | |
422 | ranges = of_get_property(parent, "ranges", &rlen); | |
423 | if (ranges == NULL || rlen == 0) { | |
a83f9823 DM |
424 | u32 result[OF_MAX_ADDR_CELLS]; |
425 | int i; | |
426 | ||
427 | memset(result, 0, pna * 4); | |
428 | for (i = 0; i < na; i++) | |
429 | result[pna - 1 - i] = | |
430 | addr[na - 1 - i]; | |
431 | ||
432 | memcpy(addr, result, pna * 4); | |
433 | return 0; | |
cf44bbc2 DM |
434 | } |
435 | ||
436 | /* Now walk through the ranges */ | |
437 | rlen /= 4; | |
438 | rone = na + pna + ns; | |
439 | for (; rlen >= rone; rlen -= rone, ranges += rone) { | |
a83f9823 DM |
440 | if (!bus->map(addr, ranges, na, ns, pna)) |
441 | return 0; | |
cf44bbc2 | 442 | } |
a83f9823 | 443 | |
49d23cfc DM |
444 | /* When we miss an I/O space match on PCI, just pass it up |
445 | * to the next PCI bridge and/or controller. | |
446 | */ | |
447 | if (!strcmp(bus->name, "pci") && | |
448 | (addr[0] & 0x03000000) == 0x01000000) | |
449 | return 0; | |
450 | ||
a83f9823 DM |
451 | return 1; |
452 | } | |
453 | ||
454 | static int __init use_1to1_mapping(struct device_node *pp) | |
455 | { | |
a83f9823 DM |
456 | /* If we have a ranges property in the parent, use it. */ |
457 | if (of_find_property(pp, "ranges", NULL) != NULL) | |
458 | return 0; | |
cf44bbc2 | 459 | |
a83f9823 DM |
460 | /* If the parent is the dma node of an ISA bus, pass |
461 | * the translation up to the root. | |
5280267c DM |
462 | * |
463 | * Some SBUS devices use intermediate nodes to express | |
464 | * hierarchy within the device itself. These aren't | |
465 | * real bus nodes, and don't have a 'ranges' property. | |
466 | * But, we should still pass the translation work up | |
467 | * to the SBUS itself. | |
a83f9823 | 468 | */ |
5280267c DM |
469 | if (!strcmp(pp->name, "dma") || |
470 | !strcmp(pp->name, "espdma") || | |
471 | !strcmp(pp->name, "ledma") || | |
472 | !strcmp(pp->name, "lebuffer")) | |
a83f9823 DM |
473 | return 0; |
474 | ||
8c2786cf DM |
475 | /* Similarly for all PCI bridges, if we get this far |
476 | * it lacks a ranges property, and this will include | |
477 | * cases like Simba. | |
478 | */ | |
7ee766d8 | 479 | if (!strcmp(pp->name, "pci")) |
a83f9823 DM |
480 | return 0; |
481 | ||
482 | return 1; | |
cf44bbc2 DM |
483 | } |
484 | ||
a83f9823 DM |
485 | static int of_resource_verbose; |
486 | ||
cf44bbc2 DM |
487 | static void __init build_device_resources(struct of_device *op, |
488 | struct device *parent) | |
489 | { | |
490 | struct of_device *p_op; | |
491 | struct of_bus *bus; | |
492 | int na, ns; | |
493 | int index, num_reg; | |
6a23acf3 | 494 | const void *preg; |
cf44bbc2 DM |
495 | |
496 | if (!parent) | |
497 | return; | |
498 | ||
499 | p_op = to_of_device(parent); | |
500 | bus = of_match_bus(p_op->node); | |
501 | bus->count_cells(op->node, &na, &ns); | |
502 | ||
503 | preg = of_get_property(op->node, bus->addr_prop_name, &num_reg); | |
504 | if (!preg || num_reg == 0) | |
505 | return; | |
506 | ||
507 | /* Convert to num-cells. */ | |
508 | num_reg /= 4; | |
509 | ||
46ba6d7d | 510 | /* Convert to num-entries. */ |
cf44bbc2 DM |
511 | num_reg /= na + ns; |
512 | ||
e5dd42e4 | 513 | /* Prevent overrunning the op->resources[] array. */ |
46ba6d7d DM |
514 | if (num_reg > PROMREG_MAX) { |
515 | printk(KERN_WARNING "%s: Too many regs (%d), " | |
516 | "limiting to %d.\n", | |
517 | op->node->full_name, num_reg, PROMREG_MAX); | |
518 | num_reg = PROMREG_MAX; | |
519 | } | |
520 | ||
cf44bbc2 DM |
521 | for (index = 0; index < num_reg; index++) { |
522 | struct resource *r = &op->resource[index]; | |
523 | u32 addr[OF_MAX_ADDR_CELLS]; | |
6a23acf3 | 524 | const u32 *reg = (preg + (index * ((na + ns) * 4))); |
cf44bbc2 DM |
525 | struct device_node *dp = op->node; |
526 | struct device_node *pp = p_op->node; | |
b85cdd49 | 527 | struct of_bus *pbus, *dbus; |
cf44bbc2 DM |
528 | u64 size, result = OF_BAD_ADDR; |
529 | unsigned long flags; | |
530 | int dna, dns; | |
531 | int pna, pns; | |
532 | ||
533 | size = of_read_addr(reg + na, ns); | |
cf44bbc2 DM |
534 | memcpy(addr, reg, na * 4); |
535 | ||
e3c71a32 DM |
536 | flags = bus->get_flags(addr, 0); |
537 | ||
a83f9823 | 538 | if (use_1to1_mapping(pp)) { |
cf44bbc2 DM |
539 | result = of_read_addr(addr, na); |
540 | goto build_res; | |
541 | } | |
542 | ||
543 | dna = na; | |
544 | dns = ns; | |
b85cdd49 | 545 | dbus = bus; |
cf44bbc2 DM |
546 | |
547 | while (1) { | |
548 | dp = pp; | |
549 | pp = dp->parent; | |
550 | if (!pp) { | |
551 | result = of_read_addr(addr, dna); | |
552 | break; | |
553 | } | |
554 | ||
555 | pbus = of_match_bus(pp); | |
556 | pbus->count_cells(dp, &pna, &pns); | |
557 | ||
b85cdd49 | 558 | if (build_one_resource(dp, dbus, pbus, addr, |
a83f9823 | 559 | dna, dns, pna)) |
cf44bbc2 DM |
560 | break; |
561 | ||
e3c71a32 DM |
562 | flags = pbus->get_flags(addr, flags); |
563 | ||
cf44bbc2 DM |
564 | dna = pna; |
565 | dns = pns; | |
b85cdd49 | 566 | dbus = pbus; |
cf44bbc2 DM |
567 | } |
568 | ||
569 | build_res: | |
570 | memset(r, 0, sizeof(*r)); | |
a83f9823 DM |
571 | |
572 | if (of_resource_verbose) | |
90181136 | 573 | printk("%s reg[%d] -> %llx\n", |
a83f9823 DM |
574 | op->node->full_name, index, |
575 | result); | |
576 | ||
cf44bbc2 | 577 | if (result != OF_BAD_ADDR) { |
1815aed5 DM |
578 | if (tlb_type == hypervisor) |
579 | result &= 0x0fffffffffffffffUL; | |
580 | ||
cf44bbc2 DM |
581 | r->start = result; |
582 | r->end = result + size - 1; | |
583 | r->flags = flags; | |
cf44bbc2 DM |
584 | } |
585 | r->name = op->node->name; | |
586 | } | |
587 | } | |
588 | ||
2b1e5978 DM |
589 | static struct device_node * __init |
590 | apply_interrupt_map(struct device_node *dp, struct device_node *pp, | |
6a23acf3 | 591 | const u32 *imap, int imlen, const u32 *imask, |
2b1e5978 DM |
592 | unsigned int *irq_p) |
593 | { | |
594 | struct device_node *cp; | |
595 | unsigned int irq = *irq_p; | |
596 | struct of_bus *bus; | |
597 | phandle handle; | |
6a23acf3 | 598 | const u32 *reg; |
2b1e5978 DM |
599 | int na, num_reg, i; |
600 | ||
601 | bus = of_match_bus(pp); | |
602 | bus->count_cells(dp, &na, NULL); | |
603 | ||
604 | reg = of_get_property(dp, "reg", &num_reg); | |
605 | if (!reg || !num_reg) | |
606 | return NULL; | |
607 | ||
608 | imlen /= ((na + 3) * 4); | |
609 | handle = 0; | |
610 | for (i = 0; i < imlen; i++) { | |
611 | int j; | |
612 | ||
613 | for (j = 0; j < na; j++) { | |
614 | if ((reg[j] & imask[j]) != imap[j]) | |
615 | goto next; | |
616 | } | |
617 | if (imap[na] == irq) { | |
618 | handle = imap[na + 1]; | |
619 | irq = imap[na + 2]; | |
620 | break; | |
621 | } | |
622 | ||
623 | next: | |
624 | imap += (na + 3); | |
625 | } | |
46ba6d7d DM |
626 | if (i == imlen) { |
627 | /* Psycho and Sabre PCI controllers can have 'interrupt-map' | |
628 | * properties that do not include the on-board device | |
629 | * interrupts. Instead, the device's 'interrupts' property | |
630 | * is already a fully specified INO value. | |
631 | * | |
632 | * Handle this by deciding that, if we didn't get a | |
633 | * match in the parent's 'interrupt-map', and the | |
634 | * parent is an IRQ translater, then use the parent as | |
635 | * our IRQ controller. | |
636 | */ | |
637 | if (pp->irq_trans) | |
638 | return pp; | |
639 | ||
2b1e5978 | 640 | return NULL; |
46ba6d7d | 641 | } |
2b1e5978 DM |
642 | |
643 | *irq_p = irq; | |
644 | cp = of_find_node_by_phandle(handle); | |
645 | ||
646 | return cp; | |
647 | } | |
648 | ||
649 | static unsigned int __init pci_irq_swizzle(struct device_node *dp, | |
650 | struct device_node *pp, | |
651 | unsigned int irq) | |
652 | { | |
6a23acf3 | 653 | const struct linux_prom_pci_registers *regs; |
bb4c18cb | 654 | unsigned int bus, devfn, slot, ret; |
2b1e5978 DM |
655 | |
656 | if (irq < 1 || irq > 4) | |
657 | return irq; | |
658 | ||
659 | regs = of_get_property(dp, "reg", NULL); | |
660 | if (!regs) | |
661 | return irq; | |
662 | ||
bb4c18cb | 663 | bus = (regs->phys_hi >> 16) & 0xff; |
2b1e5978 DM |
664 | devfn = (regs->phys_hi >> 8) & 0xff; |
665 | slot = (devfn >> 3) & 0x1f; | |
666 | ||
bb4c18cb DM |
667 | if (pp->irq_trans) { |
668 | /* Derived from Table 8-3, U2P User's Manual. This branch | |
669 | * is handling a PCI controller that lacks a proper set of | |
670 | * interrupt-map and interrupt-map-mask properties. The | |
671 | * Ultra-E450 is one example. | |
672 | * | |
673 | * The bit layout is BSSLL, where: | |
674 | * B: 0 on bus A, 1 on bus B | |
675 | * D: 2-bit slot number, derived from PCI device number as | |
676 | * (dev - 1) for bus A, or (dev - 2) for bus B | |
677 | * L: 2-bit line number | |
bb4c18cb DM |
678 | */ |
679 | if (bus & 0x80) { | |
680 | /* PBM-A */ | |
681 | bus = 0x00; | |
682 | slot = (slot - 1) << 2; | |
683 | } else { | |
684 | /* PBM-B */ | |
685 | bus = 0x10; | |
686 | slot = (slot - 2) << 2; | |
687 | } | |
688 | irq -= 1; | |
689 | ||
690 | ret = (bus | slot | irq); | |
691 | } else { | |
692 | /* Going through a PCI-PCI bridge that lacks a set of | |
693 | * interrupt-map and interrupt-map-mask properties. | |
694 | */ | |
695 | ret = ((irq - 1 + (slot & 3)) & 3) + 1; | |
696 | } | |
2b1e5978 DM |
697 | |
698 | return ret; | |
699 | } | |
700 | ||
a83f9823 DM |
701 | static int of_irq_verbose; |
702 | ||
2b1e5978 DM |
703 | static unsigned int __init build_one_device_irq(struct of_device *op, |
704 | struct device *parent, | |
705 | unsigned int irq) | |
706 | { | |
707 | struct device_node *dp = op->node; | |
708 | struct device_node *pp, *ip; | |
709 | unsigned int orig_irq = irq; | |
c1b1a5f1 | 710 | int nid; |
2b1e5978 DM |
711 | |
712 | if (irq == 0xffffffff) | |
713 | return irq; | |
714 | ||
715 | if (dp->irq_trans) { | |
716 | irq = dp->irq_trans->irq_build(dp, irq, | |
717 | dp->irq_trans->data); | |
a83f9823 DM |
718 | |
719 | if (of_irq_verbose) | |
720 | printk("%s: direct translate %x --> %x\n", | |
721 | dp->full_name, orig_irq, irq); | |
722 | ||
c1b1a5f1 | 723 | goto out; |
2b1e5978 DM |
724 | } |
725 | ||
726 | /* Something more complicated. Walk up to the root, applying | |
727 | * interrupt-map or bus specific translations, until we hit | |
728 | * an IRQ translator. | |
729 | * | |
730 | * If we hit a bus type or situation we cannot handle, we | |
731 | * stop and assume that the original IRQ number was in a | |
732 | * format which has special meaning to it's immediate parent. | |
733 | */ | |
734 | pp = dp->parent; | |
735 | ip = NULL; | |
736 | while (pp) { | |
6a23acf3 | 737 | const void *imap, *imsk; |
2b1e5978 DM |
738 | int imlen; |
739 | ||
740 | imap = of_get_property(pp, "interrupt-map", &imlen); | |
741 | imsk = of_get_property(pp, "interrupt-map-mask", NULL); | |
742 | if (imap && imsk) { | |
743 | struct device_node *iret; | |
744 | int this_orig_irq = irq; | |
745 | ||
746 | iret = apply_interrupt_map(dp, pp, | |
747 | imap, imlen, imsk, | |
748 | &irq); | |
a83f9823 DM |
749 | |
750 | if (of_irq_verbose) | |
751 | printk("%s: Apply [%s:%x] imap --> [%s:%x]\n", | |
752 | op->node->full_name, | |
753 | pp->full_name, this_orig_irq, | |
754 | (iret ? iret->full_name : "NULL"), irq); | |
755 | ||
2b1e5978 DM |
756 | if (!iret) |
757 | break; | |
758 | ||
759 | if (iret->irq_trans) { | |
760 | ip = iret; | |
761 | break; | |
762 | } | |
763 | } else { | |
7ee766d8 | 764 | if (!strcmp(pp->name, "pci")) { |
2b1e5978 DM |
765 | unsigned int this_orig_irq = irq; |
766 | ||
767 | irq = pci_irq_swizzle(dp, pp, irq); | |
a83f9823 DM |
768 | if (of_irq_verbose) |
769 | printk("%s: PCI swizzle [%s] " | |
770 | "%x --> %x\n", | |
771 | op->node->full_name, | |
772 | pp->full_name, this_orig_irq, | |
773 | irq); | |
774 | ||
2b1e5978 DM |
775 | } |
776 | ||
777 | if (pp->irq_trans) { | |
778 | ip = pp; | |
779 | break; | |
780 | } | |
781 | } | |
782 | dp = pp; | |
783 | pp = pp->parent; | |
784 | } | |
785 | if (!ip) | |
786 | return orig_irq; | |
787 | ||
788 | irq = ip->irq_trans->irq_build(op->node, irq, | |
789 | ip->irq_trans->data); | |
a83f9823 DM |
790 | if (of_irq_verbose) |
791 | printk("%s: Apply IRQ trans [%s] %x --> %x\n", | |
792 | op->node->full_name, ip->full_name, orig_irq, irq); | |
2b1e5978 | 793 | |
c1b1a5f1 DM |
794 | out: |
795 | nid = of_node_to_nid(dp); | |
796 | if (nid != -1) { | |
96d76a74 | 797 | cpumask_t numa_mask = *cpumask_of_node(nid); |
c1b1a5f1 | 798 | |
0de26520 | 799 | irq_set_affinity(irq, &numa_mask); |
c1b1a5f1 DM |
800 | } |
801 | ||
2b1e5978 DM |
802 | return irq; |
803 | } | |
804 | ||
cf44bbc2 DM |
805 | static struct of_device * __init scan_one_device(struct device_node *dp, |
806 | struct device *parent) | |
807 | { | |
808 | struct of_device *op = kzalloc(sizeof(*op), GFP_KERNEL); | |
6a23acf3 | 809 | const unsigned int *irq; |
3d6e4702 | 810 | struct dev_archdata *sd; |
2b1e5978 | 811 | int len, i; |
cf44bbc2 DM |
812 | |
813 | if (!op) | |
814 | return NULL; | |
815 | ||
3d6e4702 DM |
816 | sd = &op->dev.archdata; |
817 | sd->prom_node = dp; | |
818 | sd->op = op; | |
819 | ||
cf44bbc2 DM |
820 | op->node = dp; |
821 | ||
822 | op->clock_freq = of_getintprop_default(dp, "clock-frequency", | |
823 | (25*1000*1000)); | |
824 | op->portid = of_getintprop_default(dp, "upa-portid", -1); | |
825 | if (op->portid == -1) | |
826 | op->portid = of_getintprop_default(dp, "portid", -1); | |
827 | ||
828 | irq = of_get_property(dp, "interrupts", &len); | |
2b1e5978 | 829 | if (irq) { |
2b1e5978 | 830 | op->num_irqs = len / 4; |
92d9091f RR |
831 | |
832 | /* Prevent overrunning the op->irqs[] array. */ | |
833 | if (op->num_irqs > PROMINTR_MAX) { | |
834 | printk(KERN_WARNING "%s: Too many irqs (%d), " | |
835 | "limiting to %d.\n", | |
836 | dp->full_name, op->num_irqs, PROMINTR_MAX); | |
837 | op->num_irqs = PROMINTR_MAX; | |
838 | } | |
839 | memcpy(op->irqs, irq, op->num_irqs * 4); | |
2b1e5978 DM |
840 | } else { |
841 | op->num_irqs = 0; | |
842 | } | |
cf44bbc2 DM |
843 | |
844 | build_device_resources(op, parent); | |
2b1e5978 DM |
845 | for (i = 0; i < op->num_irqs; i++) |
846 | op->irqs[i] = build_one_device_irq(op, parent, op->irqs[i]); | |
cf44bbc2 DM |
847 | |
848 | op->dev.parent = parent; | |
37b7754a | 849 | op->dev.bus = &of_platform_bus_type; |
cf44bbc2 | 850 | if (!parent) |
2222c313 | 851 | dev_set_name(&op->dev, "root"); |
cf44bbc2 | 852 | else |
2222c313 | 853 | dev_set_name(&op->dev, "%08x", dp->node); |
cf44bbc2 DM |
854 | |
855 | if (of_device_register(op)) { | |
856 | printk("%s: Could not register of device.\n", | |
857 | dp->full_name); | |
858 | kfree(op); | |
859 | op = NULL; | |
860 | } | |
861 | ||
862 | return op; | |
863 | } | |
864 | ||
865 | static void __init scan_tree(struct device_node *dp, struct device *parent) | |
866 | { | |
867 | while (dp) { | |
868 | struct of_device *op = scan_one_device(dp, parent); | |
869 | ||
870 | if (op) | |
871 | scan_tree(dp->child, &op->dev); | |
872 | ||
873 | dp = dp->sibling; | |
874 | } | |
875 | } | |
876 | ||
877 | static void __init scan_of_devices(void) | |
878 | { | |
879 | struct device_node *root = of_find_node_by_path("/"); | |
880 | struct of_device *parent; | |
881 | ||
882 | parent = scan_one_device(root, NULL); | |
883 | if (!parent) | |
884 | return; | |
885 | ||
886 | scan_tree(root->child, &parent->dev); | |
887 | } | |
888 | ||
a2bd4fd1 DM |
889 | static int __init of_bus_driver_init(void) |
890 | { | |
cf44bbc2 | 891 | int err; |
a2bd4fd1 | 892 | |
3f23de10 | 893 | err = of_bus_type_init(&of_platform_bus_type, "of"); |
cf44bbc2 DM |
894 | if (!err) |
895 | scan_of_devices(); | |
896 | ||
897 | return err; | |
a2bd4fd1 DM |
898 | } |
899 | ||
900 | postcore_initcall(of_bus_driver_init); | |
901 | ||
a83f9823 DM |
902 | static int __init of_debug(char *str) |
903 | { | |
904 | int val = 0; | |
905 | ||
906 | get_option(&str, &val); | |
907 | if (val & 1) | |
908 | of_resource_verbose = 1; | |
909 | if (val & 2) | |
910 | of_irq_verbose = 1; | |
911 | return 1; | |
912 | } | |
913 | ||
914 | __setup("of_debug=", of_debug); |