[linux-block.git] / arch / sparc / kernel / kprobes.c

// SPDX-License-Identifier: GPL-2.0
/* arch/sparc64/kernel/kprobes.c
 *
 * Copyright (C) 2004 David S. Miller <davem@davemloft.net>
 */

#include <linux/kernel.h>
#include <linux/kprobes.h>
#include <linux/extable.h>
#include <linux/kdebug.h>
#include <linux/slab.h>
#include <linux/context_tracking.h>
#include <asm/signal.h>
#include <asm/cacheflush.h>
#include <linux/uaccess.h>

/* We do not have hardware single-stepping on sparc64.
 * So we implement software single-stepping with breakpoint
 * traps.  The top-level scheme is similar to that used
 * in the x86 kprobes implementation.
 *
 * In the kprobe->ainsn.insn[] array we store the original
 * instruction at index zero and a break instruction at
 * index one.
 *
 * When we hit a kprobe we:
 * - Run the pre-handler
 * - Remember "regs->tnpc" and interrupt level stored in
 *   "regs->tstate" so we can restore them later
 * - Disable PIL interrupts
 * - Set regs->tpc to point to kprobe->ainsn.insn[0]
 * - Set regs->tnpc to point to kprobe->ainsn.insn[1]
 * - Mark that we are actively in a kprobe
 *
 * At this point we wait for the second breakpoint at
 * kprobe->ainsn.insn[1] to hit.  When it does we:
 * - Run the post-handler
 * - Set regs->tpc to "remembered" regs->tnpc stored above,
 *   restore the PIL interrupt level in "regs->tstate" as well
 * - Make any adjustments necessary to regs->tnpc in order
 *   to handle relative branches correctly.  See below.
 * - Mark that we are no longer actively in a kprobe.
 */

DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);

struct kretprobe_blackpoint kretprobe_blacklist[] = {{NULL, NULL}};

int __kprobes arch_prepare_kprobe(struct kprobe *p)
{
	if ((unsigned long) p->addr & 0x3UL)
		return -EILSEQ;

	p->ainsn.insn[0] = *p->addr;
	flushi(&p->ainsn.insn[0]);

	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
	flushi(&p->ainsn.insn[1]);

	p->opcode = *p->addr;
	return 0;
}

void __kprobes arch_arm_kprobe(struct kprobe *p)
{
	*p->addr = BREAKPOINT_INSTRUCTION;
	flushi(p->addr);
}

void __kprobes arch_disarm_kprobe(struct kprobe *p)
{
	*p->addr = p->opcode;
	flushi(p->addr);
}

static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
{
	kcb->prev_kprobe.kp = kprobe_running();
	kcb->prev_kprobe.status = kcb->kprobe_status;
	kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
	kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
}

static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
{
	__this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
	kcb->kprobe_status = kcb->prev_kprobe.status;
	kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
	kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
}

static void __kprobes set_current_kprobe(struct kprobe *p, struct pt_regs *regs,
				struct kprobe_ctlblk *kcb)
{
	__this_cpu_write(current_kprobe, p);
	kcb->kprobe_orig_tnpc = regs->tnpc;
	kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
}

static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs,
			struct kprobe_ctlblk *kcb)
{
	regs->tstate |= TSTATE_PIL;

	/*single step inline, if it a breakpoint instruction*/
	if (p->opcode == BREAKPOINT_INSTRUCTION) {
		regs->tpc = (unsigned long) p->addr;
		regs->tnpc = kcb->kprobe_orig_tnpc;
	} else {
		regs->tpc = (unsigned long) &p->ainsn.insn[0];
		regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	}
}

static int __kprobes kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *p;
	void *addr = (void *) regs->tpc;
	int ret = 0;
	struct kprobe_ctlblk *kcb;

	/*
	 * We don't want to be preempted for the entire
	 * duration of kprobe processing
	 */
	preempt_disable();
	kcb = get_kprobe_ctlblk();

	if (kprobe_running()) {
		p = get_kprobe(addr);
		if (p) {
			if (kcb->kprobe_status == KPROBE_HIT_SS) {
				regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
					kcb->kprobe_orig_tstate_pil);
				goto no_kprobe;
			}
			/* We have reentered the kprobe_handler(), since
			 * another probe was hit while within the handler.
			 * We here save the original kprobes variables and
			 * just single step on the instruction of the new probe
			 * without calling any user handlers.
			 */
			save_previous_kprobe(kcb);
			set_current_kprobe(p, regs, kcb);
			kprobes_inc_nmissed_count(p);
			kcb->kprobe_status = KPROBE_REENTER;
			prepare_singlestep(p, regs, kcb);
			return 1;
		} else if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
			/* The breakpoint instruction was removed by
			 * another cpu right after we hit, no further
			 * handling of this interrupt is appropriate
			 */
			ret = 1;
		}
		goto no_kprobe;
	}

	p = get_kprobe(addr);
	if (!p) {
		if (*(u32 *)addr != BREAKPOINT_INSTRUCTION) {
			/*
			 * The breakpoint instruction was removed right
			 * after we hit it.  Another cpu has removed
			 * either a probepoint or a debugger breakpoint
			 * at this address.  In either case, no further
			 * handling of this interrupt is appropriate.
			 */
			ret = 1;
		}
		/* Not one of ours: let kernel handle it */
		goto no_kprobe;
	}

	set_current_kprobe(p, regs, kcb);
	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
	if (p->pre_handler && p->pre_handler(p, regs)) {
		reset_current_kprobe();
		preempt_enable_no_resched();
		return 1;
	}

	prepare_singlestep(p, regs, kcb);
	kcb->kprobe_status = KPROBE_HIT_SS;
	return 1;

no_kprobe:
	preempt_enable_no_resched();
	return ret;
}

/* If INSN is a relative control transfer instruction,
 * return the corrected branch destination value.
 *
 * regs->tpc and regs->tnpc still hold the values of the
 * program counters at the time of trap due to the execution
 * of the BREAKPOINT_INSTRUCTION_2 at p->ainsn.insn[1]
 * 
 */
static unsigned long __kprobes relbranch_fixup(u32 insn, struct kprobe *p,
					       struct pt_regs *regs)
{
	unsigned long real_pc = (unsigned long) p->addr;

	/* Branch not taken, no mods necessary.  */
	if (regs->tnpc == regs->tpc + 0x4UL)
		return real_pc + 0x8UL;

	/* The three cases are call, branch w/prediction,
	 * and traditional branch.
	 */
	if ((insn & 0xc0000000) == 0x40000000 ||
	    (insn & 0xc1c00000) == 0x00400000 ||
	    (insn & 0xc1c00000) == 0x00800000) {
		unsigned long ainsn_addr;

		ainsn_addr = (unsigned long) &p->ainsn.insn[0];

		/* The instruction did all the work for us
		 * already, just apply the offset to the correct
		 * instruction location.
		 */
		return (real_pc + (regs->tnpc - ainsn_addr));
	}

	/* It is jmpl or some other absolute PC modification instruction,
	 * leave NPC as-is.
	 */
	return regs->tnpc;
}

/* If INSN is an instruction which writes it's PC location
 * into a destination register, fix that up.
 */
static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
				  unsigned long real_pc)
{
	unsigned long *slot = NULL;

	/* Simplest case is 'call', which always uses %o7 */
	if ((insn & 0xc0000000) == 0x40000000) {
		slot = &regs->u_regs[UREG_I7];
	}

	/* 'jmpl' encodes the register inside of the opcode */
	if ((insn & 0xc1f80000) == 0x81c00000) {
		unsigned long rd = ((insn >> 25) & 0x1f);

		if (rd <= 15) {
			slot = &regs->u_regs[rd];
		} else {
			/* Hard case, it goes onto the stack. */
			flushw_all();

			rd -= 16;
			slot = (unsigned long *)
				(regs->u_regs[UREG_FP] + STACK_BIAS);
			slot += rd;
		}
	}
	if (slot != NULL)
		*slot = real_pc;
}

/*
 * Called after single-stepping.  p->addr is the address of the
 * instruction which has been replaced by the breakpoint
 * instruction.  To avoid the SMP problems that can occur when we
 * temporarily put back the original opcode to single-step, we
 * single-stepped a copy of the instruction.  The address of this
 * copy is &p->ainsn.insn[0].
 *
 * This function prepares to return from the post-single-step
 * breakpoint trap.
 */
static void __kprobes resume_execution(struct kprobe *p,
		struct pt_regs *regs, struct kprobe_ctlblk *kcb)
{
	u32 insn = p->ainsn.insn[0];

	regs->tnpc = relbranch_fixup(insn, p, regs);

	/* This assignment must occur after relbranch_fixup() */
	regs->tpc = kcb->kprobe_orig_tnpc;

	retpc_fixup(regs, insn, (unsigned long) p->addr);

	regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
			kcb->kprobe_orig_tstate_pil);
}

static int __kprobes post_kprobe_handler(struct pt_regs *regs)
{
	struct kprobe *cur = kprobe_running();
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();

	if (!cur)
		return 0;

	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
		kcb->kprobe_status = KPROBE_HIT_SSDONE;
		cur->post_handler(cur, regs, 0);
	}

	resume_execution(cur, regs, kcb);

	/*Restore back the original saved kprobes variables and continue. */
	if (kcb->kprobe_status == KPROBE_REENTER) {
		restore_previous_kprobe(kcb);
		goto out;
	}
	reset_current_kprobe();
out:
	preempt_enable_no_resched();

	return 1;
}

int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
{
	struct kprobe *cur = kprobe_running();
	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	const struct exception_table_entry *entry;

	switch(kcb->kprobe_status) {
	case KPROBE_HIT_SS:
	case KPROBE_REENTER:
		/*
		 * We are here because the instruction being single
		 * stepped caused a page fault. We reset the current
		 * kprobe and the tpc points back to the probe address
		 * and allow the page fault handler to continue as a
		 * normal page fault.
		 */
		regs->tpc = (unsigned long)cur->addr;
		regs->tnpc = kcb->kprobe_orig_tnpc;
		regs->tstate = ((regs->tstate & ~TSTATE_PIL) |
				kcb->kprobe_orig_tstate_pil);
		if (kcb->kprobe_status == KPROBE_REENTER)
			restore_previous_kprobe(kcb);
		else
			reset_current_kprobe();
		preempt_enable_no_resched();
		break;
	case KPROBE_HIT_ACTIVE:
	case KPROBE_HIT_SSDONE:
		/*
		 * In case the user-specified fault handler returned
		 * zero, try to fix up.
		 */

		entry = search_exception_tables(regs->tpc);
		if (entry) {
			regs->tpc = entry->fixup;
			regs->tnpc = regs->tpc + 4;
			return 1;
		}

		/*
		 * fixup_exception() could not handle it,
		 * Let do_page_fault() fix it.
		 */
		break;
	default:
		break;
	}

	return 0;
}

/*
 * Wrapper routine to for handling exceptions.
 */
int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
				       unsigned long val, void *data)
{
	struct die_args *args = (struct die_args *)data;
	int ret = NOTIFY_DONE;

	if (args->regs && user_mode(args->regs))
		return ret;

	switch (val) {
	case DIE_DEBUG:
		if (kprobe_handler(args->regs))
			ret = NOTIFY_STOP;
		break;
	case DIE_DEBUG_2:
		if (post_kprobe_handler(args->regs))
			ret = NOTIFY_STOP;
		break;
	default:
		break;
	}
	return ret;
}

asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
				      struct pt_regs *regs)
{
	enum ctx_state prev_state = exception_enter();

	BUG_ON(trap_level != 0x170 && trap_level != 0x171);

	if (user_mode(regs)) {
		local_irq_enable();
		bad_trap(regs, trap_level);
		goto out;
	}

	/* trap_level == 0x170 --> ta 0x70
	 * trap_level == 0x171 --> ta 0x71
	 */
	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
		       (trap_level == 0x170) ? "debug" : "debug_2",
		       regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
		bad_trap(regs, trap_level);
out:
	exception_exit(prev_state);
}

/* The value stored in the return address register is actually 2
 * instructions before where the callee will return to.
 * Sequences usually look something like this
 *
 *		call	some_function	<--- return register points here
 *		 nop			<--- call delay slot
 *		whatever		<--- where callee returns to
 *
 * To keep trampoline_probe_handler logic simpler, we normalize the
 * value kept in ri->ret_addr so we don't need to keep adjusting it
 * back and forth.
 */
void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
				      struct pt_regs *regs)
{
	ri->ret_addr = (kprobe_opcode_t *)(regs->u_regs[UREG_RETPC] + 8);
	ri->fp = NULL;

	/* Replace the return addr with trampoline addr */
	regs->u_regs[UREG_RETPC] =
		((unsigned long)__kretprobe_trampoline) - 8;
}

/*
 * Called when the probe at kretprobe trampoline is hit
 */
static int __kprobes trampoline_probe_handler(struct kprobe *p,
					      struct pt_regs *regs)
{
	unsigned long orig_ret_address = 0;

	orig_ret_address = __kretprobe_trampoline_handler(regs, NULL);
	regs->tpc = orig_ret_address;
	regs->tnpc = orig_ret_address + 4;

	/*
	 * By returning a non-zero value, we are telling
	 * kprobe_handler() that we don't want the post_handler
	 * to run (and have re-enabled preemption)
	 */
	return 1;
}

static void __used kretprobe_trampoline_holder(void)
{
	asm volatile(".global __kretprobe_trampoline\n"
		     "__kretprobe_trampoline:\n"
		     "\tnop\n"
		     "\tnop\n");
}
static struct kprobe trampoline_p = {
	.addr = (kprobe_opcode_t *) &__kretprobe_trampoline,
	.pre_handler = trampoline_probe_handler
};

int __init arch_init_kprobes(void)
{
	return register_kprobe(&trampoline_p);
}

int __kprobes arch_trampoline_kprobe(struct kprobe *p)
{
	if (p->addr == (kprobe_opcode_t *)&__kretprobe_trampoline)
		return 1;

	return 0;
}
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4 LT	2	/* arch/sparc64/kernel/kprobes.c
	3	*
	4	* Copyright (C) 2004 David S. Miller <davem@davemloft.net>
	5	*/
	6
1da177e4 LT	7	#include <linux/kernel.h>
1da177e4 LT	8	#include <linux/kprobes.h>
cdd4f4c7	9	#include <linux/extable.h>
1eeb66a1	10	#include <linux/kdebug.h>
5a0e3ad6	11	#include <linux/slab.h>
812cb83a	12	#include <linux/context_tracking.h>
1da177e4	13	#include <asm/signal.h>
05e14cb3	14	#include <asm/cacheflush.h>
7c0f6ba6	15	#include <linux/uaccess.h>
1da177e4 LT	16
	17	/* We do not have hardware single-stepping on sparc64.
	18	* So we implement software single-stepping with breakpoint
	19	* traps. The top-level scheme is similar to that used
	20	* in the x86 kprobes implementation.
	21	*
	22	* In the kprobe->ainsn.insn[] array we store the original
	23	* instruction at index zero and a break instruction at
	24	* index one.
	25	*
	26	* When we hit a kprobe we:
	27	* - Run the pre-handler
	28	* - Remember "regs->tnpc" and interrupt level stored in
	29	* "regs->tstate" so we can restore them later
	30	* - Disable PIL interrupts
	31	* - Set regs->tpc to point to kprobe->ainsn.insn[0]
	32	* - Set regs->tnpc to point to kprobe->ainsn.insn[1]
	33	* - Mark that we are actively in a kprobe
	34	*
	35	* At this point we wait for the second breakpoint at
	36	* kprobe->ainsn.insn[1] to hit. When it does we:
	37	* - Run the post-handler
	38	* - Set regs->tpc to "remembered" regs->tnpc stored above,
	39	* restore the PIL interrupt level in "regs->tstate" as well
	40	* - Make any adjustments necessary to regs->tnpc in order
	41	* to handle relative branches correctly. See below.
	42	* - Mark that we are no longer actively in a kprobe.
	43	*/
	44
f215d985 AM	45	DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
	46	DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
	47
f438d914 MH	48	struct kretprobe_blackpoint kretprobe_blacklist[] = {{NULL, NULL}};
f438d914 MH	49
05e14cb3	50	int __kprobes arch_prepare_kprobe(struct kprobe *p)
1da177e4	51	{
936cf251 DM	52	if ((unsigned long) p->addr & 0x3UL)
	53	return -EILSEQ;
	54
1da177e4	55	p->ainsn.insn[0] = *p->addr;
f0882589 DM	56	flushi(&p->ainsn.insn[0]);
f0882589 DM	57
1da177e4	58	p->ainsn.insn[1] = BREAKPOINT_INSTRUCTION_2;
f0882589 DM	59	flushi(&p->ainsn.insn[1]);
f0882589 DM	60
7e1048b1	61	p->opcode = *p->addr;
49a2a1b8	62	return 0;
7e1048b1 RL	63	}
7e1048b1 RL	64
05e14cb3	65	void __kprobes arch_arm_kprobe(struct kprobe *p)
7e1048b1 RL	66	{
	67	*p->addr = BREAKPOINT_INSTRUCTION;
	68	flushi(p->addr);
	69	}
	70
05e14cb3	71	void __kprobes arch_disarm_kprobe(struct kprobe *p)
7e1048b1 RL	72	{
	73	*p->addr = p->opcode;
	74	flushi(p->addr);
1da177e4 LT	75	}
1da177e4 LT	76
07fab8da	77	static void __kprobes save_previous_kprobe(struct kprobe_ctlblk *kcb)
e539c233	78	{
f215d985 AM	79	kcb->prev_kprobe.kp = kprobe_running();
	80	kcb->prev_kprobe.status = kcb->kprobe_status;
	81	kcb->prev_kprobe.orig_tnpc = kcb->kprobe_orig_tnpc;
	82	kcb->prev_kprobe.orig_tstate_pil = kcb->kprobe_orig_tstate_pil;
e539c233 PP	83	}
e539c233 PP	84
07fab8da	85	static void __kprobes restore_previous_kprobe(struct kprobe_ctlblk *kcb)
e539c233	86	{
494fc421	87	__this_cpu_write(current_kprobe, kcb->prev_kprobe.kp);
f215d985 AM	88	kcb->kprobe_status = kcb->prev_kprobe.status;
	89	kcb->kprobe_orig_tnpc = kcb->prev_kprobe.orig_tnpc;
	90	kcb->kprobe_orig_tstate_pil = kcb->prev_kprobe.orig_tstate_pil;
e539c233 PP	91	}
e539c233 PP	92
07fab8da	93	static void __kprobes set_current_kprobe(struct kprobe p, struct pt_regs regs,
f215d985	94	struct kprobe_ctlblk *kcb)
1da177e4	95	{
494fc421	96	__this_cpu_write(current_kprobe, p);
f215d985 AM	97	kcb->kprobe_orig_tnpc = regs->tnpc;
f215d985 AM	98	kcb->kprobe_orig_tstate_pil = (regs->tstate & TSTATE_PIL);
e539c233 PP	99	}
e539c233 PP	100
07fab8da	101	static void __kprobes prepare_singlestep(struct kprobe p, struct pt_regs regs,
f215d985	102	struct kprobe_ctlblk *kcb)
e539c233	103	{
1da177e4 LT	104	regs->tstate \|= TSTATE_PIL;
	105
	106	/single step inline, if it a breakpoint instruction/
	107	if (p->opcode == BREAKPOINT_INSTRUCTION) {
	108	regs->tpc = (unsigned long) p->addr;
f215d985	109	regs->tnpc = kcb->kprobe_orig_tnpc;
1da177e4 LT	110	} else {
	111	regs->tpc = (unsigned long) &p->ainsn.insn[0];
	112	regs->tnpc = (unsigned long) &p->ainsn.insn[1];
	113	}
	114	}
	115
05e14cb3	116	static int __kprobes kprobe_handler(struct pt_regs *regs)
1da177e4 LT	117	{
	118	struct kprobe *p;
	119	void addr = (void ) regs->tpc;
	120	int ret = 0;
d217d545 AM	121	struct kprobe_ctlblk *kcb;
	122
	123	/*
	124	* We don't want to be preempted for the entire
	125	* duration of kprobe processing
	126	*/
	127	preempt_disable();
	128	kcb = get_kprobe_ctlblk();
1da177e4	129
1da177e4	130	if (kprobe_running()) {
1da177e4 LT	131	p = get_kprobe(addr);
1da177e4 LT	132	if (p) {
f215d985	133	if (kcb->kprobe_status == KPROBE_HIT_SS) {
1da177e4	134	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
f215d985	135	kcb->kprobe_orig_tstate_pil);
1da177e4 LT	136	goto no_kprobe;
1da177e4 LT	137	}
e539c233 PP	138	/* We have reentered the kprobe_handler(), since
	139	* another probe was hit while within the handler.
	140	* We here save the original kprobes variables and
	141	* just single step on the instruction of the new probe
	142	* without calling any user handlers.
	143	*/
f215d985 AM	144	save_previous_kprobe(kcb);
f215d985 AM	145	set_current_kprobe(p, regs, kcb);
bf8d5c52	146	kprobes_inc_nmissed_count(p);
f215d985 AM	147	kcb->kprobe_status = KPROBE_REENTER;
f215d985 AM	148	prepare_singlestep(p, regs, kcb);
e539c233	149	return 1;
d5ad85b6	150	} else if ((u32 )addr != BREAKPOINT_INSTRUCTION) {
eb3a7292 KA	151	/* The breakpoint instruction was removed by
	152	* another cpu right after we hit, no further
	153	* handling of this interrupt is appropriate
	154	*/
d5ad85b6	155	ret = 1;
1da177e4	156	}
1da177e4 LT	157	goto no_kprobe;
	158	}
	159
1da177e4 LT	160	p = get_kprobe(addr);
1da177e4 LT	161	if (!p) {
1da177e4 LT	162	if ((u32 )addr != BREAKPOINT_INSTRUCTION) {
	163	/*
	164	* The breakpoint instruction was removed right
	165	* after we hit it. Another cpu has removed
	166	* either a probepoint or a debugger breakpoint
	167	* at this address. In either case, no further
	168	* handling of this interrupt is appropriate.
	169	*/
	170	ret = 1;
	171	}
	172	/* Not one of ours: let kernel handle it */
	173	goto no_kprobe;
	174	}
	175
f215d985 AM	176	set_current_kprobe(p, regs, kcb);
f215d985 AM	177	kcb->kprobe_status = KPROBE_HIT_ACTIVE;
cce188bd MH	178	if (p->pre_handler && p->pre_handler(p, regs)) {
	179	reset_current_kprobe();
	180	preempt_enable_no_resched();
1da177e4	181	return 1;
cce188bd	182	}
1da177e4	183
f215d985 AM	184	prepare_singlestep(p, regs, kcb);
f215d985 AM	185	kcb->kprobe_status = KPROBE_HIT_SS;
1da177e4 LT	186	return 1;
	187
	188	no_kprobe:
d217d545	189	preempt_enable_no_resched();
1da177e4 LT	190	return ret;
	191	}
	192
	193	/* If INSN is a relative control transfer instruction,
	194	* return the corrected branch destination value.
	195	*
f0882589 DM	196	* regs->tpc and regs->tnpc still hold the values of the
	197	* program counters at the time of trap due to the execution
	198	* of the BREAKPOINT_INSTRUCTION_2 at p->ainsn.insn[1]
	199	*
1da177e4	200	*/
f0882589 DM	201	static unsigned long __kprobes relbranch_fixup(u32 insn, struct kprobe *p,
f0882589 DM	202	struct pt_regs *regs)
1da177e4	203	{
f0882589 DM	204	unsigned long real_pc = (unsigned long) p->addr;
f0882589 DM	205
1da177e4	206	/* Branch not taken, no mods necessary. */
f0882589 DM	207	if (regs->tnpc == regs->tpc + 0x4UL)
f0882589 DM	208	return real_pc + 0x8UL;
1da177e4 LT	209
	210	/* The three cases are call, branch w/prediction,
	211	* and traditional branch.
	212	*/
	213	if ((insn & 0xc0000000) == 0x40000000 \|\|
	214	(insn & 0xc1c00000) == 0x00400000 \|\|
	215	(insn & 0xc1c00000) == 0x00800000) {
f0882589 DM	216	unsigned long ainsn_addr;
	217
	218	ainsn_addr = (unsigned long) &p->ainsn.insn[0];
	219
1da177e4 LT	220	/* The instruction did all the work for us
	221	* already, just apply the offset to the correct
	222	* instruction location.
	223	*/
f0882589	224	return (real_pc + (regs->tnpc - ainsn_addr));
1da177e4 LT	225	}
1da177e4 LT	226
f0882589 DM	227	/* It is jmpl or some other absolute PC modification instruction,
	228	* leave NPC as-is.
	229	*/
	230	return regs->tnpc;
1da177e4 LT	231	}
	232
	233	/* If INSN is an instruction which writes it's PC location
	234	* into a destination register, fix that up.
	235	*/
05e14cb3 PP	236	static void __kprobes retpc_fixup(struct pt_regs *regs, u32 insn,
05e14cb3 PP	237	unsigned long real_pc)
1da177e4 LT	238	{
	239	unsigned long *slot = NULL;
	240
f0882589	241	/* Simplest case is 'call', which always uses %o7 */
1da177e4 LT	242	if ((insn & 0xc0000000) == 0x40000000) {
	243	slot = &regs->u_regs[UREG_I7];
	244	}
	245
f0882589	246	/* 'jmpl' encodes the register inside of the opcode */
1da177e4 LT	247	if ((insn & 0xc1f80000) == 0x81c00000) {
	248	unsigned long rd = ((insn >> 25) & 0x1f);
	249
	250	if (rd <= 15) {
	251	slot = &regs->u_regs[rd];
	252	} else {
	253	/* Hard case, it goes onto the stack. */
	254	flushw_all();
	255
	256	rd -= 16;
	257	slot = (unsigned long *)
	258	(regs->u_regs[UREG_FP] + STACK_BIAS);
	259	slot += rd;
	260	}
	261	}
	262	if (slot != NULL)
	263	*slot = real_pc;
	264	}
	265
	266	/*
	267	* Called after single-stepping. p->addr is the address of the
f0882589	268	* instruction which has been replaced by the breakpoint
1da177e4 LT	269	* instruction. To avoid the SMP problems that can occur when we
	270	* temporarily put back the original opcode to single-step, we
	271	* single-stepped a copy of the instruction. The address of this
f0882589	272	* copy is &p->ainsn.insn[0].
1da177e4 LT	273	*
	274	* This function prepares to return from the post-single-step
	275	* breakpoint trap.
	276	*/
f215d985 AM	277	static void __kprobes resume_execution(struct kprobe *p,
f215d985 AM	278	struct pt_regs regs, struct kprobe_ctlblk kcb)
1da177e4 LT	279	{
	280	u32 insn = p->ainsn.insn[0];
	281
f0882589 DM	282	regs->tnpc = relbranch_fixup(insn, p, regs);
	283
	284	/* This assignment must occur after relbranch_fixup() */
f215d985	285	regs->tpc = kcb->kprobe_orig_tnpc;
f0882589	286
1da177e4 LT	287	retpc_fixup(regs, insn, (unsigned long) p->addr);
	288
	289	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
f215d985	290	kcb->kprobe_orig_tstate_pil);
1da177e4 LT	291	}
1da177e4 LT	292
07fab8da	293	static int __kprobes post_kprobe_handler(struct pt_regs *regs)
1da177e4	294	{
f215d985 AM	295	struct kprobe *cur = kprobe_running();
	296	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
	297
	298	if (!cur)
1da177e4 LT	299	return 0;
1da177e4 LT	300
f215d985 AM	301	if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
	302	kcb->kprobe_status = KPROBE_HIT_SSDONE;
	303	cur->post_handler(cur, regs, 0);
e539c233	304	}
1da177e4	305
f215d985	306	resume_execution(cur, regs, kcb);
1da177e4	307
e539c233	308	/Restore back the original saved kprobes variables and continue. /
f215d985 AM	309	if (kcb->kprobe_status == KPROBE_REENTER) {
f215d985 AM	310	restore_previous_kprobe(kcb);
e539c233 PP	311	goto out;
e539c233 PP	312	}
f215d985	313	reset_current_kprobe();
e539c233	314	out:
1da177e4 LT	315	preempt_enable_no_resched();
	316
	317	return 1;
	318	}
	319
127cda1e	320	int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
1da177e4	321	{
f215d985 AM	322	struct kprobe *cur = kprobe_running();
f215d985 AM	323	struct kprobe_ctlblk *kcb = get_kprobe_ctlblk();
b6700096 PP	324	const struct exception_table_entry *entry;
	325
	326	switch(kcb->kprobe_status) {
	327	case KPROBE_HIT_SS:
	328	case KPROBE_REENTER:
	329	/*
	330	* We are here because the instruction being single
	331	* stepped caused a page fault. We reset the current
	332	* kprobe and the tpc points back to the probe address
	333	* and allow the page fault handler to continue as a
	334	* normal page fault.
	335	*/
	336	regs->tpc = (unsigned long)cur->addr;
	337	regs->tnpc = kcb->kprobe_orig_tnpc;
	338	regs->tstate = ((regs->tstate & ~TSTATE_PIL) \|
	339	kcb->kprobe_orig_tstate_pil);
	340	if (kcb->kprobe_status == KPROBE_REENTER)
	341	restore_previous_kprobe(kcb);
	342	else
	343	reset_current_kprobe();
	344	preempt_enable_no_resched();
	345	break;
	346	case KPROBE_HIT_ACTIVE:
	347	case KPROBE_HIT_SSDONE:
b6700096 PP	348	/*
	349	* In case the user-specified fault handler returned
	350	* zero, try to fix up.
	351	*/
1da177e4	352
b6700096 PP	353	entry = search_exception_tables(regs->tpc);
	354	if (entry) {
	355	regs->tpc = entry->fixup;
	356	regs->tnpc = regs->tpc + 4;
	357	return 1;
	358	}
1da177e4	359
b6700096 PP	360	/*
	361	* fixup_exception() could not handle it,
	362	* Let do_page_fault() fix it.
	363	*/
	364	break;
	365	default:
	366	break;
1da177e4	367	}
b6700096	368
1da177e4 LT	369	return 0;
	370	}
	371
	372	/*
	373	* Wrapper routine to for handling exceptions.
	374	*/
05e14cb3 PP	375	int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
05e14cb3 PP	376	unsigned long val, void *data)
1da177e4 LT	377	{
1da177e4 LT	378	struct die_args args = (struct die_args )data;
66ff2d06 AM	379	int ret = NOTIFY_DONE;
66ff2d06 AM	380
2326c770	381	if (args->regs && user_mode(args->regs))
	382	return ret;
	383
1da177e4 LT	384	switch (val) {
	385	case DIE_DEBUG:
	386	if (kprobe_handler(args->regs))
66ff2d06	387	ret = NOTIFY_STOP;
1da177e4 LT	388	break;
	389	case DIE_DEBUG_2:
	390	if (post_kprobe_handler(args->regs))
66ff2d06	391	ret = NOTIFY_STOP;
1da177e4	392	break;
1da177e4 LT	393	default:
	394	break;
	395	}
66ff2d06	396	return ret;
1da177e4 LT	397	}
1da177e4 LT	398
05e14cb3 PP	399	asmlinkage void __kprobes kprobe_trap(unsigned long trap_level,
05e14cb3 PP	400	struct pt_regs *regs)
1da177e4	401	{
812cb83a KT	402	enum ctx_state prev_state = exception_enter();
812cb83a KT	403
1da177e4 LT	404	BUG_ON(trap_level != 0x170 && trap_level != 0x171);
	405
	406	if (user_mode(regs)) {
	407	local_irq_enable();
	408	bad_trap(regs, trap_level);
812cb83a	409	goto out;
1da177e4 LT	410	}
	411
	412	/* trap_level == 0x170 --> ta 0x70
	413	* trap_level == 0x171 --> ta 0x71
	414	*/
	415	if (notify_die((trap_level == 0x170) ? DIE_DEBUG : DIE_DEBUG_2,
	416	(trap_level == 0x170) ? "debug" : "debug_2",
	417	regs, 0, trap_level, SIGTRAP) != NOTIFY_STOP)
	418	bad_trap(regs, trap_level);
812cb83a KT	419	out:
812cb83a KT	420	exception_exit(prev_state);
1da177e4 LT	421	}
1da177e4 LT	422
ef53d9c5 S	423	/* The value stored in the return address register is actually 2
	424	* instructions before where the callee will return to.
	425	* Sequences usually look something like this
d38f1220 DM	426	*
	427	* call some_function <--- return register points here
	428	* nop <--- call delay slot
	429	* whatever <--- where callee returns to
	430	*
	431	* To keep trampoline_probe_handler logic simpler, we normalize the
	432	* value kept in ri->ret_addr so we don't need to keep adjusting it
	433	* back and forth.
	434	*/
	435	void __kprobes arch_prepare_kretprobe(struct kretprobe_instance *ri,
	436	struct pt_regs *regs)
	437	{
	438	ri->ret_addr = (kprobe_opcode_t *)(regs->u_regs[UREG_RETPC] + 8);
5e96ce8a	439	ri->fp = NULL;
d38f1220 DM	440
	441	/* Replace the return addr with trampoline addr */
	442	regs->u_regs[UREG_RETPC] =
adf8a61a	443	((unsigned long)__kretprobe_trampoline) - 8;
d38f1220 DM	444	}
	445
	446	/*
	447	* Called when the probe at kretprobe trampoline is hit
	448	*/
2f827ea7 SR	449	static int __kprobes trampoline_probe_handler(struct kprobe *p,
2f827ea7 SR	450	struct pt_regs *regs)
d38f1220	451	{
5e96ce8a	452	unsigned long orig_ret_address = 0;
d38f1220	453
96fed8ac	454	orig_ret_address = __kretprobe_trampoline_handler(regs, NULL);
d38f1220 DM	455	regs->tpc = orig_ret_address;
	456	regs->tnpc = orig_ret_address + 4;
	457
d38f1220 DM	458	/*
	459	* By returning a non-zero value, we are telling
	460	* kprobe_handler() that we don't want the post_handler
	461	* to run (and have re-enabled preemption)
	462	*/
	463	return 1;
	464	}
	465
2f827ea7	466	static void __used kretprobe_trampoline_holder(void)
d38f1220	467	{
adf8a61a MH	468	asm volatile(".global __kretprobe_trampoline\n"
adf8a61a MH	469	"__kretprobe_trampoline:\n"
d38f1220 DM	470	"\tnop\n"
	471	"\tnop\n");
	472	}
	473	static struct kprobe trampoline_p = {
adf8a61a	474	.addr = (kprobe_opcode_t *) &__kretprobe_trampoline,
d38f1220 DM	475	.pre_handler = trampoline_probe_handler
	476	};
	477
	478	int __init arch_init_kprobes(void)
6772926b	479	{
d38f1220 DM	480	return register_kprobe(&trampoline_p);
	481	}
	482
	483	int __kprobes arch_trampoline_kprobe(struct kprobe *p)
	484	{
adf8a61a	485	if (p->addr == (kprobe_opcode_t *)&__kretprobe_trampoline)
d38f1220 DM	486	return 1;
d38f1220 DM	487
6772926b RL	488	return 0;
6772926b RL	489	}