projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| f5e706ad SR |
1 | #ifndef __SPARC64_PCI_H |
| 2 | #define __SPARC64_PCI_H | |
| 3 | ||
| 4 | #ifdef __KERNEL__ | |
| 5 | ||
| 6 | #include <linux/dma-mapping.h> | |
| 7 | ||
| 8 | /* Can be used to override the logic in pci_scan_bus for skipping | |
| 9 | * already-configured bus numbers - to be used for buggy BIOSes | |
| 10 | * or architectures with incomplete PCI setup by the loader. | |
| 11 | */ | |
| 12 | #define pcibios_assign_all_busses() 0 | |
| 13 | #define pcibios_scan_all_fns(a, b) 0 | |
| 14 | ||
| 15 | #define PCIBIOS_MIN_IO 0UL | |
| 16 | #define PCIBIOS_MIN_MEM 0UL | |
| 17 | ||
| 18 | #define PCI_IRQ_NONE 0xffffffff | |
| 19 | ||
| 20 | #define PCI_CACHE_LINE_BYTES 64 | |
| 21 | ||
| 22 | static inline void pcibios_set_master(struct pci_dev *dev) | |
| 23 | { | |
| 24 | /* No special bus mastering setup handling */ | |
| 25 | } | |
| 26 | ||
| 27 | static inline void pcibios_penalize_isa_irq(int irq, int active) | |
| 28 | { | |
| 29 | /* We don't do dynamic PCI IRQ allocation */ | |
| 30 | } | |
| 31 | ||
| 32 | /* The PCI address space does not equal the physical memory | |
| 33 | * address space. The networking and block device layers use | |
| 34 | * this boolean for bounce buffer decisions. | |
| 35 | */ | |
| 36 | #define PCI_DMA_BUS_IS_PHYS (0) | |
| 37 | ||
| f5e706ad SR |
38 | /* pci_unmap_{single,page} is not a nop, thus... */ |
| 39 | #define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \ | |
| 40 | dma_addr_t ADDR_NAME; | |
| 41 | #define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \ | |
| 42 | __u32 LEN_NAME; | |
| 43 | #define pci_unmap_addr(PTR, ADDR_NAME) \ | |
| 44 | ((PTR)->ADDR_NAME) | |
| 45 | #define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \ | |
| 46 | (((PTR)->ADDR_NAME) = (VAL)) | |
| 47 | #define pci_unmap_len(PTR, LEN_NAME) \ | |
| 48 | ((PTR)->LEN_NAME) | |
| 49 | #define pci_unmap_len_set(PTR, LEN_NAME, VAL) \ | |
| 50 | (((PTR)->LEN_NAME) = (VAL)) | |
| 51 | ||
| f5e706ad SR |
52 | /* PCI IOMMU mapping bypass support. */ |
| 53 | ||
| 54 | /* PCI 64-bit addressing works for all slots on all controller | |
| 55 | * types on sparc64. However, it requires that the device | |
| 56 | * can drive enough of the 64 bits. | |
| 57 | */ | |
| 58 | #define PCI64_REQUIRED_MASK (~(dma64_addr_t)0) | |
| 59 | #define PCI64_ADDR_BASE 0xfffc000000000000UL | |
| 60 | ||
| f5e706ad SR |
61 | #ifdef CONFIG_PCI |
| 62 | static inline void pci_dma_burst_advice(struct pci_dev *pdev, | |
| 63 | enum pci_dma_burst_strategy *strat, | |
| 64 | unsigned long *strategy_parameter) | |
| 65 | { | |
| 66 | unsigned long cacheline_size; | |
| 67 | u8 byte; | |
| 68 | ||
| 69 | pci_read_config_byte(pdev, PCI_CACHE_LINE_SIZE, &byte); | |
| 70 | if (byte == 0) | |
| 71 | cacheline_size = 1024; | |
| 72 | else | |
| 73 | cacheline_size = (int) byte * 4; | |
| 74 | ||
| 75 | *strat = PCI_DMA_BURST_BOUNDARY; | |
| 76 | *strategy_parameter = cacheline_size; | |
| 77 | } | |
| 78 | #endif | |
| 79 | ||
| 80 | /* Return the index of the PCI controller for device PDEV. */ | |
| 81 | ||
| 82 | extern int pci_domain_nr(struct pci_bus *bus); | |
| 83 | static inline int pci_proc_domain(struct pci_bus *bus) | |
| 84 | { | |
| 85 | return 1; | |
| 86 | } | |
| 87 | ||
| 88 | /* Platform support for /proc/bus/pci/X/Y mmap()s. */ | |
| 89 | ||
| 90 | #define HAVE_PCI_MMAP | |
| 91 | #define HAVE_ARCH_PCI_GET_UNMAPPED_AREA | |
| 92 | #define get_pci_unmapped_area get_fb_unmapped_area | |
| 93 | ||
| 94 | extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma, | |
| 95 | enum pci_mmap_state mmap_state, | |
| 96 | int write_combine); | |
| 97 | ||
| 98 | extern void | |
| 99 | pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, | |
| 100 | struct resource *res); | |
| 101 | ||
| 102 | extern void | |
| 103 | pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res, | |
| 104 | struct pci_bus_region *region); | |
| 105 | ||
| f5e706ad SR |
106 | static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel) |
| 107 | { | |
| 108 | return PCI_IRQ_NONE; | |
| 109 | } | |
| 110 | ||
| 111 | struct device_node; | |
| 112 | extern struct device_node *pci_device_to_OF_node(struct pci_dev *pdev); | |
| 113 | ||
| 114 | #define HAVE_ARCH_PCI_RESOURCE_TO_USER | |
| 115 | extern void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
| 116 | const struct resource *rsrc, | |
| 117 | resource_size_t *start, resource_size_t *end); | |
| 118 | #endif /* __KERNEL__ */ | |
| 119 | ||
| 120 | #endif /* __SPARC64_PCI_H */ |