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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
f5e706ad SR |
2 | #ifndef __SPARC_IO_H |
3 | #define __SPARC_IO_H | |
4 | ||
5 | #include <linux/kernel.h> | |
f5e706ad SR |
6 | #include <linux/ioport.h> /* struct resource */ |
7 | ||
e1039fb4 | 8 | #define IO_SPACE_LIMIT 0xffffffff |
f5e706ad | 9 | |
e1039fb4 SR |
10 | #define memset_io(d,c,sz) _memset_io(d,c,sz) |
11 | #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) | |
12 | #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) | |
f5e706ad | 13 | |
e1039fb4 | 14 | #include <asm-generic/io.h> |
f5e706ad | 15 | |
e1039fb4 SR |
16 | static inline void _memset_io(volatile void __iomem *dst, |
17 | int c, __kernel_size_t n) | |
f5e706ad | 18 | { |
e1039fb4 | 19 | volatile void __iomem *d = dst; |
f5e706ad | 20 | |
e1039fb4 SR |
21 | while (n--) { |
22 | writeb(c, d); | |
23 | d++; | |
24 | } | |
f5e706ad SR |
25 | } |
26 | ||
e1039fb4 SR |
27 | static inline void _memcpy_fromio(void *dst, const volatile void __iomem *src, |
28 | __kernel_size_t n) | |
f5e706ad | 29 | { |
e1039fb4 | 30 | char *d = dst; |
f5e706ad | 31 | |
e1039fb4 SR |
32 | while (n--) { |
33 | char tmp = readb(src); | |
34 | *d++ = tmp; | |
35 | src++; | |
36 | } | |
f5e706ad SR |
37 | } |
38 | ||
e1039fb4 SR |
39 | static inline void _memcpy_toio(volatile void __iomem *dst, const void *src, |
40 | __kernel_size_t n) | |
f5e706ad | 41 | { |
e1039fb4 SR |
42 | const char *s = src; |
43 | volatile void __iomem *d = dst; | |
f5e706ad | 44 | |
e1039fb4 SR |
45 | while (n--) { |
46 | char tmp = *s++; | |
47 | writeb(tmp, d); | |
48 | d++; | |
49 | } | |
f5e706ad SR |
50 | } |
51 | ||
f5e706ad SR |
52 | /* |
53 | * SBus accessors. | |
54 | * | |
55 | * SBus has only one, memory mapped, I/O space. | |
56 | * We do not need to flip bytes for SBus of course. | |
57 | */ | |
c3373da9 | 58 | static inline u8 sbus_readb(const volatile void __iomem *addr) |
f5e706ad SR |
59 | { |
60 | return *(__force volatile u8 *)addr; | |
61 | } | |
62 | ||
c3373da9 | 63 | static inline u16 sbus_readw(const volatile void __iomem *addr) |
f5e706ad SR |
64 | { |
65 | return *(__force volatile u16 *)addr; | |
66 | } | |
67 | ||
c3373da9 | 68 | static inline u32 sbus_readl(const volatile void __iomem *addr) |
f5e706ad SR |
69 | { |
70 | return *(__force volatile u32 *)addr; | |
71 | } | |
72 | ||
c3373da9 | 73 | static inline void sbus_writeb(u8 b, volatile void __iomem *addr) |
f5e706ad SR |
74 | { |
75 | *(__force volatile u8 *)addr = b; | |
76 | } | |
77 | ||
c3373da9 | 78 | static inline void sbus_writew(u16 w, volatile void __iomem *addr) |
f5e706ad SR |
79 | { |
80 | *(__force volatile u16 *)addr = w; | |
81 | } | |
82 | ||
c3373da9 | 83 | static inline void sbus_writel(u32 l, volatile void __iomem *addr) |
f5e706ad SR |
84 | { |
85 | *(__force volatile u32 *)addr = l; | |
86 | } | |
87 | ||
c3373da9 SR |
88 | static inline void sbus_memset_io(volatile void __iomem *__dst, int c, |
89 | __kernel_size_t n) | |
f5e706ad SR |
90 | { |
91 | while(n--) { | |
92 | sbus_writeb(c, __dst); | |
93 | __dst++; | |
94 | } | |
95 | } | |
96 | ||
c3373da9 SR |
97 | static inline void sbus_memcpy_fromio(void *dst, |
98 | const volatile void __iomem *src, | |
99 | __kernel_size_t n) | |
f11b478d JH |
100 | { |
101 | char *d = dst; | |
102 | ||
103 | while (n--) { | |
104 | char tmp = sbus_readb(src); | |
105 | *d++ = tmp; | |
106 | src++; | |
107 | } | |
108 | } | |
109 | ||
c3373da9 SR |
110 | static inline void sbus_memcpy_toio(volatile void __iomem *dst, |
111 | const void *src, | |
112 | __kernel_size_t n) | |
f11b478d JH |
113 | { |
114 | const char *s = src; | |
115 | volatile void __iomem *d = dst; | |
116 | ||
117 | while (n--) { | |
118 | char tmp = *s++; | |
119 | sbus_writeb(tmp, d); | |
120 | d++; | |
121 | } | |
122 | } | |
123 | ||
f5e706ad SR |
124 | #ifdef __KERNEL__ |
125 | ||
126 | /* | |
127 | * Bus number may be embedded in the higher bits of the physical address. | |
128 | * This is why we have no bus number argument to ioremap(). | |
129 | */ | |
f05a6865 | 130 | void __iomem *ioremap(unsigned long offset, unsigned long size); |
f5e706ad | 131 | #define ioremap_nocache(X,Y) ioremap((X),(Y)) |
428695b8 | 132 | #define ioremap_wc(X,Y) ioremap((X),(Y)) |
556269c1 | 133 | #define ioremap_wt(X,Y) ioremap((X),(Y)) |
f05a6865 | 134 | void iounmap(volatile void __iomem *addr); |
f5e706ad | 135 | |
f5e706ad | 136 | /* Create a virtual mapping cookie for an IO port range */ |
f05a6865 SR |
137 | void __iomem *ioport_map(unsigned long port, unsigned int nr); |
138 | void ioport_unmap(void __iomem *); | |
f5e706ad SR |
139 | |
140 | /* Create a virtual mapping cookie for a PCI BAR (memory or IO) */ | |
141 | struct pci_dev; | |
f05a6865 | 142 | void pci_iounmap(struct pci_dev *dev, void __iomem *); |
f5e706ad | 143 | |
63237eeb DM |
144 | static inline int sbus_can_dma_64bit(void) |
145 | { | |
146 | return 0; /* actually, sparc_cpu_model==sun4d */ | |
147 | } | |
148 | static inline int sbus_can_burst64(void) | |
149 | { | |
150 | return 0; /* actually, sparc_cpu_model==sun4d */ | |
151 | } | |
152 | struct device; | |
f05a6865 | 153 | void sbus_set_sbus64(struct device *, int); |
63237eeb | 154 | |
f5e706ad SR |
155 | #endif |
156 | ||
157 | #define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1 | |
158 | ||
f5e706ad SR |
159 | |
160 | #endif /* !(__SPARC_IO_H) */ |