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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
f5e706ad SR |
2 | /* |
3 | * bitops.h: Bit string operations on the Sparc. | |
4 | * | |
5 | * Copyright 1995 David S. Miller (davem@caip.rutgers.edu) | |
6 | * Copyright 1996 Eddie C. Dost (ecd@skynet.be) | |
7 | * Copyright 2001 Anton Blanchard (anton@samba.org) | |
8 | */ | |
9 | ||
10 | #ifndef _SPARC_BITOPS_H | |
11 | #define _SPARC_BITOPS_H | |
12 | ||
13 | #include <linux/compiler.h> | |
14 | #include <asm/byteorder.h> | |
15 | ||
16 | #ifdef __KERNEL__ | |
17 | ||
18 | #ifndef _LINUX_BITOPS_H | |
19 | #error only <linux/bitops.h> can be included directly | |
20 | #endif | |
21 | ||
f05a6865 SR |
22 | unsigned long ___set_bit(unsigned long *addr, unsigned long mask); |
23 | unsigned long ___clear_bit(unsigned long *addr, unsigned long mask); | |
24 | unsigned long ___change_bit(unsigned long *addr, unsigned long mask); | |
f5e706ad SR |
25 | |
26 | /* | |
27 | * Set bit 'nr' in 32-bit quantity at address 'addr' where bit '0' | |
28 | * is in the highest of the four bytes and bit '31' is the high bit | |
29 | * within the first byte. Sparc is BIG-Endian. Unless noted otherwise | |
30 | * all bit-ops return 0 if bit was previously clear and != 0 otherwise. | |
31 | */ | |
32 | static inline int test_and_set_bit(unsigned long nr, volatile unsigned long *addr) | |
33 | { | |
34 | unsigned long *ADDR, mask; | |
35 | ||
36 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
37 | mask = 1 << (nr & 31); | |
38 | ||
39 | return ___set_bit(ADDR, mask) != 0; | |
40 | } | |
41 | ||
42 | static inline void set_bit(unsigned long nr, volatile unsigned long *addr) | |
43 | { | |
44 | unsigned long *ADDR, mask; | |
45 | ||
46 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
47 | mask = 1 << (nr & 31); | |
48 | ||
49 | (void) ___set_bit(ADDR, mask); | |
50 | } | |
51 | ||
52 | static inline int test_and_clear_bit(unsigned long nr, volatile unsigned long *addr) | |
53 | { | |
54 | unsigned long *ADDR, mask; | |
55 | ||
56 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
57 | mask = 1 << (nr & 31); | |
58 | ||
59 | return ___clear_bit(ADDR, mask) != 0; | |
60 | } | |
61 | ||
62 | static inline void clear_bit(unsigned long nr, volatile unsigned long *addr) | |
63 | { | |
64 | unsigned long *ADDR, mask; | |
65 | ||
66 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
67 | mask = 1 << (nr & 31); | |
68 | ||
69 | (void) ___clear_bit(ADDR, mask); | |
70 | } | |
71 | ||
72 | static inline int test_and_change_bit(unsigned long nr, volatile unsigned long *addr) | |
73 | { | |
74 | unsigned long *ADDR, mask; | |
75 | ||
76 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
77 | mask = 1 << (nr & 31); | |
78 | ||
79 | return ___change_bit(ADDR, mask) != 0; | |
80 | } | |
81 | ||
82 | static inline void change_bit(unsigned long nr, volatile unsigned long *addr) | |
83 | { | |
84 | unsigned long *ADDR, mask; | |
85 | ||
86 | ADDR = ((unsigned long *) addr) + (nr >> 5); | |
87 | mask = 1 << (nr & 31); | |
88 | ||
89 | (void) ___change_bit(ADDR, mask); | |
90 | } | |
91 | ||
92 | #include <asm-generic/bitops/non-atomic.h> | |
93 | ||
f5e706ad SR |
94 | #include <asm-generic/bitops/ffz.h> |
95 | #include <asm-generic/bitops/__ffs.h> | |
96 | #include <asm-generic/bitops/sched.h> | |
97 | #include <asm-generic/bitops/ffs.h> | |
98 | #include <asm-generic/bitops/fls.h> | |
e8e8e80e | 99 | #include <asm-generic/bitops/__fls.h> |
f5e706ad SR |
100 | #include <asm-generic/bitops/fls64.h> |
101 | #include <asm-generic/bitops/hweight.h> | |
102 | #include <asm-generic/bitops/lock.h> | |
103 | #include <asm-generic/bitops/find.h> | |
861b5ae7 | 104 | #include <asm-generic/bitops/le.h> |
f5e706ad | 105 | #include <asm-generic/bitops/ext2-atomic.h> |
f5e706ad SR |
106 | |
107 | #endif /* __KERNEL__ */ | |
108 | ||
109 | #endif /* defined(_SPARC_BITOPS_H) */ |