[linux-block.git] / arch / sparc / include / asm / atomic_64.h

/* SPDX-License-Identifier: GPL-2.0 */
/* atomic.h: Thankfully the V9 is at least reasonable for this
 *           stuff.
 *
 * Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
 */

#ifndef __ARCH_SPARC64_ATOMIC__
#define __ARCH_SPARC64_ATOMIC__

#include <linux/types.h>
#include <asm/cmpxchg.h>
#include <asm/barrier.h>

#define ATOMIC_INIT(i)		{ (i) }
#define ATOMIC64_INIT(i)	{ (i) }

#define atomic_read(v)		READ_ONCE((v)->counter)
#define atomic64_read(v)	READ_ONCE((v)->counter)

#define atomic_set(v, i)	WRITE_ONCE(((v)->counter), (i))
#define atomic64_set(v, i)	WRITE_ONCE(((v)->counter), (i))

#define ATOMIC_OP(op)							\
void atomic_##op(int, atomic_t *);					\
void atomic64_##op(long, atomic64_t *);

#define ATOMIC_OP_RETURN(op)						\
int atomic_##op##_return(int, atomic_t *);				\
long atomic64_##op##_return(long, atomic64_t *);

#define ATOMIC_FETCH_OP(op)						\
int atomic_fetch_##op(int, atomic_t *);					\
long atomic64_fetch_##op(long, atomic64_t *);

#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)

ATOMIC_OPS(add)
ATOMIC_OPS(sub)

#undef ATOMIC_OPS
#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)

ATOMIC_OPS(and)
ATOMIC_OPS(or)
ATOMIC_OPS(xor)

#undef ATOMIC_OPS
#undef ATOMIC_FETCH_OP
#undef ATOMIC_OP_RETURN
#undef ATOMIC_OP

#define atomic_dec_return(v)   atomic_sub_return(1, v)
#define atomic64_dec_return(v) atomic64_sub_return(1, v)

#define atomic_inc_return(v)   atomic_add_return(1, v)
#define atomic64_inc_return(v) atomic64_add_return(1, v)

/*
 * atomic_inc_and_test - increment and test
 * @v: pointer of type atomic_t
 *
 * Atomically increments @v by 1
 * and returns true if the result is zero, or false for all
 * other cases.
 */
#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)

#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
#define atomic64_sub_and_test(i, v) (atomic64_sub_return(i, v) == 0)

#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
#define atomic64_dec_and_test(v) (atomic64_sub_return(1, v) == 0)

#define atomic_inc(v) atomic_add(1, v)
#define atomic64_inc(v) atomic64_add(1, v)

#define atomic_dec(v) atomic_sub(1, v)
#define atomic64_dec(v) atomic64_sub(1, v)

#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
#define atomic64_add_negative(i, v) (atomic64_add_return(i, v) < 0)

#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))

static inline int __atomic_add_unless(atomic_t *v, int a, int u)
{
	int c, old;
	c = atomic_read(v);
	for (;;) {
		if (unlikely(c == (u)))
			break;
		old = atomic_cmpxchg((v), c, c + (a));
		if (likely(old == c))
			break;
		c = old;
	}
	return c;
}

#define atomic64_cmpxchg(v, o, n) \
	((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))

static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
{
	long c, old;
	c = atomic64_read(v);
	for (;;) {
		if (unlikely(c == (u)))
			break;
		old = atomic64_cmpxchg((v), c, c + (a));
		if (likely(old == c))
			break;
		c = old;
	}
	return c != (u);
}

#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)

long atomic64_dec_if_positive(atomic64_t *v);

#endif /* !(__ARCH_SPARC64_ATOMIC__) */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
f5e706ad SR	2	/* atomic.h: Thankfully the V9 is at least reasonable for this
	3	* stuff.
	4	*
193d2aad	5	* Copyright (C) 1996, 1997, 2000, 2012 David S. Miller (davem@redhat.com)
f5e706ad SR	6	*/
	7
	8	#ifndef __ARCH_SPARC64_ATOMIC__
	9	#define __ARCH_SPARC64_ATOMIC__
	10
	11	#include <linux/types.h>
d550bbd4	12	#include <asm/cmpxchg.h>
56d36489	13	#include <asm/barrier.h>
f5e706ad	14
f5e706ad SR	15	#define ATOMIC_INIT(i) { (i) }
	16	#define ATOMIC64_INIT(i) { (i) }
	17
62e8a325 PZ	18	#define atomic_read(v) READ_ONCE((v)->counter)
62e8a325 PZ	19	#define atomic64_read(v) READ_ONCE((v)->counter)
f5e706ad	20
62e8a325 PZ	21	#define atomic_set(v, i) WRITE_ONCE(((v)->counter), (i))
62e8a325 PZ	22	#define atomic64_set(v, i) WRITE_ONCE(((v)->counter), (i))
f5e706ad	23
4f3316c2 PZ	24	#define ATOMIC_OP(op) \
	25	void atomic_##op(int, atomic_t *); \
	26	void atomic64_##op(long, atomic64_t *);
f5e706ad	27
4f3316c2 PZ	28	#define ATOMIC_OP_RETURN(op) \
	29	int atomic_##op##_return(int, atomic_t *); \
	30	long atomic64_##op##_return(long, atomic64_t *);
f5e706ad	31
3a1adb23 PZ	32	#define ATOMIC_FETCH_OP(op) \
	33	int atomic_fetch_##op(int, atomic_t *); \
	34	long atomic64_fetch_##op(long, atomic64_t *);
	35
	36	#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_OP_RETURN(op) ATOMIC_FETCH_OP(op)
f5e706ad	37
4f3316c2 PZ	38	ATOMIC_OPS(add)
4f3316c2 PZ	39	ATOMIC_OPS(sub)
f5e706ad	40
3a1adb23 PZ	41	#undef ATOMIC_OPS
	42	#define ATOMIC_OPS(op) ATOMIC_OP(op) ATOMIC_FETCH_OP(op)
	43
	44	ATOMIC_OPS(and)
	45	ATOMIC_OPS(or)
	46	ATOMIC_OPS(xor)
304a0d69	47
4f3316c2	48	#undef ATOMIC_OPS
3a1adb23	49	#undef ATOMIC_FETCH_OP
4f3316c2 PZ	50	#undef ATOMIC_OP_RETURN
4f3316c2 PZ	51	#undef ATOMIC_OP
f5e706ad	52
4f3316c2 PZ	53	#define atomic_dec_return(v) atomic_sub_return(1, v)
	54	#define atomic64_dec_return(v) atomic64_sub_return(1, v)
	55
	56	#define atomic_inc_return(v) atomic_add_return(1, v)
	57	#define atomic64_inc_return(v) atomic64_add_return(1, v)
f5e706ad SR	58
	59	/*
	60	* atomic_inc_and_test - increment and test
	61	* @v: pointer of type atomic_t
	62	*
	63	* Atomically increments @v by 1
	64	* and returns true if the result is zero, or false for all
	65	* other cases.
	66	*/
	67	#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
	68	#define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0)
	69
4f3316c2 PZ	70	#define atomic_sub_and_test(i, v) (atomic_sub_return(i, v) == 0)
4f3316c2 PZ	71	#define atomic64_sub_and_test(i, v) (atomic64_sub_return(i, v) == 0)
f5e706ad	72
4f3316c2 PZ	73	#define atomic_dec_and_test(v) (atomic_sub_return(1, v) == 0)
4f3316c2 PZ	74	#define atomic64_dec_and_test(v) (atomic64_sub_return(1, v) == 0)
f5e706ad SR	75
	76	#define atomic_inc(v) atomic_add(1, v)
	77	#define atomic64_inc(v) atomic64_add(1, v)
	78
	79	#define atomic_dec(v) atomic_sub(1, v)
	80	#define atomic64_dec(v) atomic64_sub(1, v)
	81
4f3316c2 PZ	82	#define atomic_add_negative(i, v) (atomic_add_return(i, v) < 0)
4f3316c2 PZ	83	#define atomic64_add_negative(i, v) (atomic64_add_return(i, v) < 0)
f5e706ad SR	84
	85	#define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n)))
	86	#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
	87
f24219b4	88	static inline int __atomic_add_unless(atomic_t *v, int a, int u)
f5e706ad SR	89	{
	90	int c, old;
	91	c = atomic_read(v);
	92	for (;;) {
	93	if (unlikely(c == (u)))
	94	break;
	95	old = atomic_cmpxchg((v), c, c + (a));
	96	if (likely(old == c))
	97	break;
	98	c = old;
	99	}
f24219b4	100	return c;
f5e706ad SR	101	}
f5e706ad SR	102
f5e706ad SR	103	#define atomic64_cmpxchg(v, o, n) \
	104	((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n)))
	105	#define atomic64_xchg(v, new) (xchg(&((v)->counter), new))
	106
86fa04b8	107	static inline long atomic64_add_unless(atomic64_t *v, long a, long u)
f5e706ad SR	108	{
	109	long c, old;
	110	c = atomic64_read(v);
	111	for (;;) {
	112	if (unlikely(c == (u)))
	113	break;
	114	old = atomic64_cmpxchg((v), c, c + (a));
	115	if (likely(old == c))
	116	break;
	117	c = old;
	118	}
	119	return c != (u);
	120	}
	121
	122	#define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0)
	123
f05a6865	124	long atomic64_dec_if_positive(atomic64_t *v);
193d2aad	125
f5e706ad	126	#endif /* !(__ARCH_SPARC64_ATOMIC__) */