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f5e706ad SR |
1 | /* atomic.h: Thankfully the V9 is at least reasonable for this |
2 | * stuff. | |
3 | * | |
4 | * Copyright (C) 1996, 1997, 2000 David S. Miller (davem@redhat.com) | |
5 | */ | |
6 | ||
7 | #ifndef __ARCH_SPARC64_ATOMIC__ | |
8 | #define __ARCH_SPARC64_ATOMIC__ | |
9 | ||
10 | #include <linux/types.h> | |
d550bbd4 | 11 | #include <asm/cmpxchg.h> |
f5e706ad | 12 | |
f5e706ad SR |
13 | #define ATOMIC_INIT(i) { (i) } |
14 | #define ATOMIC64_INIT(i) { (i) } | |
15 | ||
f3d46f9d AB |
16 | #define atomic_read(v) (*(volatile int *)&(v)->counter) |
17 | #define atomic64_read(v) (*(volatile long *)&(v)->counter) | |
f5e706ad SR |
18 | |
19 | #define atomic_set(v, i) (((v)->counter) = i) | |
20 | #define atomic64_set(v, i) (((v)->counter) = i) | |
21 | ||
22 | extern void atomic_add(int, atomic_t *); | |
b10f997b | 23 | extern void atomic64_add(long, atomic64_t *); |
f5e706ad | 24 | extern void atomic_sub(int, atomic_t *); |
b10f997b | 25 | extern void atomic64_sub(long, atomic64_t *); |
f5e706ad SR |
26 | |
27 | extern int atomic_add_ret(int, atomic_t *); | |
b10f997b | 28 | extern long atomic64_add_ret(long, atomic64_t *); |
f5e706ad | 29 | extern int atomic_sub_ret(int, atomic_t *); |
b10f997b | 30 | extern long atomic64_sub_ret(long, atomic64_t *); |
f5e706ad SR |
31 | |
32 | #define atomic_dec_return(v) atomic_sub_ret(1, v) | |
33 | #define atomic64_dec_return(v) atomic64_sub_ret(1, v) | |
34 | ||
35 | #define atomic_inc_return(v) atomic_add_ret(1, v) | |
36 | #define atomic64_inc_return(v) atomic64_add_ret(1, v) | |
37 | ||
38 | #define atomic_sub_return(i, v) atomic_sub_ret(i, v) | |
39 | #define atomic64_sub_return(i, v) atomic64_sub_ret(i, v) | |
40 | ||
41 | #define atomic_add_return(i, v) atomic_add_ret(i, v) | |
42 | #define atomic64_add_return(i, v) atomic64_add_ret(i, v) | |
43 | ||
44 | /* | |
45 | * atomic_inc_and_test - increment and test | |
46 | * @v: pointer of type atomic_t | |
47 | * | |
48 | * Atomically increments @v by 1 | |
49 | * and returns true if the result is zero, or false for all | |
50 | * other cases. | |
51 | */ | |
52 | #define atomic_inc_and_test(v) (atomic_inc_return(v) == 0) | |
53 | #define atomic64_inc_and_test(v) (atomic64_inc_return(v) == 0) | |
54 | ||
55 | #define atomic_sub_and_test(i, v) (atomic_sub_ret(i, v) == 0) | |
56 | #define atomic64_sub_and_test(i, v) (atomic64_sub_ret(i, v) == 0) | |
57 | ||
58 | #define atomic_dec_and_test(v) (atomic_sub_ret(1, v) == 0) | |
59 | #define atomic64_dec_and_test(v) (atomic64_sub_ret(1, v) == 0) | |
60 | ||
61 | #define atomic_inc(v) atomic_add(1, v) | |
62 | #define atomic64_inc(v) atomic64_add(1, v) | |
63 | ||
64 | #define atomic_dec(v) atomic_sub(1, v) | |
65 | #define atomic64_dec(v) atomic64_sub(1, v) | |
66 | ||
67 | #define atomic_add_negative(i, v) (atomic_add_ret(i, v) < 0) | |
68 | #define atomic64_add_negative(i, v) (atomic64_add_ret(i, v) < 0) | |
69 | ||
70 | #define atomic_cmpxchg(v, o, n) (cmpxchg(&((v)->counter), (o), (n))) | |
71 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | |
72 | ||
f24219b4 | 73 | static inline int __atomic_add_unless(atomic_t *v, int a, int u) |
f5e706ad SR |
74 | { |
75 | int c, old; | |
76 | c = atomic_read(v); | |
77 | for (;;) { | |
78 | if (unlikely(c == (u))) | |
79 | break; | |
80 | old = atomic_cmpxchg((v), c, c + (a)); | |
81 | if (likely(old == c)) | |
82 | break; | |
83 | c = old; | |
84 | } | |
f24219b4 | 85 | return c; |
f5e706ad SR |
86 | } |
87 | ||
f5e706ad SR |
88 | #define atomic64_cmpxchg(v, o, n) \ |
89 | ((__typeof__((v)->counter))cmpxchg(&((v)->counter), (o), (n))) | |
90 | #define atomic64_xchg(v, new) (xchg(&((v)->counter), new)) | |
91 | ||
86fa04b8 | 92 | static inline long atomic64_add_unless(atomic64_t *v, long a, long u) |
f5e706ad SR |
93 | { |
94 | long c, old; | |
95 | c = atomic64_read(v); | |
96 | for (;;) { | |
97 | if (unlikely(c == (u))) | |
98 | break; | |
99 | old = atomic64_cmpxchg((v), c, c + (a)); | |
100 | if (likely(old == c)) | |
101 | break; | |
102 | c = old; | |
103 | } | |
104 | return c != (u); | |
105 | } | |
106 | ||
107 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) | |
108 | ||
109 | /* Atomic operations are already serializing */ | |
f5e706ad SR |
110 | #define smp_mb__before_atomic_dec() barrier() |
111 | #define smp_mb__after_atomic_dec() barrier() | |
112 | #define smp_mb__before_atomic_inc() barrier() | |
113 | #define smp_mb__after_atomic_inc() barrier() | |
f5e706ad | 114 | |
f5e706ad | 115 | #endif /* !(__ARCH_SPARC64_ATOMIC__) */ |