Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * arch/sh/kernel/smp.c | |
3 | * | |
4 | * SMP support for the SuperH processors. | |
5 | * | |
aba1030a PM |
6 | * Copyright (C) 2002 - 2007 Paul Mundt |
7 | * Copyright (C) 2006 - 2007 Akio Idehara | |
1da177e4 | 8 | * |
aba1030a PM |
9 | * This file is subject to the terms and conditions of the GNU General Public |
10 | * License. See the file "COPYING" in the main directory of this archive | |
11 | * for more details. | |
1da177e4 | 12 | */ |
66c5227e | 13 | #include <linux/err.h> |
1da177e4 LT |
14 | #include <linux/cache.h> |
15 | #include <linux/cpumask.h> | |
16 | #include <linux/delay.h> | |
17 | #include <linux/init.h> | |
1da177e4 | 18 | #include <linux/spinlock.h> |
aba1030a | 19 | #include <linux/mm.h> |
1da177e4 | 20 | #include <linux/module.h> |
aba1030a | 21 | #include <linux/interrupt.h> |
1da177e4 LT |
22 | #include <asm/atomic.h> |
23 | #include <asm/processor.h> | |
24 | #include <asm/system.h> | |
25 | #include <asm/mmu_context.h> | |
26 | #include <asm/smp.h> | |
aba1030a PM |
27 | #include <asm/cacheflush.h> |
28 | #include <asm/sections.h> | |
1da177e4 | 29 | |
aba1030a PM |
30 | int __cpu_number_map[NR_CPUS]; /* Map physical to logical */ |
31 | int __cpu_logical_map[NR_CPUS]; /* Map logical to physical */ | |
1da177e4 LT |
32 | |
33 | cpumask_t cpu_possible_map; | |
c8923c6b DM |
34 | EXPORT_SYMBOL(cpu_possible_map); |
35 | ||
1da177e4 | 36 | cpumask_t cpu_online_map; |
e16b38f7 | 37 | EXPORT_SYMBOL(cpu_online_map); |
1da177e4 | 38 | |
1da177e4 LT |
39 | static inline void __init smp_store_cpu_info(unsigned int cpu) |
40 | { | |
aba1030a PM |
41 | struct sh_cpuinfo *c = cpu_data + cpu; |
42 | ||
43 | c->loops_per_jiffy = loops_per_jiffy; | |
1da177e4 LT |
44 | } |
45 | ||
46 | void __init smp_prepare_cpus(unsigned int max_cpus) | |
47 | { | |
48 | unsigned int cpu = smp_processor_id(); | |
1da177e4 | 49 | |
aba1030a PM |
50 | init_new_context(current, &init_mm); |
51 | current_thread_info()->cpu = cpu; | |
52 | plat_prepare_cpus(max_cpus); | |
53 | ||
54 | #ifndef CONFIG_HOTPLUG_CPU | |
55 | cpu_present_map = cpu_possible_map; | |
56 | #endif | |
1da177e4 LT |
57 | } |
58 | ||
59 | void __devinit smp_prepare_boot_cpu(void) | |
60 | { | |
61 | unsigned int cpu = smp_processor_id(); | |
62 | ||
aba1030a PM |
63 | __cpu_number_map[0] = cpu; |
64 | __cpu_logical_map[0] = cpu; | |
65 | ||
1da177e4 LT |
66 | cpu_set(cpu, cpu_online_map); |
67 | cpu_set(cpu, cpu_possible_map); | |
68 | } | |
69 | ||
aba1030a | 70 | asmlinkage void __cpuinit start_secondary(void) |
1da177e4 | 71 | { |
aba1030a PM |
72 | unsigned int cpu; |
73 | struct mm_struct *mm = &init_mm; | |
1da177e4 | 74 | |
aba1030a PM |
75 | atomic_inc(&mm->mm_count); |
76 | atomic_inc(&mm->mm_users); | |
77 | current->active_mm = mm; | |
78 | BUG_ON(current->mm); | |
79 | enter_lazy_tlb(mm, current); | |
80 | ||
81 | per_cpu_trap_init(); | |
82 | ||
83 | preempt_disable(); | |
84 | ||
85 | local_irq_enable(); | |
1da177e4 | 86 | |
aba1030a PM |
87 | calibrate_delay(); |
88 | ||
89 | cpu = smp_processor_id(); | |
90 | smp_store_cpu_info(cpu); | |
1da177e4 LT |
91 | |
92 | cpu_set(cpu, cpu_online_map); | |
93 | ||
aba1030a | 94 | cpu_idle(); |
1da177e4 LT |
95 | } |
96 | ||
aba1030a PM |
97 | extern struct { |
98 | unsigned long sp; | |
99 | unsigned long bss_start; | |
100 | unsigned long bss_end; | |
101 | void *start_kernel_fn; | |
102 | void *cpu_init_fn; | |
103 | void *thread_info; | |
104 | } stack_start; | |
105 | ||
106 | int __cpuinit __cpu_up(unsigned int cpu) | |
1da177e4 | 107 | { |
aba1030a PM |
108 | struct task_struct *tsk; |
109 | unsigned long timeout; | |
5bfb5d69 | 110 | |
aba1030a PM |
111 | tsk = fork_idle(cpu); |
112 | if (IS_ERR(tsk)) { | |
113 | printk(KERN_ERR "Failed forking idle task for cpu %d\n", cpu); | |
114 | return PTR_ERR(tsk); | |
115 | } | |
1da177e4 | 116 | |
aba1030a PM |
117 | /* Fill in data in head.S for secondary cpus */ |
118 | stack_start.sp = tsk->thread.sp; | |
119 | stack_start.thread_info = tsk->stack; | |
120 | stack_start.bss_start = 0; /* don't clear bss for secondary cpus */ | |
121 | stack_start.start_kernel_fn = start_secondary; | |
1da177e4 | 122 | |
aba1030a | 123 | flush_cache_all(); |
1da177e4 | 124 | |
aba1030a | 125 | plat_start_cpu(cpu, (unsigned long)_stext); |
1da177e4 | 126 | |
aba1030a PM |
127 | timeout = jiffies + HZ; |
128 | while (time_before(jiffies, timeout)) { | |
129 | if (cpu_online(cpu)) | |
130 | break; | |
131 | ||
132 | udelay(10); | |
133 | } | |
134 | ||
135 | if (cpu_online(cpu)) | |
136 | return 0; | |
137 | ||
138 | return -ENOENT; | |
1da177e4 LT |
139 | } |
140 | ||
141 | void __init smp_cpus_done(unsigned int max_cpus) | |
142 | { | |
aba1030a PM |
143 | unsigned long bogosum = 0; |
144 | int cpu; | |
145 | ||
146 | for_each_online_cpu(cpu) | |
147 | bogosum += cpu_data[cpu].loops_per_jiffy; | |
148 | ||
149 | printk(KERN_INFO "SMP: Total of %d processors activated " | |
150 | "(%lu.%02lu BogoMIPS).\n", num_online_cpus(), | |
151 | bogosum / (500000/HZ), | |
152 | (bogosum / (5000/HZ)) % 100); | |
1da177e4 LT |
153 | } |
154 | ||
155 | void smp_send_reschedule(int cpu) | |
156 | { | |
aba1030a | 157 | plat_send_ipi(cpu, SMP_MSG_RESCHEDULE); |
1da177e4 LT |
158 | } |
159 | ||
160 | static void stop_this_cpu(void *unused) | |
161 | { | |
162 | cpu_clear(smp_processor_id(), cpu_online_map); | |
163 | local_irq_disable(); | |
164 | ||
165 | for (;;) | |
166 | cpu_relax(); | |
167 | } | |
168 | ||
169 | void smp_send_stop(void) | |
170 | { | |
8691e5a8 | 171 | smp_call_function(stop_this_cpu, 0, 0); |
1da177e4 LT |
172 | } |
173 | ||
490f5de5 | 174 | void arch_send_call_function_ipi(cpumask_t mask) |
1da177e4 | 175 | { |
490f5de5 | 176 | int cpu; |
1da177e4 | 177 | |
490f5de5 JA |
178 | for_each_cpu_mask(cpu, mask) |
179 | plat_send_ipi(cpu, SMP_MSG_FUNCTION); | |
180 | } | |
1da177e4 | 181 | |
490f5de5 JA |
182 | void arch_send_call_function_single_ipi(int cpu) |
183 | { | |
184 | plat_send_ipi(cpu, SMP_MSG_FUNCTION_SINGLE); | |
1da177e4 LT |
185 | } |
186 | ||
187 | /* Not really SMP stuff ... */ | |
188 | int setup_profiling_timer(unsigned int multiplier) | |
189 | { | |
190 | return 0; | |
191 | } | |
192 | ||
9964fa8b PM |
193 | static void flush_tlb_all_ipi(void *info) |
194 | { | |
195 | local_flush_tlb_all(); | |
196 | } | |
197 | ||
198 | void flush_tlb_all(void) | |
199 | { | |
15c8b6c1 | 200 | on_each_cpu(flush_tlb_all_ipi, 0, 1); |
9964fa8b PM |
201 | } |
202 | ||
203 | static void flush_tlb_mm_ipi(void *mm) | |
204 | { | |
205 | local_flush_tlb_mm((struct mm_struct *)mm); | |
206 | } | |
207 | ||
208 | /* | |
209 | * The following tlb flush calls are invoked when old translations are | |
210 | * being torn down, or pte attributes are changing. For single threaded | |
211 | * address spaces, a new context is obtained on the current cpu, and tlb | |
212 | * context on other cpus are invalidated to force a new context allocation | |
213 | * at switch_mm time, should the mm ever be used on other cpus. For | |
214 | * multithreaded address spaces, intercpu interrupts have to be sent. | |
215 | * Another case where intercpu interrupts are required is when the target | |
216 | * mm might be active on another cpu (eg debuggers doing the flushes on | |
217 | * behalf of debugees, kswapd stealing pages from another process etc). | |
218 | * Kanoj 07/00. | |
219 | */ | |
220 | ||
221 | void flush_tlb_mm(struct mm_struct *mm) | |
222 | { | |
223 | preempt_disable(); | |
224 | ||
225 | if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { | |
8691e5a8 | 226 | smp_call_function(flush_tlb_mm_ipi, (void *)mm, 1); |
9964fa8b PM |
227 | } else { |
228 | int i; | |
229 | for (i = 0; i < num_online_cpus(); i++) | |
230 | if (smp_processor_id() != i) | |
231 | cpu_context(i, mm) = 0; | |
232 | } | |
233 | local_flush_tlb_mm(mm); | |
234 | ||
235 | preempt_enable(); | |
236 | } | |
237 | ||
238 | struct flush_tlb_data { | |
239 | struct vm_area_struct *vma; | |
240 | unsigned long addr1; | |
241 | unsigned long addr2; | |
242 | }; | |
243 | ||
244 | static void flush_tlb_range_ipi(void *info) | |
245 | { | |
246 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
247 | ||
248 | local_flush_tlb_range(fd->vma, fd->addr1, fd->addr2); | |
249 | } | |
250 | ||
251 | void flush_tlb_range(struct vm_area_struct *vma, | |
252 | unsigned long start, unsigned long end) | |
253 | { | |
254 | struct mm_struct *mm = vma->vm_mm; | |
255 | ||
256 | preempt_disable(); | |
257 | if ((atomic_read(&mm->mm_users) != 1) || (current->mm != mm)) { | |
258 | struct flush_tlb_data fd; | |
259 | ||
260 | fd.vma = vma; | |
261 | fd.addr1 = start; | |
262 | fd.addr2 = end; | |
8691e5a8 | 263 | smp_call_function(flush_tlb_range_ipi, (void *)&fd, 1); |
9964fa8b PM |
264 | } else { |
265 | int i; | |
266 | for (i = 0; i < num_online_cpus(); i++) | |
267 | if (smp_processor_id() != i) | |
268 | cpu_context(i, mm) = 0; | |
269 | } | |
270 | local_flush_tlb_range(vma, start, end); | |
271 | preempt_enable(); | |
272 | } | |
273 | ||
274 | static void flush_tlb_kernel_range_ipi(void *info) | |
275 | { | |
276 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
277 | ||
278 | local_flush_tlb_kernel_range(fd->addr1, fd->addr2); | |
279 | } | |
280 | ||
281 | void flush_tlb_kernel_range(unsigned long start, unsigned long end) | |
282 | { | |
283 | struct flush_tlb_data fd; | |
284 | ||
285 | fd.addr1 = start; | |
286 | fd.addr2 = end; | |
15c8b6c1 | 287 | on_each_cpu(flush_tlb_kernel_range_ipi, (void *)&fd, 1); |
9964fa8b PM |
288 | } |
289 | ||
290 | static void flush_tlb_page_ipi(void *info) | |
291 | { | |
292 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
293 | ||
294 | local_flush_tlb_page(fd->vma, fd->addr1); | |
295 | } | |
296 | ||
297 | void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) | |
298 | { | |
299 | preempt_disable(); | |
300 | if ((atomic_read(&vma->vm_mm->mm_users) != 1) || | |
301 | (current->mm != vma->vm_mm)) { | |
302 | struct flush_tlb_data fd; | |
303 | ||
304 | fd.vma = vma; | |
305 | fd.addr1 = page; | |
8691e5a8 | 306 | smp_call_function(flush_tlb_page_ipi, (void *)&fd, 1); |
9964fa8b PM |
307 | } else { |
308 | int i; | |
309 | for (i = 0; i < num_online_cpus(); i++) | |
310 | if (smp_processor_id() != i) | |
311 | cpu_context(i, vma->vm_mm) = 0; | |
312 | } | |
313 | local_flush_tlb_page(vma, page); | |
314 | preempt_enable(); | |
315 | } | |
316 | ||
317 | static void flush_tlb_one_ipi(void *info) | |
318 | { | |
319 | struct flush_tlb_data *fd = (struct flush_tlb_data *)info; | |
320 | local_flush_tlb_one(fd->addr1, fd->addr2); | |
321 | } | |
322 | ||
323 | void flush_tlb_one(unsigned long asid, unsigned long vaddr) | |
324 | { | |
325 | struct flush_tlb_data fd; | |
326 | ||
327 | fd.addr1 = asid; | |
328 | fd.addr2 = vaddr; | |
329 | ||
8691e5a8 | 330 | smp_call_function(flush_tlb_one_ipi, (void *)&fd, 1); |
9964fa8b PM |
331 | local_flush_tlb_one(asid, vaddr); |
332 | } |