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5283ecb5 PM |
1 | /* |
2 | * Author: Ian DaSilva (idasilva@mvista.com) | |
3 | * | |
4 | * Highly leveraged from pci-bigsur.c, written by Dustin McIntire. | |
5 | * | |
6 | * May be copied or modified under the terms of the GNU General Public | |
7 | * License. See linux/COPYING for more information. | |
8 | * | |
9 | * PCI initialization for the Renesas SH7780 Highlander R7780RP-1 board | |
10 | */ | |
5283ecb5 PM |
11 | #include <linux/kernel.h> |
12 | #include <linux/types.h> | |
13 | #include <linux/init.h> | |
14 | #include <linux/delay.h> | |
15 | #include <linux/pci.h> | |
082c44d2 | 16 | #include <asm/r7780rp.h> |
959f85f8 PM |
17 | #include <asm/io.h> |
18 | #include "pci-sh4.h" | |
5283ecb5 | 19 | |
32351a28 PM |
20 | static char r7780rp_irq_tab[] __initdata = { |
21 | 0, 1, 2, 3, | |
22 | }; | |
23 | ||
24 | static char r7780mp_irq_tab[] __initdata = { | |
25 | 65, 66, 67, 68, | |
26 | }; | |
27 | ||
959f85f8 | 28 | int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) |
5283ecb5 | 29 | { |
32351a28 PM |
30 | if (mach_is_r7780rp()) |
31 | return r7780rp_irq_tab[slot]; | |
39374aad | 32 | if (mach_is_r7780mp() || mach_is_r7785rp()) |
32351a28 | 33 | return r7780mp_irq_tab[slot]; |
32351a28 PM |
34 | |
35 | printk(KERN_ERR "PCI: Bad IRQ mapping " | |
36 | "request for slot %d, func %d\n", slot, pin-1); | |
37 | ||
38 | return -1; | |
5283ecb5 PM |
39 | } |
40 | ||
41 | static struct resource sh7780_io_resource = { | |
42 | .name = "SH7780_IO", | |
b0d98dc5 NI |
43 | .start = SH7780_PCI_IO_BASE, |
44 | .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1, | |
5283ecb5 PM |
45 | .flags = IORESOURCE_IO |
46 | }; | |
47 | ||
48 | static struct resource sh7780_mem_resource = { | |
49 | .name = "SH7780_mem", | |
50 | .start = SH7780_PCI_MEMORY_BASE, | |
51 | .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1, | |
52 | .flags = IORESOURCE_MEM | |
53 | }; | |
54 | ||
55 | extern struct pci_ops sh7780_pci_ops; | |
56 | ||
57 | struct pci_channel board_pci_channels[] = { | |
959f85f8 | 58 | { &sh4_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff }, |
5283ecb5 PM |
59 | { NULL, NULL, NULL, 0, 0 }, |
60 | }; | |
61 | EXPORT_SYMBOL(board_pci_channels); | |
62 | ||
959f85f8 | 63 | static struct sh4_pci_address_map sh7780_pci_map = { |
5283ecb5 PM |
64 | .window0 = { |
65 | .base = SH7780_CS2_BASE_ADDR, | |
66 | .size = 0x04000000, | |
67 | }, | |
68 | ||
69 | .window1 = { | |
70 | .base = SH7780_CS3_BASE_ADDR, | |
71 | .size = 0x04000000, | |
72 | }, | |
73 | ||
959f85f8 | 74 | .flags = SH4_PCIC_NO_RESET, |
5283ecb5 PM |
75 | }; |
76 | ||
77 | int __init pcibios_init_platform(void) | |
78 | { | |
79 | return sh7780_pcic_init(&sh7780_pci_map); | |
80 | } |