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aaf9128a | 1 | // SPDX-License-Identifier: GPL-2.0 |
4138b740 KM |
2 | /* |
3 | * Copyright (C) 2009 Renesas Solutions Corp. | |
4 | * | |
5 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | |
4138b740 | 6 | */ |
c2f9b05f JM |
7 | #include <asm/clock.h> |
8 | #include <asm/heartbeat.h> | |
9 | #include <asm/suspend.h> | |
10 | #include <cpu/sh7724.h> | |
11 | #include <linux/delay.h> | |
4138b740 | 12 | #include <linux/device.h> |
c2f9b05f JM |
13 | #include <linux/i2c.h> |
14 | #include <linux/io.h> | |
15 | #include <linux/init.h> | |
16 | #include <linux/input.h> | |
17 | #include <linux/input/sh_keysc.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/memblock.h> | |
1238c684 | 20 | #include <linux/mmc/host.h> |
13acb62c | 21 | #include <linux/platform_data/sh_mmcif.h> |
4138b740 KM |
22 | #include <linux/mtd/physmap.h> |
23 | #include <linux/gpio.h> | |
c2f9b05f JM |
24 | #include <linux/gpio/machine.h> |
25 | #include <linux/platform_data/gpio_backlight.h> | |
70b46487 | 26 | #include <linux/platform_data/tmio.h> |
c2f9b05f JM |
27 | #include <linux/platform_data/tsc2007.h> |
28 | #include <linux/platform_device.h> | |
d4c191df GL |
29 | #include <linux/regulator/fixed.h> |
30 | #include <linux/regulator/machine.h> | |
cf8e56bf | 31 | #include <linux/sh_eth.h> |
9307d115 | 32 | #include <linux/sh_intc.h> |
c2f9b05f JM |
33 | #include <linux/spi/mmc_spi.h> |
34 | #include <linux/spi/sh_msiof.h> | |
35 | #include <linux/spi/spi.h> | |
36 | #include <linux/usb/r8a66597.h> | |
37 | #include <linux/usb/renesas_usbhs.h> | |
a1ad8033 | 38 | #include <linux/videodev2.h> |
0a0f0d8b | 39 | #include <linux/dma-map-ops.h> |
c2f9b05f JM |
40 | |
41 | #include <media/drv-intf/renesas-ceu.h> | |
42 | #include <media/i2c/mt9t112.h> | |
43 | #include <media/i2c/tw9910.h> | |
44 | ||
1980fdc4 | 45 | #include <sound/sh_fsi.h> |
064bfada | 46 | #include <sound/simple_card.h> |
c2f9b05f JM |
47 | |
48 | #include <video/sh_mobile_lcdc.h> | |
4138b740 KM |
49 | |
50 | /* | |
b7056bc1 KM |
51 | * Address Interface BusWidth |
52 | *----------------------------------------- | |
53 | * 0x0000_0000 uboot 16bit | |
54 | * 0x0004_0000 Linux romImage 16bit | |
55 | * 0x0014_0000 MTD for Linux 16bit | |
56 | * 0x0400_0000 Internal I/O 16/32bit | |
57 | * 0x0800_0000 DRAM 32bit | |
58 | * 0x1800_0000 MFI 16bit | |
4138b740 KM |
59 | */ |
60 | ||
9c472c4d KM |
61 | /* SWITCH |
62 | *------------------------------ | |
63 | * DS2[1] = FlashROM write protect ON : write protect | |
64 | * OFF : No write protect | |
65 | * DS2[2] = RMII / TS, SCIF ON : RMII | |
66 | * OFF : TS, SCIF3 | |
67 | * DS2[3] = Camera / Video ON : Camera | |
68 | * OFF : NTSC/PAL (IN) | |
69 | * DS2[5] = NTSC_OUT Clock ON : On board OSC | |
70 | * OFF : SH7724 DV_CLK | |
71 | * DS2[6-7] = MMC / SD ON-OFF : SD | |
72 | * OFF-ON : MMC | |
73 | */ | |
74 | ||
035688d9 KM |
75 | /* |
76 | * FSI - DA7210 | |
77 | * | |
78 | * it needs amixer settings for playing | |
79 | * | |
80 | * amixer set 'HeadPhone' 80 | |
81 | * amixer set 'Out Mixer Left DAC Left' on | |
82 | * amixer set 'Out Mixer Right DAC Right' on | |
83 | */ | |
84 | ||
c2f9b05f JM |
85 | #define CEU_BUFFER_MEMORY_SIZE (4 << 20) |
86 | static phys_addr_t ceu0_dma_membase; | |
87 | static phys_addr_t ceu1_dma_membase; | |
88 | ||
4138b740 KM |
89 | /* Heartbeat */ |
90 | static unsigned char led_pos[] = { 0, 1, 2, 3 }; | |
a09d2831 | 91 | |
4138b740 | 92 | static struct heartbeat_data heartbeat_data = { |
4138b740 KM |
93 | .nr_bits = 4, |
94 | .bit_pos = led_pos, | |
95 | }; | |
96 | ||
a09d2831 PM |
97 | static struct resource heartbeat_resource = { |
98 | .start = 0xA405012C, /* PTG */ | |
99 | .end = 0xA405012E - 1, | |
100 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, | |
4138b740 KM |
101 | }; |
102 | ||
103 | static struct platform_device heartbeat_device = { | |
104 | .name = "heartbeat", | |
105 | .id = -1, | |
106 | .dev = { | |
107 | .platform_data = &heartbeat_data, | |
108 | }, | |
a09d2831 PM |
109 | .num_resources = 1, |
110 | .resource = &heartbeat_resource, | |
4138b740 KM |
111 | }; |
112 | ||
113 | /* MTD */ | |
114 | static struct mtd_partition nor_flash_partitions[] = { | |
115 | { | |
b7056bc1 | 116 | .name = "boot loader", |
4138b740 | 117 | .offset = 0, |
b7056bc1 | 118 | .size = (5 * 1024 * 1024), |
d5ce010c | 119 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
4138b740 KM |
120 | }, { |
121 | .name = "free-area", | |
122 | .offset = MTDPART_OFS_APPEND, | |
123 | .size = MTDPART_SIZ_FULL, | |
124 | }, | |
125 | }; | |
126 | ||
127 | static struct physmap_flash_data nor_flash_data = { | |
128 | .width = 2, | |
129 | .parts = nor_flash_partitions, | |
130 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | |
131 | }; | |
132 | ||
133 | static struct resource nor_flash_resources[] = { | |
134 | [0] = { | |
135 | .name = "NOR Flash", | |
136 | .start = 0x00000000, | |
137 | .end = 0x03ffffff, | |
138 | .flags = IORESOURCE_MEM, | |
139 | } | |
140 | }; | |
141 | ||
142 | static struct platform_device nor_flash_device = { | |
143 | .name = "physmap-flash", | |
144 | .resource = nor_flash_resources, | |
145 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
146 | .dev = { | |
147 | .platform_data = &nor_flash_data, | |
148 | }, | |
149 | }; | |
150 | ||
35a35408 KM |
151 | /* SH Eth */ |
152 | #define SH_ETH_ADDR (0xA4600000) | |
35a35408 KM |
153 | static struct resource sh_eth_resources[] = { |
154 | [0] = { | |
155 | .start = SH_ETH_ADDR, | |
156 | .end = SH_ETH_ADDR + 0x1FC, | |
157 | .flags = IORESOURCE_MEM, | |
158 | }, | |
159 | [1] = { | |
9307d115 | 160 | .start = evt2irq(0xd60), |
35a35408 KM |
161 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, |
162 | }, | |
163 | }; | |
164 | ||
3ce09334 | 165 | static struct sh_eth_plat_data sh_eth_plat = { |
35a35408 | 166 | .phy = 0x1f, /* SMSC LAN8700 */ |
9055f895 | 167 | .phy_interface = PHY_INTERFACE_MODE_MII, |
acf3cc28 | 168 | .ether_link_active_low = 1 |
35a35408 KM |
169 | }; |
170 | ||
171 | static struct platform_device sh_eth_device = { | |
9c3beaab SS |
172 | .name = "sh7724-ether", |
173 | .id = 0, | |
35a35408 KM |
174 | .dev = { |
175 | .platform_data = &sh_eth_plat, | |
176 | }, | |
177 | .num_resources = ARRAY_SIZE(sh_eth_resources), | |
178 | .resource = sh_eth_resources, | |
179 | }; | |
180 | ||
907050a3 | 181 | /* USB0 host */ |
3ce09334 | 182 | static void usb0_port_power(int port, int power) |
907050a3 KM |
183 | { |
184 | gpio_set_value(GPIO_PTB4, power); | |
185 | } | |
186 | ||
187 | static struct r8a66597_platdata usb0_host_data = { | |
188 | .on_chip = 1, | |
189 | .port_power = usb0_port_power, | |
190 | }; | |
191 | ||
192 | static struct resource usb0_host_resources[] = { | |
193 | [0] = { | |
194 | .start = 0xa4d80000, | |
195 | .end = 0xa4d80124 - 1, | |
196 | .flags = IORESOURCE_MEM, | |
197 | }, | |
198 | [1] = { | |
9307d115 PM |
199 | .start = evt2irq(0xa20), |
200 | .end = evt2irq(0xa20), | |
907050a3 KM |
201 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
202 | }, | |
203 | }; | |
204 | ||
205 | static struct platform_device usb0_host_device = { | |
206 | .name = "r8a66597_hcd", | |
207 | .id = 0, | |
208 | .dev = { | |
209 | .dma_mask = NULL, /* not use dma */ | |
210 | .coherent_dma_mask = 0xffffffff, | |
211 | .platform_data = &usb0_host_data, | |
212 | }, | |
213 | .num_resources = ARRAY_SIZE(usb0_host_resources), | |
214 | .resource = usb0_host_resources, | |
215 | }; | |
216 | ||
3714a9a0 | 217 | /* USB1 host/function */ |
3ce09334 | 218 | static void usb1_port_power(int port, int power) |
907050a3 | 219 | { |
907050a3 KM |
220 | gpio_set_value(GPIO_PTB5, power); |
221 | } | |
222 | ||
3714a9a0 | 223 | static struct r8a66597_platdata usb1_common_data = { |
907050a3 KM |
224 | .on_chip = 1, |
225 | .port_power = usb1_port_power, | |
226 | }; | |
227 | ||
3714a9a0 | 228 | static struct resource usb1_common_resources[] = { |
907050a3 KM |
229 | [0] = { |
230 | .start = 0xa4d90000, | |
231 | .end = 0xa4d90124 - 1, | |
232 | .flags = IORESOURCE_MEM, | |
233 | }, | |
234 | [1] = { | |
9307d115 PM |
235 | .start = evt2irq(0xa40), |
236 | .end = evt2irq(0xa40), | |
907050a3 KM |
237 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, |
238 | }, | |
239 | }; | |
240 | ||
3714a9a0 KM |
241 | static struct platform_device usb1_common_device = { |
242 | /* .name will be added in arch_setup */ | |
907050a3 KM |
243 | .id = 1, |
244 | .dev = { | |
245 | .dma_mask = NULL, /* not use dma */ | |
246 | .coherent_dma_mask = 0xffffffff, | |
3714a9a0 | 247 | .platform_data = &usb1_common_data, |
907050a3 | 248 | }, |
3714a9a0 KM |
249 | .num_resources = ARRAY_SIZE(usb1_common_resources), |
250 | .resource = usb1_common_resources, | |
907050a3 KM |
251 | }; |
252 | ||
fb2e7394 KM |
253 | /* |
254 | * USBHS | |
255 | */ | |
256 | static int usbhs_get_id(struct platform_device *pdev) | |
257 | { | |
258 | return gpio_get_value(GPIO_PTB3); | |
259 | } | |
260 | ||
225da3e3 | 261 | static int usbhs_phy_reset(struct platform_device *pdev) |
1ca8fe38 KM |
262 | { |
263 | /* enable vbus if HOST */ | |
264 | if (!gpio_get_value(GPIO_PTB3)) | |
265 | gpio_set_value(GPIO_PTB5, 1); | |
225da3e3 KM |
266 | |
267 | return 0; | |
1ca8fe38 KM |
268 | } |
269 | ||
fb2e7394 KM |
270 | static struct renesas_usbhs_platform_info usbhs_info = { |
271 | .platform_callback = { | |
272 | .get_id = usbhs_get_id, | |
1ca8fe38 | 273 | .phy_reset = usbhs_phy_reset, |
fb2e7394 KM |
274 | }, |
275 | .driver_param = { | |
276 | .buswait_bwait = 4, | |
277 | .detection_delay = 5, | |
9f0fa799 KM |
278 | .d0_tx_id = SHDMA_SLAVE_USB1D0_TX, |
279 | .d0_rx_id = SHDMA_SLAVE_USB1D0_RX, | |
280 | .d1_tx_id = SHDMA_SLAVE_USB1D1_TX, | |
281 | .d1_rx_id = SHDMA_SLAVE_USB1D1_RX, | |
fb2e7394 KM |
282 | }, |
283 | }; | |
284 | ||
285 | static struct resource usbhs_resources[] = { | |
286 | [0] = { | |
287 | .start = 0xa4d90000, | |
288 | .end = 0xa4d90124 - 1, | |
289 | .flags = IORESOURCE_MEM, | |
290 | }, | |
291 | [1] = { | |
9307d115 PM |
292 | .start = evt2irq(0xa40), |
293 | .end = evt2irq(0xa40), | |
fb2e7394 KM |
294 | .flags = IORESOURCE_IRQ, |
295 | }, | |
296 | }; | |
297 | ||
298 | static struct platform_device usbhs_device = { | |
299 | .name = "renesas_usbhs", | |
300 | .id = 1, | |
301 | .dev = { | |
302 | .dma_mask = NULL, /* not use dma */ | |
303 | .coherent_dma_mask = 0xffffffff, | |
304 | .platform_data = &usbhs_info, | |
305 | }, | |
306 | .num_resources = ARRAY_SIZE(usbhs_resources), | |
307 | .resource = usbhs_resources, | |
fb2e7394 KM |
308 | }; |
309 | ||
fe79f919 | 310 | /* LCDC and backlight */ |
e04008eb | 311 | static const struct fb_videomode ecovec_lcd_modes[] = { |
44432407 GL |
312 | { |
313 | .name = "Panel", | |
314 | .xres = 800, | |
315 | .yres = 480, | |
316 | .left_margin = 220, | |
317 | .right_margin = 110, | |
318 | .hsync_len = 70, | |
319 | .upper_margin = 20, | |
320 | .lower_margin = 5, | |
321 | .vsync_len = 5, | |
322 | .sync = 0, /* hsync and vsync are active low */ | |
323 | }, | |
324 | }; | |
325 | ||
e04008eb | 326 | static const struct fb_videomode ecovec_dvi_modes[] = { |
44432407 GL |
327 | { |
328 | .name = "DVI", | |
329 | .xres = 1280, | |
330 | .yres = 720, | |
331 | .left_margin = 220, | |
332 | .right_margin = 110, | |
333 | .hsync_len = 40, | |
334 | .upper_margin = 20, | |
335 | .lower_margin = 5, | |
336 | .vsync_len = 5, | |
337 | .sync = 0, /* hsync and vsync are active low */ | |
338 | }, | |
339 | }; | |
340 | ||
fa3ba51b KM |
341 | static struct sh_mobile_lcdc_info lcdc_info = { |
342 | .ch[0] = { | |
343 | .interface_type = RGB18, | |
344 | .chan = LCDC_CHAN_MAINLCD, | |
edd153a3 | 345 | .fourcc = V4L2_PIX_FMT_RGB565, |
afaad83b | 346 | .panel_cfg = { /* 7.0 inch */ |
fa3ba51b KM |
347 | .width = 152, |
348 | .height = 91, | |
349 | }, | |
fa3ba51b KM |
350 | } |
351 | }; | |
352 | ||
353 | static struct resource lcdc_resources[] = { | |
354 | [0] = { | |
355 | .name = "LCDC", | |
356 | .start = 0xfe940000, | |
a6f15ade | 357 | .end = 0xfe942fff, |
fa3ba51b KM |
358 | .flags = IORESOURCE_MEM, |
359 | }, | |
360 | [1] = { | |
9307d115 | 361 | .start = evt2irq(0xf40), |
fa3ba51b KM |
362 | .flags = IORESOURCE_IRQ, |
363 | }, | |
364 | }; | |
365 | ||
366 | static struct platform_device lcdc_device = { | |
367 | .name = "sh_mobile_lcdc_fb", | |
368 | .num_resources = ARRAY_SIZE(lcdc_resources), | |
369 | .resource = lcdc_resources, | |
370 | .dev = { | |
371 | .platform_data = &lcdc_info, | |
372 | }, | |
fa3ba51b KM |
373 | }; |
374 | ||
d9e2b6ee BG |
375 | static struct gpiod_lookup_table gpio_backlight_lookup = { |
376 | .dev_id = "gpio-backlight.0", | |
377 | .table = { | |
378 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTR1, NULL, GPIO_ACTIVE_HIGH), | |
379 | { } | |
380 | }, | |
381 | }; | |
382 | ||
383 | static struct property_entry gpio_backlight_props[] = { | |
384 | PROPERTY_ENTRY_BOOL("default-on"), | |
385 | { } | |
386 | }; | |
387 | ||
fe79f919 | 388 | static struct gpio_backlight_platform_data gpio_backlight_data = { |
ed369def | 389 | .dev = &lcdc_device.dev, |
fe79f919 LP |
390 | }; |
391 | ||
d9e2b6ee | 392 | static const struct platform_device_info gpio_backlight_device_info = { |
fe79f919 | 393 | .name = "gpio-backlight", |
d9e2b6ee BG |
394 | .data = &gpio_backlight_data, |
395 | .size_data = sizeof(gpio_backlight_data), | |
396 | .properties = gpio_backlight_props, | |
fe79f919 LP |
397 | }; |
398 | ||
d9e2b6ee BG |
399 | static struct platform_device *gpio_backlight_device; |
400 | ||
2153ad32 | 401 | /* CEU0 */ |
c2f9b05f JM |
402 | static struct ceu_platform_data ceu0_pdata = { |
403 | .num_subdevs = 2, | |
404 | .subdevs = { | |
405 | { /* [0] = mt9t112 */ | |
406 | .flags = 0, | |
407 | .bus_width = 8, | |
408 | .bus_shift = 0, | |
409 | .i2c_adapter_id = 0, | |
410 | .i2c_address = 0x3c, | |
411 | }, | |
412 | { /* [1] = tw9910 */ | |
413 | .flags = 0, | |
414 | .bus_width = 8, | |
415 | .bus_shift = 0, | |
416 | .i2c_adapter_id = 0, | |
417 | .i2c_address = 0x45, | |
418 | }, | |
419 | }, | |
2153ad32 KM |
420 | }; |
421 | ||
422 | static struct resource ceu0_resources[] = { | |
423 | [0] = { | |
424 | .name = "CEU0", | |
425 | .start = 0xfe910000, | |
426 | .end = 0xfe91009f, | |
427 | .flags = IORESOURCE_MEM, | |
428 | }, | |
429 | [1] = { | |
9307d115 | 430 | .start = evt2irq(0x880), |
2153ad32 KM |
431 | .flags = IORESOURCE_IRQ, |
432 | }, | |
2153ad32 KM |
433 | }; |
434 | ||
435 | static struct platform_device ceu0_device = { | |
c2f9b05f JM |
436 | .name = "renesas-ceu", |
437 | .id = 0, /* ceu.0 */ | |
2153ad32 KM |
438 | .num_resources = ARRAY_SIZE(ceu0_resources), |
439 | .resource = ceu0_resources, | |
440 | .dev = { | |
c2f9b05f | 441 | .platform_data = &ceu0_pdata, |
2153ad32 | 442 | }, |
2153ad32 KM |
443 | }; |
444 | ||
445 | /* CEU1 */ | |
c2f9b05f JM |
446 | static struct ceu_platform_data ceu1_pdata = { |
447 | .num_subdevs = 1, | |
448 | .subdevs = { | |
449 | { /* [0] = mt9t112 */ | |
450 | .flags = 0, | |
451 | .bus_width = 8, | |
452 | .bus_shift = 0, | |
453 | .i2c_adapter_id = 1, | |
454 | .i2c_address = 0x3c, | |
455 | }, | |
456 | }, | |
2153ad32 KM |
457 | }; |
458 | ||
459 | static struct resource ceu1_resources[] = { | |
460 | [0] = { | |
461 | .name = "CEU1", | |
462 | .start = 0xfe914000, | |
463 | .end = 0xfe91409f, | |
464 | .flags = IORESOURCE_MEM, | |
465 | }, | |
466 | [1] = { | |
9307d115 | 467 | .start = evt2irq(0x9e0), |
2153ad32 KM |
468 | .flags = IORESOURCE_IRQ, |
469 | }, | |
2153ad32 KM |
470 | }; |
471 | ||
472 | static struct platform_device ceu1_device = { | |
c2f9b05f JM |
473 | .name = "renesas-ceu", |
474 | .id = 1, /* ceu.1 */ | |
2153ad32 KM |
475 | .num_resources = ARRAY_SIZE(ceu1_resources), |
476 | .resource = ceu1_resources, | |
477 | .dev = { | |
c2f9b05f JM |
478 | .platform_data = &ceu1_pdata, |
479 | }, | |
480 | }; | |
481 | ||
482 | /* Power up/down GPIOs for camera devices and video decoder */ | |
483 | static struct gpiod_lookup_table tw9910_gpios = { | |
484 | .dev_id = "0-0045", | |
485 | .table = { | |
486 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTU2, "pdn", GPIO_ACTIVE_HIGH), | |
487 | }, | |
488 | }; | |
489 | ||
490 | static struct gpiod_lookup_table mt9t112_0_gpios = { | |
491 | .dev_id = "0-003c", | |
492 | .table = { | |
493 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTA3, "standby", | |
494 | GPIO_ACTIVE_HIGH), | |
495 | }, | |
496 | }; | |
497 | ||
498 | static struct gpiod_lookup_table mt9t112_1_gpios = { | |
499 | .dev_id = "1-003c", | |
500 | .table = { | |
501 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTA4, "standby", | |
502 | GPIO_ACTIVE_HIGH), | |
2153ad32 | 503 | }, |
2153ad32 KM |
504 | }; |
505 | ||
125ecce6 | 506 | /* I2C device */ |
c2f9b05f JM |
507 | static struct tw9910_video_info tw9910_info = { |
508 | .buswidth = 8, | |
509 | .mpout = TW9910_MPO_FIELD, | |
510 | }; | |
511 | ||
512 | static struct mt9t112_platform_data mt9t112_0_pdata = { | |
513 | .flags = MT9T112_FLAG_PCLK_RISING_EDGE, | |
514 | .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ | |
515 | }; | |
516 | ||
517 | static struct mt9t112_platform_data mt9t112_1_pdata = { | |
518 | .flags = MT9T112_FLAG_PCLK_RISING_EDGE, | |
519 | .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ | |
520 | }; | |
521 | ||
1980fdc4 KM |
522 | static struct i2c_board_info i2c0_devices[] = { |
523 | { | |
524 | I2C_BOARD_INFO("da7210", 0x1a), | |
525 | }, | |
c2f9b05f JM |
526 | { |
527 | I2C_BOARD_INFO("tw9910", 0x45), | |
528 | .platform_data = &tw9910_info, | |
529 | }, | |
530 | { | |
531 | /* 1st camera */ | |
532 | I2C_BOARD_INFO("mt9t112", 0x3c), | |
533 | .platform_data = &mt9t112_0_pdata, | |
534 | }, | |
1980fdc4 KM |
535 | }; |
536 | ||
125ecce6 KM |
537 | static struct i2c_board_info i2c1_devices[] = { |
538 | { | |
539 | I2C_BOARD_INFO("r2025sd", 0x32), | |
540 | }, | |
ea440783 NH |
541 | { |
542 | I2C_BOARD_INFO("lis3lv02d", 0x1c), | |
9307d115 | 543 | .irq = evt2irq(0x620), |
c2f9b05f JM |
544 | }, |
545 | { | |
546 | /* 2nd camera */ | |
547 | I2C_BOARD_INFO("mt9t112", 0x3c), | |
548 | .platform_data = &mt9t112_1_pdata, | |
549 | }, | |
125ecce6 KM |
550 | }; |
551 | ||
e9103e74 KM |
552 | /* KEYSC */ |
553 | static struct sh_keysc_info keysc_info = { | |
554 | .mode = SH_KEYSC_MODE_1, | |
555 | .scan_timing = 3, | |
556 | .delay = 50, | |
557 | .kycr2_delay = 100, | |
558 | .keycodes = { KEY_1, 0, 0, 0, 0, | |
559 | KEY_2, 0, 0, 0, 0, | |
560 | KEY_3, 0, 0, 0, 0, | |
561 | KEY_4, 0, 0, 0, 0, | |
562 | KEY_5, 0, 0, 0, 0, | |
563 | KEY_6, 0, 0, 0, 0, }, | |
564 | }; | |
565 | ||
566 | static struct resource keysc_resources[] = { | |
567 | [0] = { | |
568 | .name = "KEYSC", | |
569 | .start = 0x044b0000, | |
570 | .end = 0x044b000f, | |
571 | .flags = IORESOURCE_MEM, | |
572 | }, | |
573 | [1] = { | |
9307d115 | 574 | .start = evt2irq(0xbe0), |
e9103e74 KM |
575 | .flags = IORESOURCE_IRQ, |
576 | }, | |
577 | }; | |
578 | ||
579 | static struct platform_device keysc_device = { | |
580 | .name = "sh_keysc", | |
581 | .id = 0, /* keysc0 clock */ | |
582 | .num_resources = ARRAY_SIZE(keysc_resources), | |
583 | .resource = keysc_resources, | |
584 | .dev = { | |
585 | .platform_data = &keysc_info, | |
586 | }, | |
e9103e74 KM |
587 | }; |
588 | ||
8810e055 | 589 | /* TouchScreen */ |
9307d115 PM |
590 | #define IRQ0 evt2irq(0x600) |
591 | ||
07f9e5cf | 592 | static int ts_get_pendown_state(struct device *dev) |
5d75b3a2 PM |
593 | { |
594 | int val = 0; | |
595 | gpio_free(GPIO_FN_INTC_IRQ0); | |
596 | gpio_request(GPIO_PTZ0, NULL); | |
597 | gpio_direction_input(GPIO_PTZ0); | |
598 | ||
599 | val = gpio_get_value(GPIO_PTZ0); | |
600 | ||
601 | gpio_free(GPIO_PTZ0); | |
602 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | |
603 | ||
604 | return val ? 0 : 1; | |
605 | } | |
606 | ||
607 | static int ts_init(void) | |
608 | { | |
609 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | |
610 | return 0; | |
611 | } | |
612 | ||
3ce09334 | 613 | static struct tsc2007_platform_data tsc2007_info = { |
8810e055 | 614 | .model = 2007, |
5d75b3a2 PM |
615 | .x_plate_ohms = 180, |
616 | .get_pendown_state = ts_get_pendown_state, | |
617 | .init_platform_hw = ts_init, | |
8810e055 KM |
618 | }; |
619 | ||
620 | static struct i2c_board_info ts_i2c_clients = { | |
621 | I2C_BOARD_INFO("tsc2007", 0x48), | |
622 | .type = "tsc2007", | |
623 | .platform_data = &tsc2007_info, | |
624 | .irq = IRQ0, | |
625 | }; | |
626 | ||
d4c191df GL |
627 | static struct regulator_consumer_supply cn12_power_consumers[] = |
628 | { | |
629 | REGULATOR_SUPPLY("vmmc", "sh_mmcif.0"), | |
630 | REGULATOR_SUPPLY("vqmmc", "sh_mmcif.0"), | |
631 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.1"), | |
632 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.1"), | |
633 | }; | |
634 | ||
635 | static struct regulator_init_data cn12_power_init_data = { | |
636 | .constraints = { | |
637 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
638 | }, | |
639 | .num_consumer_supplies = ARRAY_SIZE(cn12_power_consumers), | |
640 | .consumer_supplies = cn12_power_consumers, | |
641 | }; | |
642 | ||
643 | static struct fixed_voltage_config cn12_power_info = { | |
644 | .supply_name = "CN12 SD/MMC Vdd", | |
645 | .microvolts = 3300000, | |
d4c191df GL |
646 | .init_data = &cn12_power_init_data, |
647 | }; | |
648 | ||
649 | static struct platform_device cn12_power = { | |
650 | .name = "reg-fixed-voltage", | |
651 | .id = 0, | |
652 | .dev = { | |
653 | .platform_data = &cn12_power_info, | |
654 | }, | |
655 | }; | |
656 | ||
efdfeb07 LW |
657 | static struct gpiod_lookup_table cn12_power_gpiod_table = { |
658 | .dev_id = "reg-fixed-voltage.0", | |
659 | .table = { | |
660 | /* Offset 7 on port B */ | |
661 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTB7, | |
662 | NULL, GPIO_ACTIVE_HIGH), | |
663 | { }, | |
664 | }, | |
665 | }; | |
666 | ||
5744c881 | 667 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) |
1238c684 | 668 | /* SDHI0 */ |
d4c191df GL |
669 | static struct regulator_consumer_supply sdhi0_power_consumers[] = |
670 | { | |
671 | REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi.0"), | |
672 | REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi.0"), | |
673 | }; | |
674 | ||
675 | static struct regulator_init_data sdhi0_power_init_data = { | |
676 | .constraints = { | |
677 | .valid_ops_mask = REGULATOR_CHANGE_STATUS, | |
678 | }, | |
679 | .num_consumer_supplies = ARRAY_SIZE(sdhi0_power_consumers), | |
680 | .consumer_supplies = sdhi0_power_consumers, | |
681 | }; | |
682 | ||
683 | static struct fixed_voltage_config sdhi0_power_info = { | |
684 | .supply_name = "CN11 SD/MMC Vdd", | |
685 | .microvolts = 3300000, | |
d4c191df GL |
686 | .init_data = &sdhi0_power_init_data, |
687 | }; | |
688 | ||
689 | static struct platform_device sdhi0_power = { | |
690 | .name = "reg-fixed-voltage", | |
691 | .id = 1, | |
692 | .dev = { | |
693 | .platform_data = &sdhi0_power_info, | |
694 | }, | |
695 | }; | |
696 | ||
efdfeb07 LW |
697 | static struct gpiod_lookup_table sdhi0_power_gpiod_table = { |
698 | .dev_id = "reg-fixed-voltage.1", | |
699 | .table = { | |
700 | /* Offset 6 on port B */ | |
701 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTB6, | |
702 | NULL, GPIO_ACTIVE_HIGH), | |
703 | { }, | |
704 | }, | |
705 | }; | |
706 | ||
faed9303 LW |
707 | static struct gpiod_lookup_table sdhi0_gpio_table = { |
708 | .dev_id = "sh_mobile_sdhi.0", | |
709 | .table = { | |
710 | /* Card detect */ | |
711 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTY7, "cd", GPIO_ACTIVE_LOW), | |
712 | { }, | |
713 | }, | |
714 | }; | |
715 | ||
84f11d5b KM |
716 | static struct tmio_mmc_data sdhi0_info = { |
717 | .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI0_TX, | |
718 | .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI0_RX, | |
719 | .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD | | |
4eb80146 | 720 | MMC_CAP_NEEDS_POLL, |
98779ad8 MD |
721 | }; |
722 | ||
96987d96 KM |
723 | static struct resource sdhi0_resources[] = { |
724 | [0] = { | |
725 | .name = "SDHI0", | |
726 | .start = 0x04ce0000, | |
d80e9221 | 727 | .end = 0x04ce00ff, |
96987d96 KM |
728 | .flags = IORESOURCE_MEM, |
729 | }, | |
730 | [1] = { | |
9307d115 | 731 | .start = evt2irq(0xe80), |
96987d96 KM |
732 | .flags = IORESOURCE_IRQ, |
733 | }, | |
734 | }; | |
735 | ||
736 | static struct platform_device sdhi0_device = { | |
737 | .name = "sh_mobile_sdhi", | |
738 | .num_resources = ARRAY_SIZE(sdhi0_resources), | |
739 | .resource = sdhi0_resources, | |
740 | .id = 0, | |
98779ad8 MD |
741 | .dev = { |
742 | .platform_data = &sdhi0_info, | |
743 | }, | |
96987d96 KM |
744 | }; |
745 | ||
d4c191df GL |
746 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
747 | /* SDHI1 */ | |
84f11d5b KM |
748 | static struct tmio_mmc_data sdhi1_info = { |
749 | .chan_priv_tx = (void *)SHDMA_SLAVE_SDHI1_TX, | |
750 | .chan_priv_rx = (void *)SHDMA_SLAVE_SDHI1_RX, | |
751 | .capabilities = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD | | |
4eb80146 | 752 | MMC_CAP_NEEDS_POLL, |
faed9303 LW |
753 | }; |
754 | ||
755 | static struct gpiod_lookup_table sdhi1_gpio_table = { | |
756 | .dev_id = "sh_mobile_sdhi.1", | |
757 | .table = { | |
758 | /* Card detect */ | |
759 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTW7, "cd", GPIO_ACTIVE_LOW), | |
760 | { }, | |
761 | }, | |
98779ad8 MD |
762 | }; |
763 | ||
96987d96 KM |
764 | static struct resource sdhi1_resources[] = { |
765 | [0] = { | |
766 | .name = "SDHI1", | |
767 | .start = 0x04cf0000, | |
d80e9221 | 768 | .end = 0x04cf00ff, |
96987d96 KM |
769 | .flags = IORESOURCE_MEM, |
770 | }, | |
771 | [1] = { | |
9307d115 | 772 | .start = evt2irq(0x4e0), |
96987d96 KM |
773 | .flags = IORESOURCE_IRQ, |
774 | }, | |
775 | }; | |
776 | ||
777 | static struct platform_device sdhi1_device = { | |
778 | .name = "sh_mobile_sdhi", | |
779 | .num_resources = ARRAY_SIZE(sdhi1_resources), | |
780 | .resource = sdhi1_resources, | |
781 | .id = 1, | |
98779ad8 MD |
782 | .dev = { |
783 | .platform_data = &sdhi1_info, | |
784 | }, | |
96987d96 | 785 | }; |
1238c684 | 786 | #endif /* CONFIG_MMC_SH_MMCIF */ |
96987d96 | 787 | |
1ce4da7a MD |
788 | #else |
789 | ||
9503e891 | 790 | /* MMC SPI */ |
1ce4da7a MD |
791 | static void mmc_spi_setpower(struct device *dev, unsigned int maskval) |
792 | { | |
793 | gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); | |
794 | } | |
795 | ||
796 | static struct mmc_spi_platform_data mmc_spi_info = { | |
1ce4da7a | 797 | .caps = MMC_CAP_NEEDS_POLL, |
afa2c940 | 798 | .caps2 = MMC_CAP2_RO_ACTIVE_HIGH, |
1ce4da7a MD |
799 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ |
800 | .setpower = mmc_spi_setpower, | |
5716fb9b LW |
801 | }; |
802 | ||
803 | static struct gpiod_lookup_table mmc_spi_gpio_table = { | |
804 | .dev_id = "mmc_spi.0", /* device "mmc_spi" @ CS0 */ | |
805 | .table = { | |
806 | /* Card detect */ | |
807 | GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY7, NULL, 0, | |
808 | GPIO_ACTIVE_LOW), | |
809 | /* Write protect */ | |
810 | GPIO_LOOKUP_IDX("sh7724_pfc", GPIO_PTY6, NULL, 1, | |
811 | GPIO_ACTIVE_HIGH), | |
812 | { }, | |
813 | }, | |
1ce4da7a MD |
814 | }; |
815 | ||
816 | static struct spi_board_info spi_bus[] = { | |
817 | { | |
818 | .modalias = "mmc_spi", | |
819 | .platform_data = &mmc_spi_info, | |
820 | .max_speed_hz = 5000000, | |
821 | .mode = SPI_MODE_0, | |
1ce4da7a MD |
822 | }, |
823 | }; | |
824 | ||
9503e891 | 825 | /* MSIOF0 */ |
1ce4da7a MD |
826 | static struct sh_msiof_spi_info msiof0_data = { |
827 | .num_chipselect = 1, | |
828 | }; | |
829 | ||
830 | static struct resource msiof0_resources[] = { | |
831 | [0] = { | |
832 | .name = "MSIOF0", | |
833 | .start = 0xa4c40000, | |
834 | .end = 0xa4c40063, | |
835 | .flags = IORESOURCE_MEM, | |
836 | }, | |
837 | [1] = { | |
9307d115 | 838 | .start = evt2irq(0xc80), |
1ce4da7a MD |
839 | .flags = IORESOURCE_IRQ, |
840 | }, | |
841 | }; | |
842 | ||
843 | static struct platform_device msiof0_device = { | |
844 | .name = "spi_sh_msiof", | |
845 | .id = 0, /* MSIOF0 */ | |
846 | .dev = { | |
847 | .platform_data = &msiof0_data, | |
848 | }, | |
849 | .num_resources = ARRAY_SIZE(msiof0_resources), | |
850 | .resource = msiof0_resources, | |
1ce4da7a MD |
851 | }; |
852 | ||
9fda6693 GU |
853 | static struct gpiod_lookup_table msiof_gpio_table = { |
854 | .dev_id = "spi_sh_msiof.0", | |
855 | .table = { | |
856 | GPIO_LOOKUP("sh7724_pfc", GPIO_PTM4, "cs", GPIO_ACTIVE_HIGH), | |
857 | { }, | |
858 | }, | |
859 | }; | |
860 | ||
1ce4da7a MD |
861 | #endif |
862 | ||
1980fdc4 | 863 | /* FSI */ |
1980fdc4 KM |
864 | static struct resource fsi_resources[] = { |
865 | [0] = { | |
866 | .name = "FSI", | |
867 | .start = 0xFE3C0000, | |
868 | .end = 0xFE3C021d, | |
869 | .flags = IORESOURCE_MEM, | |
870 | }, | |
871 | [1] = { | |
9307d115 | 872 | .start = evt2irq(0xf80), |
1980fdc4 KM |
873 | .flags = IORESOURCE_IRQ, |
874 | }, | |
875 | }; | |
876 | ||
877 | static struct platform_device fsi_device = { | |
878 | .name = "sh_fsi", | |
879 | .id = 0, | |
880 | .num_resources = ARRAY_SIZE(fsi_resources), | |
881 | .resource = fsi_resources, | |
1980fdc4 KM |
882 | }; |
883 | ||
6d925797 | 884 | static struct simple_util_info fsi_da7210_info = { |
064bfada KM |
885 | .name = "DA7210", |
886 | .card = "FSIB-DA7210", | |
064bfada KM |
887 | .codec = "da7210.0-001a", |
888 | .platform = "sh_fsi.0", | |
81a13ac7 | 889 | .daifmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBP_CFP, |
a4a2992c KM |
890 | .cpu_dai = { |
891 | .name = "fsib-dai", | |
a4a2992c KM |
892 | }, |
893 | .codec_dai = { | |
894 | .name = "da7210-hifi", | |
a4a2992c | 895 | }, |
064bfada KM |
896 | }; |
897 | ||
898 | static struct platform_device fsi_da7210_device = { | |
899 | .name = "asoc-simple-card", | |
900 | .dev = { | |
901 | .platform_data = &fsi_da7210_info, | |
ffb83e8c KM |
902 | .coherent_dma_mask = DMA_BIT_MASK(32), |
903 | .dma_mask = &fsi_da7210_device.dev.coherent_dma_mask, | |
064bfada KM |
904 | }, |
905 | }; | |
906 | ||
907 | ||
26365716 KM |
908 | /* IrDA */ |
909 | static struct resource irda_resources[] = { | |
910 | [0] = { | |
911 | .name = "IrDA", | |
912 | .start = 0xA45D0000, | |
913 | .end = 0xA45D0049, | |
914 | .flags = IORESOURCE_MEM, | |
915 | }, | |
916 | [1] = { | |
9307d115 | 917 | .start = evt2irq(0x480), |
26365716 KM |
918 | .flags = IORESOURCE_IRQ, |
919 | }, | |
920 | }; | |
921 | ||
922 | static struct platform_device irda_device = { | |
923 | .name = "sh_sir", | |
924 | .num_resources = ARRAY_SIZE(irda_resources), | |
925 | .resource = irda_resources, | |
926 | }; | |
927 | ||
b5dcee22 | 928 | #include <media/i2c/ak881x.h> |
d647f0b7 | 929 | #include <media/drv-intf/sh_vou.h> |
aee5ab0b | 930 | |
3ce09334 | 931 | static struct ak881x_pdata ak881x_pdata = { |
aee5ab0b GL |
932 | .flags = AK881X_IF_MODE_SLAVE, |
933 | }; | |
934 | ||
935 | static struct i2c_board_info ak8813 = { | |
936 | I2C_BOARD_INFO("ak8813", 0x20), | |
937 | .platform_data = &ak881x_pdata, | |
938 | }; | |
939 | ||
3ce09334 | 940 | static struct sh_vou_pdata sh_vou_pdata = { |
aee5ab0b GL |
941 | .bus_fmt = SH_VOU_BUS_8BIT, |
942 | .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, | |
943 | .board_info = &ak8813, | |
944 | .i2c_adap = 0, | |
aee5ab0b GL |
945 | }; |
946 | ||
947 | static struct resource sh_vou_resources[] = { | |
948 | [0] = { | |
949 | .start = 0xfe960000, | |
950 | .end = 0xfe962043, | |
951 | .flags = IORESOURCE_MEM, | |
952 | }, | |
953 | [1] = { | |
9307d115 | 954 | .start = evt2irq(0x8e0), |
aee5ab0b GL |
955 | .flags = IORESOURCE_IRQ, |
956 | }, | |
957 | }; | |
958 | ||
959 | static struct platform_device vou_device = { | |
960 | .name = "sh-vou", | |
961 | .id = -1, | |
962 | .num_resources = ARRAY_SIZE(sh_vou_resources), | |
963 | .resource = sh_vou_resources, | |
964 | .dev = { | |
965 | .platform_data = &sh_vou_pdata, | |
966 | }, | |
aee5ab0b GL |
967 | }; |
968 | ||
5744c881 | 969 | #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1238c684 | 970 | /* SH_MMCIF */ |
1238c684 YG |
971 | static struct resource sh_mmcif_resources[] = { |
972 | [0] = { | |
973 | .name = "SH_MMCIF", | |
974 | .start = 0xA4CA0000, | |
975 | .end = 0xA4CA00FF, | |
976 | .flags = IORESOURCE_MEM, | |
977 | }, | |
978 | [1] = { | |
979 | /* MMC2I */ | |
9307d115 | 980 | .start = evt2irq(0x5a0), |
1238c684 YG |
981 | .flags = IORESOURCE_IRQ, |
982 | }, | |
983 | [2] = { | |
984 | /* MMC3I */ | |
9307d115 | 985 | .start = evt2irq(0x5c0), |
1238c684 YG |
986 | .flags = IORESOURCE_IRQ, |
987 | }, | |
988 | }; | |
989 | ||
3ce09334 | 990 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
1238c684 YG |
991 | .sup_pclk = 0, /* SH7724: Max Pclk/2 */ |
992 | .caps = MMC_CAP_4_BIT_DATA | | |
993 | MMC_CAP_8_BIT_DATA | | |
994 | MMC_CAP_NEEDS_POLL, | |
995 | .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, | |
996 | }; | |
997 | ||
998 | static struct platform_device sh_mmcif_device = { | |
999 | .name = "sh_mmcif", | |
1000 | .id = 0, | |
1001 | .dev = { | |
1002 | .platform_data = &sh_mmcif_plat, | |
1003 | }, | |
1004 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | |
1005 | .resource = sh_mmcif_resources, | |
1006 | }; | |
1007 | #endif | |
1008 | ||
c2f9b05f JM |
1009 | static struct platform_device *ecovec_ceu_devices[] __initdata = { |
1010 | &ceu0_device, | |
1011 | &ceu1_device, | |
1012 | }; | |
1013 | ||
4138b740 KM |
1014 | static struct platform_device *ecovec_devices[] __initdata = { |
1015 | &heartbeat_device, | |
1016 | &nor_flash_device, | |
35a35408 | 1017 | &sh_eth_device, |
907050a3 | 1018 | &usb0_host_device, |
3714a9a0 | 1019 | &usb1_common_device, |
fb2e7394 | 1020 | &usbhs_device, |
fa3ba51b | 1021 | &lcdc_device, |
e9103e74 | 1022 | &keysc_device, |
d4c191df | 1023 | &cn12_power, |
5744c881 | 1024 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) |
d4c191df | 1025 | &sdhi0_power, |
96987d96 | 1026 | &sdhi0_device, |
5744c881 | 1027 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
96987d96 | 1028 | &sdhi1_device, |
1238c684 | 1029 | #endif |
1ce4da7a MD |
1030 | #else |
1031 | &msiof0_device, | |
1032 | #endif | |
1980fdc4 | 1033 | &fsi_device, |
064bfada | 1034 | &fsi_da7210_device, |
26365716 | 1035 | &irda_device, |
aee5ab0b | 1036 | &vou_device, |
5744c881 | 1037 | #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1238c684 YG |
1038 | &sh_mmcif_device, |
1039 | #endif | |
4138b740 KM |
1040 | }; |
1041 | ||
6b3b5575 | 1042 | #ifdef CONFIG_I2C |
4907d57f KM |
1043 | #define EEPROM_ADDR 0x50 |
1044 | static u8 mac_read(struct i2c_adapter *a, u8 command) | |
1045 | { | |
1046 | struct i2c_msg msg[2]; | |
1047 | u8 buf; | |
1048 | int ret; | |
1049 | ||
1050 | msg[0].addr = EEPROM_ADDR; | |
1051 | msg[0].flags = 0; | |
1052 | msg[0].len = 1; | |
1053 | msg[0].buf = &command; | |
1054 | ||
1055 | msg[1].addr = EEPROM_ADDR; | |
1056 | msg[1].flags = I2C_M_RD; | |
1057 | msg[1].len = 1; | |
1058 | msg[1].buf = &buf; | |
1059 | ||
1060 | ret = i2c_transfer(a, msg, 2); | |
1061 | if (ret < 0) { | |
1062 | printk(KERN_ERR "error %d\n", ret); | |
1063 | buf = 0xff; | |
1064 | } | |
1065 | ||
1066 | return buf; | |
1067 | } | |
1068 | ||
376abbb4 | 1069 | static void __init sh_eth_init(struct sh_eth_plat_data *pd) |
4907d57f KM |
1070 | { |
1071 | struct i2c_adapter *a = i2c_get_adapter(1); | |
4907d57f KM |
1072 | int i; |
1073 | ||
1074 | if (!a) { | |
1075 | pr_err("can not get I2C 1\n"); | |
1076 | return; | |
1077 | } | |
1078 | ||
25985edc | 1079 | /* read MAC address from EEPROM */ |
376abbb4 MD |
1080 | for (i = 0; i < sizeof(pd->mac_addr); i++) { |
1081 | pd->mac_addr[i] = mac_read(a, 0x10 + i); | |
4907d57f KM |
1082 | msleep(10); |
1083 | } | |
b230eb32 KM |
1084 | |
1085 | i2c_put_adapter(a); | |
4907d57f | 1086 | } |
6b3b5575 MD |
1087 | #else |
1088 | static void __init sh_eth_init(struct sh_eth_plat_data *pd) | |
1089 | { | |
1090 | pr_err("unable to read sh_eth MAC address\n"); | |
1091 | } | |
1092 | #endif | |
4907d57f | 1093 | |
fa3ba51b | 1094 | #define PORT_HIZA 0xA4050158 |
ea15edb2 | 1095 | #define IODRIVEA 0xA405018A |
eb0cd9e8 MD |
1096 | |
1097 | extern char ecovec24_sdram_enter_start; | |
1098 | extern char ecovec24_sdram_enter_end; | |
1099 | extern char ecovec24_sdram_leave_start; | |
1100 | extern char ecovec24_sdram_leave_end; | |
1101 | ||
4907d57f | 1102 | static int __init arch_setup(void) |
4138b740 | 1103 | { |
1980fdc4 | 1104 | struct clk *clk; |
4eb80146 | 1105 | bool cn12_enabled = false; |
1980fdc4 | 1106 | |
eb0cd9e8 | 1107 | /* register board specific self-refresh code */ |
2839bd61 MD |
1108 | sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | |
1109 | SUSP_SH_RSTANDBY, | |
eb0cd9e8 MD |
1110 | &ecovec24_sdram_enter_start, |
1111 | &ecovec24_sdram_enter_end, | |
1112 | &ecovec24_sdram_leave_start, | |
1113 | &ecovec24_sdram_leave_end); | |
1114 | ||
f78bab30 MD |
1115 | /* enable STATUS0, STATUS2 and PDSTATUS */ |
1116 | gpio_request(GPIO_FN_STATUS0, NULL); | |
1117 | gpio_request(GPIO_FN_STATUS2, NULL); | |
1118 | gpio_request(GPIO_FN_PDSTATUS, NULL); | |
1119 | ||
4138b740 KM |
1120 | /* enable SCIFA0 */ |
1121 | gpio_request(GPIO_FN_SCIF0_TXD, NULL); | |
1122 | gpio_request(GPIO_FN_SCIF0_RXD, NULL); | |
4138b740 KM |
1123 | |
1124 | /* enable debug LED */ | |
1125 | gpio_request(GPIO_PTG0, NULL); | |
1126 | gpio_request(GPIO_PTG1, NULL); | |
1127 | gpio_request(GPIO_PTG2, NULL); | |
1128 | gpio_request(GPIO_PTG3, NULL); | |
b7056bc1 KM |
1129 | gpio_direction_output(GPIO_PTG0, 0); |
1130 | gpio_direction_output(GPIO_PTG1, 0); | |
1131 | gpio_direction_output(GPIO_PTG2, 0); | |
1132 | gpio_direction_output(GPIO_PTG3, 0); | |
9d56dd3b | 1133 | __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); |
4138b740 | 1134 | |
35a35408 KM |
1135 | /* enable SH-Eth */ |
1136 | gpio_request(GPIO_PTA1, NULL); | |
1137 | gpio_direction_output(GPIO_PTA1, 1); | |
1138 | mdelay(20); | |
1139 | ||
1140 | gpio_request(GPIO_FN_RMII_RXD0, NULL); | |
1141 | gpio_request(GPIO_FN_RMII_RXD1, NULL); | |
1142 | gpio_request(GPIO_FN_RMII_TXD0, NULL); | |
1143 | gpio_request(GPIO_FN_RMII_TXD1, NULL); | |
1144 | gpio_request(GPIO_FN_RMII_REF_CLK, NULL); | |
1145 | gpio_request(GPIO_FN_RMII_TX_EN, NULL); | |
1146 | gpio_request(GPIO_FN_RMII_RX_ER, NULL); | |
1147 | gpio_request(GPIO_FN_RMII_CRS_DV, NULL); | |
1148 | gpio_request(GPIO_FN_MDIO, NULL); | |
1149 | gpio_request(GPIO_FN_MDC, NULL); | |
1150 | gpio_request(GPIO_FN_LNKSTA, NULL); | |
1151 | ||
907050a3 | 1152 | /* enable USB */ |
9d56dd3b PM |
1153 | __raw_writew(0x0000, 0xA4D80000); |
1154 | __raw_writew(0x0000, 0xA4D90000); | |
907050a3 KM |
1155 | gpio_request(GPIO_PTB3, NULL); |
1156 | gpio_request(GPIO_PTB4, NULL); | |
1157 | gpio_request(GPIO_PTB5, NULL); | |
1158 | gpio_direction_input(GPIO_PTB3); | |
1159 | gpio_direction_output(GPIO_PTB4, 0); | |
1160 | gpio_direction_output(GPIO_PTB5, 0); | |
9d56dd3b PM |
1161 | __raw_writew(0x0600, 0xa40501d4); |
1162 | __raw_writew(0x0600, 0xa4050192); | |
907050a3 | 1163 | |
3714a9a0 KM |
1164 | if (gpio_get_value(GPIO_PTB3)) { |
1165 | printk(KERN_INFO "USB1 function is selected\n"); | |
1166 | usb1_common_device.name = "r8a66597_udc"; | |
1167 | } else { | |
1168 | printk(KERN_INFO "USB1 host is selected\n"); | |
1169 | usb1_common_device.name = "r8a66597_hcd"; | |
1170 | } | |
1171 | ||
fa3ba51b KM |
1172 | /* enable LCDC */ |
1173 | gpio_request(GPIO_FN_LCDD23, NULL); | |
1174 | gpio_request(GPIO_FN_LCDD22, NULL); | |
1175 | gpio_request(GPIO_FN_LCDD21, NULL); | |
1176 | gpio_request(GPIO_FN_LCDD20, NULL); | |
1177 | gpio_request(GPIO_FN_LCDD19, NULL); | |
1178 | gpio_request(GPIO_FN_LCDD18, NULL); | |
1179 | gpio_request(GPIO_FN_LCDD17, NULL); | |
1180 | gpio_request(GPIO_FN_LCDD16, NULL); | |
1181 | gpio_request(GPIO_FN_LCDD15, NULL); | |
1182 | gpio_request(GPIO_FN_LCDD14, NULL); | |
1183 | gpio_request(GPIO_FN_LCDD13, NULL); | |
1184 | gpio_request(GPIO_FN_LCDD12, NULL); | |
1185 | gpio_request(GPIO_FN_LCDD11, NULL); | |
1186 | gpio_request(GPIO_FN_LCDD10, NULL); | |
1187 | gpio_request(GPIO_FN_LCDD9, NULL); | |
1188 | gpio_request(GPIO_FN_LCDD8, NULL); | |
1189 | gpio_request(GPIO_FN_LCDD7, NULL); | |
1190 | gpio_request(GPIO_FN_LCDD6, NULL); | |
1191 | gpio_request(GPIO_FN_LCDD5, NULL); | |
1192 | gpio_request(GPIO_FN_LCDD4, NULL); | |
1193 | gpio_request(GPIO_FN_LCDD3, NULL); | |
1194 | gpio_request(GPIO_FN_LCDD2, NULL); | |
1195 | gpio_request(GPIO_FN_LCDD1, NULL); | |
1196 | gpio_request(GPIO_FN_LCDD0, NULL); | |
1197 | gpio_request(GPIO_FN_LCDDISP, NULL); | |
1198 | gpio_request(GPIO_FN_LCDHSYN, NULL); | |
1199 | gpio_request(GPIO_FN_LCDDCK, NULL); | |
1200 | gpio_request(GPIO_FN_LCDVSYN, NULL); | |
1201 | gpio_request(GPIO_FN_LCDDON, NULL); | |
1202 | gpio_request(GPIO_FN_LCDLCLK, NULL); | |
9d56dd3b | 1203 | __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); |
fa3ba51b KM |
1204 | |
1205 | gpio_request(GPIO_PTE6, NULL); | |
1206 | gpio_request(GPIO_PTU1, NULL); | |
fa3ba51b KM |
1207 | gpio_request(GPIO_PTA2, NULL); |
1208 | gpio_direction_input(GPIO_PTE6); | |
1209 | gpio_direction_output(GPIO_PTU1, 0); | |
fa3ba51b KM |
1210 | gpio_direction_output(GPIO_PTA2, 0); |
1211 | ||
82b33221 | 1212 | /* I/O buffer drive ability is high */ |
9d56dd3b | 1213 | __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); |
ea15edb2 | 1214 | |
fa3ba51b KM |
1215 | if (gpio_get_value(GPIO_PTE6)) { |
1216 | /* DVI */ | |
1217 | lcdc_info.clock_source = LCDC_CLK_EXTERNAL; | |
44432407 | 1218 | lcdc_info.ch[0].clock_divider = 1; |
93ff2598 LP |
1219 | lcdc_info.ch[0].lcd_modes = ecovec_dvi_modes; |
1220 | lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_dvi_modes); | |
fa3ba51b | 1221 | |
fe79f919 | 1222 | /* No backlight */ |
d87123aa | 1223 | gpio_backlight_data.dev = NULL; |
fe79f919 | 1224 | |
fa3ba51b KM |
1225 | gpio_set_value(GPIO_PTA2, 1); |
1226 | gpio_set_value(GPIO_PTU1, 1); | |
1227 | } else { | |
1228 | /* Panel */ | |
ea15edb2 | 1229 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; |
44432407 | 1230 | lcdc_info.ch[0].clock_divider = 2; |
93ff2598 LP |
1231 | lcdc_info.ch[0].lcd_modes = ecovec_lcd_modes; |
1232 | lcdc_info.ch[0].num_modes = ARRAY_SIZE(ecovec_lcd_modes); | |
ea15edb2 | 1233 | |
ea15edb2 KM |
1234 | /* FIXME |
1235 | * | |
1236 | * LCDDON control is needed for Panel, | |
1237 | * but current sh_mobile_lcdc driver doesn't control it. | |
1238 | * It is temporary correspondence | |
1239 | */ | |
1240 | gpio_request(GPIO_PTF4, NULL); | |
1241 | gpio_direction_output(GPIO_PTF4, 1); | |
8810e055 KM |
1242 | |
1243 | /* enable TouchScreen */ | |
1244 | i2c_register_board_info(0, &ts_i2c_clients, 1); | |
fcb8918f | 1245 | irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); |
fa3ba51b KM |
1246 | } |
1247 | ||
2153ad32 KM |
1248 | /* enable CEU0 */ |
1249 | gpio_request(GPIO_FN_VIO0_D15, NULL); | |
1250 | gpio_request(GPIO_FN_VIO0_D14, NULL); | |
1251 | gpio_request(GPIO_FN_VIO0_D13, NULL); | |
1252 | gpio_request(GPIO_FN_VIO0_D12, NULL); | |
1253 | gpio_request(GPIO_FN_VIO0_D11, NULL); | |
1254 | gpio_request(GPIO_FN_VIO0_D10, NULL); | |
1255 | gpio_request(GPIO_FN_VIO0_D9, NULL); | |
1256 | gpio_request(GPIO_FN_VIO0_D8, NULL); | |
1257 | gpio_request(GPIO_FN_VIO0_D7, NULL); | |
1258 | gpio_request(GPIO_FN_VIO0_D6, NULL); | |
1259 | gpio_request(GPIO_FN_VIO0_D5, NULL); | |
1260 | gpio_request(GPIO_FN_VIO0_D4, NULL); | |
1261 | gpio_request(GPIO_FN_VIO0_D3, NULL); | |
1262 | gpio_request(GPIO_FN_VIO0_D2, NULL); | |
1263 | gpio_request(GPIO_FN_VIO0_D1, NULL); | |
1264 | gpio_request(GPIO_FN_VIO0_D0, NULL); | |
1265 | gpio_request(GPIO_FN_VIO0_VD, NULL); | |
1266 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | |
1267 | gpio_request(GPIO_FN_VIO0_FLD, NULL); | |
1268 | gpio_request(GPIO_FN_VIO0_HD, NULL); | |
2153ad32 KM |
1269 | |
1270 | /* enable CEU1 */ | |
1271 | gpio_request(GPIO_FN_VIO1_D7, NULL); | |
1272 | gpio_request(GPIO_FN_VIO1_D6, NULL); | |
1273 | gpio_request(GPIO_FN_VIO1_D5, NULL); | |
1274 | gpio_request(GPIO_FN_VIO1_D4, NULL); | |
1275 | gpio_request(GPIO_FN_VIO1_D3, NULL); | |
1276 | gpio_request(GPIO_FN_VIO1_D2, NULL); | |
1277 | gpio_request(GPIO_FN_VIO1_D1, NULL); | |
1278 | gpio_request(GPIO_FN_VIO1_D0, NULL); | |
1279 | gpio_request(GPIO_FN_VIO1_FLD, NULL); | |
1280 | gpio_request(GPIO_FN_VIO1_HD, NULL); | |
1281 | gpio_request(GPIO_FN_VIO1_VD, NULL); | |
1282 | gpio_request(GPIO_FN_VIO1_CLK, NULL); | |
2153ad32 | 1283 | |
e9103e74 KM |
1284 | /* enable KEYSC */ |
1285 | gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); | |
1286 | gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); | |
1287 | gpio_request(GPIO_FN_KEYOUT3, NULL); | |
1288 | gpio_request(GPIO_FN_KEYOUT2, NULL); | |
1289 | gpio_request(GPIO_FN_KEYOUT1, NULL); | |
1290 | gpio_request(GPIO_FN_KEYOUT0, NULL); | |
1291 | gpio_request(GPIO_FN_KEYIN0, NULL); | |
1292 | ||
064a16dc KM |
1293 | /* enable user debug switch */ |
1294 | gpio_request(GPIO_PTR0, NULL); | |
1295 | gpio_request(GPIO_PTR4, NULL); | |
1296 | gpio_request(GPIO_PTR5, NULL); | |
1297 | gpio_request(GPIO_PTR6, NULL); | |
1298 | gpio_direction_input(GPIO_PTR0); | |
1299 | gpio_direction_input(GPIO_PTR4); | |
1300 | gpio_direction_input(GPIO_PTR5); | |
1301 | gpio_direction_input(GPIO_PTR6); | |
1302 | ||
4eb80146 | 1303 | /* SD-card slot CN11 */ |
5744c881 | 1304 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) |
1ce4da7a | 1305 | /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ |
96987d96 KM |
1306 | gpio_request(GPIO_FN_SDHI0WP, NULL); |
1307 | gpio_request(GPIO_FN_SDHI0CMD, NULL); | |
1308 | gpio_request(GPIO_FN_SDHI0CLK, NULL); | |
1309 | gpio_request(GPIO_FN_SDHI0D3, NULL); | |
1310 | gpio_request(GPIO_FN_SDHI0D2, NULL); | |
1311 | gpio_request(GPIO_FN_SDHI0D1, NULL); | |
1312 | gpio_request(GPIO_FN_SDHI0D0, NULL); | |
1ce4da7a MD |
1313 | #else |
1314 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ | |
1315 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); | |
1316 | gpio_request(GPIO_FN_MSIOF0_RXD, NULL); | |
1317 | gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); | |
1ce4da7a MD |
1318 | gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ |
1319 | gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ | |
1ce4da7a | 1320 | |
5716fb9b | 1321 | gpiod_add_lookup_table(&mmc_spi_gpio_table); |
9fda6693 | 1322 | gpiod_add_lookup_table(&msiof_gpio_table); |
1ce4da7a MD |
1323 | spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); |
1324 | #endif | |
96987d96 | 1325 | |
4eb80146 GL |
1326 | /* MMC/SD-card slot CN12 */ |
1327 | #if defined(CONFIG_MMC_SH_MMCIF) || defined(CONFIG_MMC_SH_MMCIF_MODULE) | |
1328 | /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ | |
1329 | gpio_request(GPIO_FN_MMC_D7, NULL); | |
1330 | gpio_request(GPIO_FN_MMC_D6, NULL); | |
1331 | gpio_request(GPIO_FN_MMC_D5, NULL); | |
1332 | gpio_request(GPIO_FN_MMC_D4, NULL); | |
1333 | gpio_request(GPIO_FN_MMC_D3, NULL); | |
1334 | gpio_request(GPIO_FN_MMC_D2, NULL); | |
1335 | gpio_request(GPIO_FN_MMC_D1, NULL); | |
1336 | gpio_request(GPIO_FN_MMC_D0, NULL); | |
1337 | gpio_request(GPIO_FN_MMC_CLK, NULL); | |
1338 | gpio_request(GPIO_FN_MMC_CMD, NULL); | |
4eb80146 GL |
1339 | |
1340 | cn12_enabled = true; | |
1341 | #elif defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) | |
1342 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ | |
1343 | gpio_request(GPIO_FN_SDHI1WP, NULL); | |
1344 | gpio_request(GPIO_FN_SDHI1CMD, NULL); | |
1345 | gpio_request(GPIO_FN_SDHI1CLK, NULL); | |
1346 | gpio_request(GPIO_FN_SDHI1D3, NULL); | |
1347 | gpio_request(GPIO_FN_SDHI1D2, NULL); | |
1348 | gpio_request(GPIO_FN_SDHI1D1, NULL); | |
1349 | gpio_request(GPIO_FN_SDHI1D0, NULL); | |
4eb80146 | 1350 | |
4eb80146 GL |
1351 | cn12_enabled = true; |
1352 | #endif | |
1353 | ||
1354 | if (cn12_enabled) | |
1355 | /* I/O buffer drive ability is high for CN12 */ | |
1356 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000, | |
1357 | IODRIVEA); | |
1358 | ||
1980fdc4 KM |
1359 | /* enable FSI */ |
1360 | gpio_request(GPIO_FN_FSIMCKB, NULL); | |
1361 | gpio_request(GPIO_FN_FSIIBSD, NULL); | |
1362 | gpio_request(GPIO_FN_FSIOBSD, NULL); | |
1363 | gpio_request(GPIO_FN_FSIIBBCK, NULL); | |
1364 | gpio_request(GPIO_FN_FSIIBLRCK, NULL); | |
1365 | gpio_request(GPIO_FN_FSIOBBCK, NULL); | |
1366 | gpio_request(GPIO_FN_FSIOBLRCK, NULL); | |
1367 | gpio_request(GPIO_FN_CLKAUDIOBO, NULL); | |
1368 | ||
16afc9fb KM |
1369 | /* set SPU2 clock to 83.4 MHz */ |
1370 | clk = clk_get(NULL, "spu_clk"); | |
56ea5109 | 1371 | if (!IS_ERR(clk)) { |
10305853 KM |
1372 | clk_set_rate(clk, clk_round_rate(clk, 83333333)); |
1373 | clk_put(clk); | |
1374 | } | |
16afc9fb | 1375 | |
1980fdc4 KM |
1376 | /* change parent of FSI B */ |
1377 | clk = clk_get(NULL, "fsib_clk"); | |
56ea5109 | 1378 | if (!IS_ERR(clk)) { |
4bd5d259 KM |
1379 | /* 48kHz dummy clock was used to make sure 1/1 divide */ |
1380 | clk_set_rate(&sh7724_fsimckb_clk, 48000); | |
1381 | clk_set_parent(clk, &sh7724_fsimckb_clk); | |
1382 | clk_set_rate(clk, 48000); | |
10305853 KM |
1383 | clk_put(clk); |
1384 | } | |
1980fdc4 KM |
1385 | |
1386 | gpio_request(GPIO_PTU0, NULL); | |
1387 | gpio_direction_output(GPIO_PTU0, 0); | |
1388 | mdelay(20); | |
1389 | ||
ea440783 NH |
1390 | /* enable motion sensor */ |
1391 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); | |
1392 | gpio_direction_input(GPIO_FN_INTC_IRQ1); | |
1393 | ||
6f26d19f MD |
1394 | /* set VPU clock to 166 MHz */ |
1395 | clk = clk_get(NULL, "vpu_clk"); | |
56ea5109 | 1396 | if (!IS_ERR(clk)) { |
10305853 KM |
1397 | clk_set_rate(clk, clk_round_rate(clk, 166000000)); |
1398 | clk_put(clk); | |
1399 | } | |
6f26d19f | 1400 | |
26365716 KM |
1401 | /* enable IrDA */ |
1402 | gpio_request(GPIO_FN_IRDA_OUT, NULL); | |
1403 | gpio_request(GPIO_FN_IRDA_IN, NULL); | |
1404 | gpio_request(GPIO_PTU5, NULL); | |
1405 | gpio_direction_output(GPIO_PTU5, 0); | |
1406 | ||
c2f9b05f JM |
1407 | /* Register gpio lookup tables for cameras and video decoder */ |
1408 | gpiod_add_lookup_table(&tw9910_gpios); | |
1409 | gpiod_add_lookup_table(&mt9t112_0_gpios); | |
1410 | gpiod_add_lookup_table(&mt9t112_1_gpios); | |
1411 | ||
125ecce6 | 1412 | /* enable I2C device */ |
1980fdc4 KM |
1413 | i2c_register_board_info(0, i2c0_devices, |
1414 | ARRAY_SIZE(i2c0_devices)); | |
1415 | ||
125ecce6 KM |
1416 | i2c_register_board_info(1, i2c1_devices, |
1417 | ARRAY_SIZE(i2c1_devices)); | |
1418 | ||
92359a70 | 1419 | #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE) |
aee5ab0b GL |
1420 | /* VOU */ |
1421 | gpio_request(GPIO_FN_DV_D15, NULL); | |
1422 | gpio_request(GPIO_FN_DV_D14, NULL); | |
1423 | gpio_request(GPIO_FN_DV_D13, NULL); | |
1424 | gpio_request(GPIO_FN_DV_D12, NULL); | |
1425 | gpio_request(GPIO_FN_DV_D11, NULL); | |
1426 | gpio_request(GPIO_FN_DV_D10, NULL); | |
1427 | gpio_request(GPIO_FN_DV_D9, NULL); | |
1428 | gpio_request(GPIO_FN_DV_D8, NULL); | |
1429 | gpio_request(GPIO_FN_DV_CLKI, NULL); | |
1430 | gpio_request(GPIO_FN_DV_CLK, NULL); | |
1431 | gpio_request(GPIO_FN_DV_VSYNC, NULL); | |
1432 | gpio_request(GPIO_FN_DV_HSYNC, NULL); | |
1433 | ||
1434 | /* AK8813 power / reset sequence */ | |
1435 | gpio_request(GPIO_PTG4, NULL); | |
1436 | gpio_request(GPIO_PTU3, NULL); | |
1437 | /* Reset */ | |
1438 | gpio_direction_output(GPIO_PTG4, 0); | |
1439 | /* Power down */ | |
1440 | gpio_direction_output(GPIO_PTU3, 1); | |
1441 | ||
1442 | udelay(10); | |
1443 | ||
1444 | /* Power up, reset */ | |
1445 | gpio_set_value(GPIO_PTU3, 0); | |
1446 | ||
1447 | udelay(10); | |
1448 | ||
1449 | /* Remove reset */ | |
1450 | gpio_set_value(GPIO_PTG4, 1); | |
92359a70 | 1451 | #endif |
aee5ab0b | 1452 | |
c2f9b05f JM |
1453 | /* Initialize CEU platform devices separately to map memory first */ |
1454 | device_initialize(&ecovec_ceu_devices[0]->dev); | |
c2f9b05f JM |
1455 | dma_declare_coherent_memory(&ecovec_ceu_devices[0]->dev, |
1456 | ceu0_dma_membase, ceu0_dma_membase, | |
fb60211f | 1457 | CEU_BUFFER_MEMORY_SIZE); |
c2f9b05f JM |
1458 | platform_device_add(ecovec_ceu_devices[0]); |
1459 | ||
1460 | device_initialize(&ecovec_ceu_devices[1]->dev); | |
c2f9b05f JM |
1461 | dma_declare_coherent_memory(&ecovec_ceu_devices[1]->dev, |
1462 | ceu1_dma_membase, ceu1_dma_membase, | |
fb60211f | 1463 | CEU_BUFFER_MEMORY_SIZE); |
c2f9b05f JM |
1464 | platform_device_add(ecovec_ceu_devices[1]); |
1465 | ||
efdfeb07 LW |
1466 | gpiod_add_lookup_table(&cn12_power_gpiod_table); |
1467 | #if defined(CONFIG_MMC_SDHI) || defined(CONFIG_MMC_SDHI_MODULE) | |
1468 | gpiod_add_lookup_table(&sdhi0_power_gpiod_table); | |
faed9303 | 1469 | gpiod_add_lookup_table(&sdhi0_gpio_table); |
faed9303 LW |
1470 | #if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE) |
1471 | gpiod_add_lookup_table(&sdhi1_gpio_table); | |
c4916c24 | 1472 | #endif |
efdfeb07 LW |
1473 | #endif |
1474 | ||
d9e2b6ee BG |
1475 | gpiod_add_lookup_table(&gpio_backlight_lookup); |
1476 | gpio_backlight_device = platform_device_register_full( | |
1477 | &gpio_backlight_device_info); | |
1478 | if (IS_ERR(gpio_backlight_device)) | |
1479 | return PTR_ERR(gpio_backlight_device); | |
1480 | ||
4138b740 KM |
1481 | return platform_add_devices(ecovec_devices, |
1482 | ARRAY_SIZE(ecovec_devices)); | |
1483 | } | |
4907d57f KM |
1484 | arch_initcall(arch_setup); |
1485 | ||
1486 | static int __init devices_setup(void) | |
1487 | { | |
376abbb4 | 1488 | sh_eth_init(&sh_eth_plat); |
4907d57f KM |
1489 | return 0; |
1490 | } | |
1491 | device_initcall(devices_setup); | |
1492 | ||
c2f9b05f JM |
1493 | /* Reserve a portion of memory for CEU 0 and CEU 1 buffers */ |
1494 | static void __init ecovec_mv_mem_reserve(void) | |
1495 | { | |
1496 | phys_addr_t phys; | |
1497 | phys_addr_t size = CEU_BUFFER_MEMORY_SIZE; | |
1498 | ||
f240ec09 | 1499 | phys = memblock_phys_alloc(size, PAGE_SIZE); |
ecc3e771 MR |
1500 | if (!phys) |
1501 | panic("Failed to allocate CEU0 memory\n"); | |
1502 | ||
3ecc6834 | 1503 | memblock_phys_free(phys, size); |
c2f9b05f JM |
1504 | memblock_remove(phys, size); |
1505 | ceu0_dma_membase = phys; | |
1506 | ||
f240ec09 | 1507 | phys = memblock_phys_alloc(size, PAGE_SIZE); |
ecc3e771 MR |
1508 | if (!phys) |
1509 | panic("Failed to allocate CEU1 memory\n"); | |
1510 | ||
3ecc6834 | 1511 | memblock_phys_free(phys, size); |
c2f9b05f JM |
1512 | memblock_remove(phys, size); |
1513 | ceu1_dma_membase = phys; | |
1514 | } | |
1515 | ||
4138b740 KM |
1516 | static struct sh_machine_vector mv_ecovec __initmv = { |
1517 | .mv_name = "R0P7724 (EcoVec)", | |
c2f9b05f | 1518 | .mv_mem_reserve = ecovec_mv_mem_reserve, |
4138b740 | 1519 | }; |