[linux-2.6-block.git] / arch / sh / boards / board-polaris.c

// SPDX-License-Identifier: GPL-2.0
/*
 * June 2006 Steve Glendinning <steve.glendinning@shawell.net>
 *
 * Polaris-specific resource declaration
 *
 */

#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/platform_device.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <linux/io.h>
#include <asm/irq.h>
#include <asm/machvec.h>
#include <asm/heartbeat.h>
#include <cpu/gpio.h>
#include <mach-se/mach/se.h>

#define BCR2		(0xFFFFFF62)
#define WCR2		(0xFFFFFF66)
#define AREA5_WAIT_CTRL	(0x1C00)
#define WAIT_STATES_10	(0x7)

/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
	REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
	REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
};

static struct resource smsc911x_resources[] = {
	[0] = {
		.name		= "smsc911x-memory",
		.start		= PA_EXT5,
		.end		= PA_EXT5 + 0x1fff,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.name		= "smsc911x-irq",
		.start		= IRQ0_IRQ,
		.end		= IRQ0_IRQ,
		.flags		= IORESOURCE_IRQ,
	},
};

static struct smsc911x_platform_config smsc911x_config = {
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags		= SMSC911X_USE_32BIT,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
};

static struct platform_device smsc911x_device = {
	.name		= "smsc911x",
	.id		= 0,
	.num_resources	= ARRAY_SIZE(smsc911x_resources),
	.resource	= smsc911x_resources,
	.dev = {
		.platform_data = &smsc911x_config,
	},
};

static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };

static struct heartbeat_data heartbeat_data = {
	.bit_pos	= heartbeat_bit_pos,
	.nr_bits	= ARRAY_SIZE(heartbeat_bit_pos),
};

static struct resource heartbeat_resource = {
	.start	= PORT_PCDR,
	.end	= PORT_PCDR,
	.flags	= IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
};

static struct platform_device heartbeat_device = {
	.name		= "heartbeat",
	.id		= -1,
	.dev	= {
		.platform_data	= &heartbeat_data,
	},
	.num_resources	= 1,
	.resource	= &heartbeat_resource,
};

static struct platform_device *polaris_devices[] __initdata = {
	&smsc911x_device,
	&heartbeat_device,
};

static int __init polaris_initialise(void)
{
	u16 wcr, bcr_mask;

	printk(KERN_INFO "Configuring Polaris external bus\n");

	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));

	/* Configure area 5 with 2 wait states */
	wcr = __raw_readw(WCR2);
	wcr &= (~AREA5_WAIT_CTRL);
	wcr |= (WAIT_STATES_10 << 10);
	__raw_writew(wcr, WCR2);

	/* Configure area 5 for 32-bit access */
	bcr_mask = __raw_readw(BCR2);
	bcr_mask |= 1 << 10;
	__raw_writew(bcr_mask, BCR2);

	return platform_add_devices(polaris_devices,
				    ARRAY_SIZE(polaris_devices));
}
arch_initcall(polaris_initialise);

static struct ipr_data ipr_irq_table[] = {
	/* External IRQs */
	{ IRQ0_IRQ, 0,  0,  1, },	/* IRQ0 */
	{ IRQ1_IRQ, 0,  4,  1, },	/* IRQ1 */
};

static unsigned long ipr_offsets[] = {
	INTC_IPRC
};

static struct ipr_desc ipr_irq_desc = {
	.ipr_offsets	= ipr_offsets,
	.nr_offsets	= ARRAY_SIZE(ipr_offsets),

	.ipr_data	= ipr_irq_table,
	.nr_irqs	= ARRAY_SIZE(ipr_irq_table),
	.chip = {
		.name	= "sh7709-ext",
	},
};

static void __init init_polaris_irq(void)
{
	/* Disable all interrupts */
	__raw_writew(0, BCR_ILCRA);
	__raw_writew(0, BCR_ILCRB);
	__raw_writew(0, BCR_ILCRC);
	__raw_writew(0, BCR_ILCRD);
	__raw_writew(0, BCR_ILCRE);
	__raw_writew(0, BCR_ILCRF);
	__raw_writew(0, BCR_ILCRG);

	register_ipr_controller(&ipr_irq_desc);
}

static struct sh_machine_vector mv_polaris __initmv = {
	.mv_name		= "Polaris",
	.mv_init_irq		= init_polaris_irq,
};
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
eaeed5d3	2	/*
90b24cfb	3	* June 2006 Steve Glendinning <steve.glendinning@shawell.net>
eaeed5d3 SG	4	*
	5	* Polaris-specific resource declaration
	6	*
	7	*/
	8
	9	#include <linux/init.h>
	10	#include <linux/interrupt.h>
	11	#include <linux/irq.h>
	12	#include <linux/platform_device.h>
73c2a9dc GL	13	#include <linux/regulator/fixed.h>
73c2a9dc GL	14	#include <linux/regulator/machine.h>
eaeed5d3 SG	15	#include <linux/smsc911x.h>
	16	#include <linux/io.h>
	17	#include <asm/irq.h>
	18	#include <asm/machvec.h>
	19	#include <asm/heartbeat.h>
	20	#include <cpu/gpio.h>
	21	#include <mach-se/mach/se.h>
	22
	23	#define BCR2 (0xFFFFFF62)
	24	#define WCR2 (0xFFFFFF66)
	25	#define AREA5_WAIT_CTRL (0x1C00)
	26	#define WAIT_STATES_10 (0x7)
	27
73c2a9dc GL	28	/* Dummy supplies, where voltage doesn't matter */
	29	static struct regulator_consumer_supply dummy_supplies[] = {
	30	REGULATOR_SUPPLY("vddvario", "smsc911x.0"),
	31	REGULATOR_SUPPLY("vdd33a", "smsc911x.0"),
	32	};
	33
eaeed5d3 SG	34	static struct resource smsc911x_resources[] = {
	35	[0] = {
	36	.name = "smsc911x-memory",
	37	.start = PA_EXT5,
	38	.end = PA_EXT5 + 0x1fff,
	39	.flags = IORESOURCE_MEM,
	40	},
	41	[1] = {
	42	.name = "smsc911x-irq",
	43	.start = IRQ0_IRQ,
	44	.end = IRQ0_IRQ,
	45	.flags = IORESOURCE_IRQ,
	46	},
	47	};
	48
	49	static struct smsc911x_platform_config smsc911x_config = {
	50	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	51	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	52	.flags = SMSC911X_USE_32BIT,
	53	.phy_interface = PHY_INTERFACE_MODE_MII,
	54	};
	55
	56	static struct platform_device smsc911x_device = {
	57	.name = "smsc911x",
	58	.id = 0,
	59	.num_resources = ARRAY_SIZE(smsc911x_resources),
	60	.resource = smsc911x_resources,
	61	.dev = {
	62	.platform_data = &smsc911x_config,
	63	},
	64	};
	65
	66	static unsigned char heartbeat_bit_pos[] = { 0, 1, 2, 3 };
	67
	68	static struct heartbeat_data heartbeat_data = {
	69	.bit_pos = heartbeat_bit_pos,
	70	.nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
eaeed5d3 SG	71	};
eaeed5d3 SG	72
a09d2831 PM	73	static struct resource heartbeat_resource = {
	74	.start = PORT_PCDR,
	75	.end = PORT_PCDR,
	76	.flags = IORESOURCE_MEM \| IORESOURCE_MEM_8BIT,
eaeed5d3 SG	77	};
	78
	79	static struct platform_device heartbeat_device = {
	80	.name = "heartbeat",
	81	.id = -1,
	82	.dev = {
	83	.platform_data = &heartbeat_data,
	84	},
a09d2831 PM	85	.num_resources = 1,
a09d2831 PM	86	.resource = &heartbeat_resource,
eaeed5d3 SG	87	};
	88
	89	static struct platform_device *polaris_devices[] __initdata = {
	90	&smsc911x_device,
	91	&heartbeat_device,
	92	};
	93
	94	static int __init polaris_initialise(void)
	95	{
	96	u16 wcr, bcr_mask;
	97
	98	printk(KERN_INFO "Configuring Polaris external bus\n");
	99
73c2a9dc GL	100	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
73c2a9dc GL	101
eaeed5d3	102	/* Configure area 5 with 2 wait states */
9d56dd3b	103	wcr = __raw_readw(WCR2);
eaeed5d3 SG	104	wcr &= (~AREA5_WAIT_CTRL);
eaeed5d3 SG	105	wcr \|= (WAIT_STATES_10 << 10);
9d56dd3b	106	__raw_writew(wcr, WCR2);
eaeed5d3 SG	107
eaeed5d3 SG	108	/* Configure area 5 for 32-bit access */
9d56dd3b	109	bcr_mask = __raw_readw(BCR2);
eaeed5d3	110	bcr_mask \|= 1 << 10;
9d56dd3b	111	__raw_writew(bcr_mask, BCR2);
eaeed5d3 SG	112
	113	return platform_add_devices(polaris_devices,
	114	ARRAY_SIZE(polaris_devices));
	115	}
	116	arch_initcall(polaris_initialise);
	117
	118	static struct ipr_data ipr_irq_table[] = {
	119	/* External IRQs */
	120	{ IRQ0_IRQ, 0, 0, 1, }, /* IRQ0 */
	121	{ IRQ1_IRQ, 0, 4, 1, }, /* IRQ1 */
	122	};
	123
	124	static unsigned long ipr_offsets[] = {
	125	INTC_IPRC
	126	};
	127
	128	static struct ipr_desc ipr_irq_desc = {
	129	.ipr_offsets = ipr_offsets,
	130	.nr_offsets = ARRAY_SIZE(ipr_offsets),
	131
	132	.ipr_data = ipr_irq_table,
	133	.nr_irqs = ARRAY_SIZE(ipr_irq_table),
	134	.chip = {
	135	.name = "sh7709-ext",
	136	},
	137	};
	138
	139	static void __init init_polaris_irq(void)
	140	{
	141	/* Disable all interrupts */
9d56dd3b PM	142	__raw_writew(0, BCR_ILCRA);
	143	__raw_writew(0, BCR_ILCRB);
	144	__raw_writew(0, BCR_ILCRC);
	145	__raw_writew(0, BCR_ILCRD);
	146	__raw_writew(0, BCR_ILCRE);
	147	__raw_writew(0, BCR_ILCRF);
	148	__raw_writew(0, BCR_ILCRG);
eaeed5d3 SG	149
	150	register_ipr_controller(&ipr_irq_desc);
	151	}
	152
	153	static struct sh_machine_vector mv_polaris __initmv = {
	154	.mv_name = "Polaris",
eaeed5d3 SG	155	.mv_init_irq = init_polaris_irq,
eaeed5d3 SG	156	};