[linux-2.6-block.git] / arch / sh / boards / board-apsh4ad0a.c

/*
 * ALPHAPROJECT AP-SH4AD-0A Support.
 *
 * Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
 * Copyright (C) 2010  Matt Fleming
 * Copyright (C) 2010  Paul Mundt
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/regulator/fixed.h>
#include <linux/regulator/machine.h>
#include <linux/smsc911x.h>
#include <linux/irq.h>
#include <linux/clk.h>
#include <asm/machvec.h>
#include <asm/sizes.h>

/* Dummy supplies, where voltage doesn't matter */
static struct regulator_consumer_supply dummy_supplies[] = {
	REGULATOR_SUPPLY("vddvario", "smsc911x"),
	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
};

static struct resource smsc911x_resources[] = {
	[0] = {
		.name		= "smsc911x-memory",
		.start		= 0xA4000000,
		.end		= 0xA4000000 + SZ_256 - 1,
		.flags		= IORESOURCE_MEM,
	},
	[1] = {
		.name		= "smsc911x-irq",
		.start		= evt2irq(0x200),
		.end		= evt2irq(0x200),
		.flags		= IORESOURCE_IRQ,
	},
};

static struct smsc911x_platform_config smsc911x_config = {
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags		= SMSC911X_USE_16BIT,
	.phy_interface	= PHY_INTERFACE_MODE_MII,
};

static struct platform_device smsc911x_device = {
	.name		= "smsc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(smsc911x_resources),
	.resource	= smsc911x_resources,
	.dev = {
		.platform_data = &smsc911x_config,
	},
};

static struct platform_device *apsh4ad0a_devices[] __initdata = {
	&smsc911x_device,
};

static int __init apsh4ad0a_devices_setup(void)
{
	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));

	return platform_add_devices(apsh4ad0a_devices,
				    ARRAY_SIZE(apsh4ad0a_devices));
}
device_initcall(apsh4ad0a_devices_setup);

static int apsh4ad0a_mode_pins(void)
{
	int value = 0;

	/* These are the factory default settings of SW1 and SW2.
	 * If you change these dip switches then you will need to
	 * adjust the values below as well.
	 */
	value |=  MODE_PIN0;  /* Clock Mode 3 */
	value |=  MODE_PIN1;
	value &= ~MODE_PIN2;
	value &= ~MODE_PIN3;
	value &= ~MODE_PIN4;  /* 16-bit Area0 bus width  */
	value |=  MODE_PIN5;
	value |=  MODE_PIN6;
	value |=  MODE_PIN7;  /* Normal mode */
	value |=  MODE_PIN8;  /* Little Endian */
	value |=  MODE_PIN9;  /* Crystal resonator */
	value &= ~MODE_PIN10; /* 29-bit address mode */
	value &= ~MODE_PIN11; /* PCI-E Root port */
	value &= ~MODE_PIN12; /* 4 lane + 1 lane */
	value |=  MODE_PIN13; /* AUD Enable */
	value &= ~MODE_PIN14; /* Normal Operation */

	return value;
}

static int apsh4ad0a_clk_init(void)
{
	struct clk *clk;
	int ret;

	clk = clk_get(NULL, "extal");
	if (IS_ERR(clk))
		return PTR_ERR(clk);
	ret = clk_set_rate(clk, 33333000);
	clk_put(clk);

	return ret;
}

/* Initialize the board */
static void __init apsh4ad0a_setup(char **cmdline_p)
{
	pr_info("Alpha Project AP-SH4AD-0A support:\n");
}

static void __init apsh4ad0a_init_irq(void)
{
	plat_irq_setup_pins(IRQ_MODE_IRQ3210);
}

/*
 * The Machine Vector
 */
static struct sh_machine_vector mv_apsh4ad0a __initmv = {
	.mv_name		= "AP-SH4AD-0A",
	.mv_setup		= apsh4ad0a_setup,
	.mv_mode_pins		= apsh4ad0a_mode_pins,
	.mv_clk_init		= apsh4ad0a_clk_init,
	.mv_init_irq		= apsh4ad0a_init_irq,
};
Commit	Line	Data
8a453cac PM	1	/*
	2	* ALPHAPROJECT AP-SH4AD-0A Support.
	3	*
	4	* Copyright (C) 2010 ALPHAPROJECT Co.,Ltd.
	5	* Copyright (C) 2010 Matt Fleming
	6	* Copyright (C) 2010 Paul Mundt
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12	#include <linux/init.h>
	13	#include <linux/platform_device.h>
	14	#include <linux/io.h>
1f8eca12 GL	15	#include <linux/regulator/fixed.h>
1f8eca12 GL	16	#include <linux/regulator/machine.h>
8a453cac PM	17	#include <linux/smsc911x.h>
	18	#include <linux/irq.h>
	19	#include <linux/clk.h>
	20	#include <asm/machvec.h>
	21	#include <asm/sizes.h>
	22
1f8eca12 GL	23	/* Dummy supplies, where voltage doesn't matter */
	24	static struct regulator_consumer_supply dummy_supplies[] = {
	25	REGULATOR_SUPPLY("vddvario", "smsc911x"),
	26	REGULATOR_SUPPLY("vdd33a", "smsc911x"),
	27	};
	28
8a453cac PM	29	static struct resource smsc911x_resources[] = {
	30	[0] = {
	31	.name = "smsc911x-memory",
	32	.start = 0xA4000000,
	33	.end = 0xA4000000 + SZ_256 - 1,
	34	.flags = IORESOURCE_MEM,
	35	},
	36	[1] = {
	37	.name = "smsc911x-irq",
	38	.start = evt2irq(0x200),
	39	.end = evt2irq(0x200),
	40	.flags = IORESOURCE_IRQ,
	41	},
	42	};
	43
	44	static struct smsc911x_platform_config smsc911x_config = {
	45	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	46	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	47	.flags = SMSC911X_USE_16BIT,
	48	.phy_interface = PHY_INTERFACE_MODE_MII,
	49	};
	50
	51	static struct platform_device smsc911x_device = {
	52	.name = "smsc911x",
	53	.id = -1,
	54	.num_resources = ARRAY_SIZE(smsc911x_resources),
	55	.resource = smsc911x_resources,
	56	.dev = {
	57	.platform_data = &smsc911x_config,
	58	},
	59	};
	60
	61	static struct platform_device *apsh4ad0a_devices[] __initdata = {
	62	&smsc911x_device,
	63	};
	64
	65	static int __init apsh4ad0a_devices_setup(void)
	66	{
1f8eca12 GL	67	regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
1f8eca12 GL	68
8a453cac PM	69	return platform_add_devices(apsh4ad0a_devices,
	70	ARRAY_SIZE(apsh4ad0a_devices));
	71	}
	72	device_initcall(apsh4ad0a_devices_setup);
	73
	74	static int apsh4ad0a_mode_pins(void)
	75	{
	76	int value = 0;
	77
	78	/* These are the factory default settings of SW1 and SW2.
	79	* If you change these dip switches then you will need to
	80	* adjust the values below as well.
	81	*/
	82	value \|= MODE_PIN0; /* Clock Mode 3 */
	83	value \|= MODE_PIN1;
	84	value &= ~MODE_PIN2;
	85	value &= ~MODE_PIN3;
	86	value &= ~MODE_PIN4; /* 16-bit Area0 bus width */
	87	value \|= MODE_PIN5;
	88	value \|= MODE_PIN6;
	89	value \|= MODE_PIN7; /* Normal mode */
	90	value \|= MODE_PIN8; /* Little Endian */
	91	value \|= MODE_PIN9; /* Crystal resonator */
	92	value &= ~MODE_PIN10; /* 29-bit address mode */
	93	value &= ~MODE_PIN11; /* PCI-E Root port */
	94	value &= ~MODE_PIN12; /* 4 lane + 1 lane */
	95	value \|= MODE_PIN13; /* AUD Enable */
	96	value &= ~MODE_PIN14; /* Normal Operation */
	97
	98	return value;
	99	}
	100
	101	static int apsh4ad0a_clk_init(void)
	102	{
	103	struct clk *clk;
	104	int ret;
	105
	106	clk = clk_get(NULL, "extal");
7912825d	107	if (IS_ERR(clk))
8a453cac PM	108	return PTR_ERR(clk);
	109	ret = clk_set_rate(clk, 33333000);
	110	clk_put(clk);
	111
	112	return ret;
	113	}
	114
	115	/* Initialize the board */
	116	static void __init apsh4ad0a_setup(char **cmdline_p)
	117	{
	118	pr_info("Alpha Project AP-SH4AD-0A support:\n");
	119	}
	120
	121	static void __init apsh4ad0a_init_irq(void)
	122	{
	123	plat_irq_setup_pins(IRQ_MODE_IRQ3210);
	124	}
	125
	126	/*
	127	* The Machine Vector
	128	*/
	129	static struct sh_machine_vector mv_apsh4ad0a __initmv = {
	130	.mv_name = "AP-SH4AD-0A",
	131	.mv_setup = apsh4ad0a_setup,
	132	.mv_mode_pins = apsh4ad0a_mode_pins,
	133	.mv_clk_init = apsh4ad0a_clk_init,
	134	.mv_init_irq = apsh4ad0a_init_irq,
	135	};