[linux-block.git] / arch / sh / boards / board-ap325rxa.c

/*
 * Renesas - AP-325RXA
 * (Compatible with Algo System ., LTD. - AP-320A)
 *
 * Copyright (C) 2008 Renesas Solutions Corp.
 * Author : Yusuke Goda <goda.yuske@renesas.com>
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/init.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/sh_flctl.h>
#include <linux/delay.h>
#include <linux/i2c.h>
#include <linux/smsc911x.h>
#include <linux/gpio.h>
#include <media/soc_camera_platform.h>
#include <media/sh_mobile_ceu.h>
#include <video/sh_mobile_lcdc.h>
#include <asm/io.h>
#include <asm/clock.h>
#include <cpu/sh7723.h>

static struct smsc911x_platform_config smsc911x_config = {
	.phy_interface	= PHY_INTERFACE_MODE_MII,
	.irq_polarity	= SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	.irq_type	= SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	.flags		= SMSC911X_USE_32BIT,
};

static struct resource smsc9118_resources[] = {
	[0] = {
		.start	= 0xb6080000,
		.end	= 0xb60fffff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 35,
		.end	= 35,
		.flags	= IORESOURCE_IRQ,
	}
};

static struct platform_device smsc9118_device = {
	.name		= "smsc911x",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(smsc9118_resources),
	.resource	= smsc9118_resources,
	.dev		= {
		.platform_data = &smsc911x_config,
	},
};

/*
 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
 * If this area erased, this board can not boot.
 */
static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
	{
		.name = "uboot",
		.offset = 0,
		.size = (1 * 1024 * 1024),
		.mask_flags = MTD_WRITEABLE,	/* Read-only */
	}, {
		.name = "kernel",
		.offset = MTDPART_OFS_APPEND,
		.size = (2 * 1024 * 1024),
	}, {
		.name = "free-area0",
		.offset = MTDPART_OFS_APPEND,
		.size = ((7 * 1024 * 1024) + (512 * 1024)),
	}, {
		.name = "CPLD-Data",
		.offset = MTDPART_OFS_APPEND,
		.mask_flags = MTD_WRITEABLE,	/* Read-only */
		.size = (1024 * 128 * 2),
	}, {
		.name = "free-area1",
		.offset = MTDPART_OFS_APPEND,
		.size = MTDPART_SIZ_FULL,
	},
};

static struct physmap_flash_data ap325rxa_nor_flash_data = {
	.width		= 2,
	.parts		= ap325rxa_nor_flash_partitions,
	.nr_parts	= ARRAY_SIZE(ap325rxa_nor_flash_partitions),
};

static struct resource ap325rxa_nor_flash_resources[] = {
	[0] = {
		.name	= "NOR Flash",
		.start	= 0x00000000,
		.end	= 0x00ffffff,
		.flags	= IORESOURCE_MEM,
	}
};

static struct platform_device ap325rxa_nor_flash_device = {
	.name		= "physmap-flash",
	.resource	= ap325rxa_nor_flash_resources,
	.num_resources	= ARRAY_SIZE(ap325rxa_nor_flash_resources),
	.dev		= {
		.platform_data = &ap325rxa_nor_flash_data,
	},
};

static struct mtd_partition nand_partition_info[] = {
	{
		.name	= "nand_data",
		.offset	= 0,
		.size	= MTDPART_SIZ_FULL,
	},
};

static struct resource nand_flash_resources[] = {
	[0] = {
		.start	= 0xa4530000,
		.end	= 0xa45300ff,
		.flags	= IORESOURCE_MEM,
	}
};

static struct sh_flctl_platform_data nand_flash_data = {
	.parts		= nand_partition_info,
	.nr_parts	= ARRAY_SIZE(nand_partition_info),
	.flcmncr_val	= FCKSEL_E | TYPESEL_SET | NANWF_E,
	.has_hwecc	= 1,
};

static struct platform_device nand_flash_device = {
	.name		= "sh_flctl",
	.resource	= nand_flash_resources,
	.num_resources	= ARRAY_SIZE(nand_flash_resources),
	.dev		= {
		.platform_data = &nand_flash_data,
	},
};

#define FPGA_LCDREG	0xB4100180
#define FPGA_BKLREG	0xB4100212
#define FPGA_LCDREG_VAL	0x0018
#define PORT_MSELCRB	0xA4050182
#define PORT_HIZCRC	0xA405015C
#define PORT_DRVCRA	0xA405018A
#define PORT_DRVCRB	0xA405018C

static void ap320_wvga_power_on(void *board_data)
{
	msleep(100);

	/* ASD AP-320/325 LCD ON */
	ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);

	/* backlight */
	gpio_set_value(GPIO_PTS3, 0);
	ctrl_outw(0x100, FPGA_BKLREG);
}

static struct sh_mobile_lcdc_info lcdc_info = {
	.clock_source = LCDC_CLK_EXTERNAL,
	.ch[0] = {
		.chan = LCDC_CHAN_MAINLCD,
		.bpp = 16,
		.interface_type = RGB18,
		.clock_divider = 1,
		.lcd_cfg = {
			.name = "LB070WV1",
			.xres = 800,
			.yres = 480,
			.left_margin = 40,
			.right_margin = 160,
			.hsync_len = 8,
			.upper_margin = 63,
			.lower_margin = 80,
			.vsync_len = 1,
			.sync = 0, /* hsync and vsync are active low */
		},
		.lcd_size_cfg = { /* 7.0 inch */
			.width = 152,
			.height = 91,
		},
		.board_cfg = {
			.display_on = ap320_wvga_power_on,
		},
	}
};

static struct resource lcdc_resources[] = {
	[0] = {
		.name	= "LCDC",
		.start	= 0xfe940000, /* P4-only space */
		.end	= 0xfe941fff,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= 28,
		.flags	= IORESOURCE_IRQ,
	},
};

static struct platform_device lcdc_device = {
	.name		= "sh_mobile_lcdc_fb",
	.num_resources	= ARRAY_SIZE(lcdc_resources),
	.resource	= lcdc_resources,
	.dev		= {
		.platform_data	= &lcdc_info,
	},
};

#ifdef CONFIG_I2C
static unsigned char camera_ncm03j_magic[] =
{
	0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
	0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
	0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
	0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
	0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
	0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
	0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
	0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
	0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
	0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
	0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
	0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
	0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
	0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
	0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
	0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
};

static int camera_set_capture(struct soc_camera_platform_info *info,
			      int enable)
{
	struct i2c_adapter *a = i2c_get_adapter(0);
	struct i2c_msg msg;
	int ret = 0;
	int i;

	if (!enable)
		return 0; /* no disable for now */

	for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
		u_int8_t buf[8];

		msg.addr = 0x6e;
		msg.buf = buf;
		msg.len = 2;
		msg.flags = 0;

		buf[0] = camera_ncm03j_magic[i];
		buf[1] = camera_ncm03j_magic[i + 1];

		ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
	}

	return ret;
}

static struct soc_camera_platform_info camera_info = {
	.iface = 0,
	.format_name = "UYVY",
	.format_depth = 16,
	.format = {
		.pixelformat = V4L2_PIX_FMT_UYVY,
		.colorspace = V4L2_COLORSPACE_SMPTE170M,
		.width = 640,
		.height = 480,
	},
	.bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
	SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
	.set_capture = camera_set_capture,
};

static struct platform_device camera_device = {
	.name		= "soc_camera_platform",
	.dev		= {
		.platform_data	= &camera_info,
	},
};
#endif /* CONFIG_I2C */

static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
	.flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
	SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
};

static struct resource ceu_resources[] = {
	[0] = {
		.name	= "CEU",
		.start	= 0xfe910000,
		.end	= 0xfe91009f,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start  = 52,
		.flags  = IORESOURCE_IRQ,
	},
	[2] = {
		/* place holder for contiguous memory */
	},
};

static struct platform_device ceu_device = {
	.name		= "sh_mobile_ceu",
	.id             = 0, /* "ceu0" clock */
	.num_resources	= ARRAY_SIZE(ceu_resources),
	.resource	= ceu_resources,
	.dev		= {
		.platform_data	= &sh_mobile_ceu_info,
	},
};

static struct platform_device *ap325rxa_devices[] __initdata = {
	&smsc9118_device,
	&ap325rxa_nor_flash_device,
	&lcdc_device,
	&ceu_device,
#ifdef CONFIG_I2C
	&camera_device,
#endif
	&nand_flash_device,
};

static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
	{
		I2C_BOARD_INFO("pcf8563", 0x51),
	},
};

static int __init ap325rxa_devices_setup(void)
{
	/* LD3 and LD4 LEDs */
	gpio_request(GPIO_PTX5, NULL); /* RUN */
	gpio_direction_output(GPIO_PTX5, 1);
	gpio_export(GPIO_PTX5, 0);

	gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
	gpio_direction_output(GPIO_PTX4, 0);
	gpio_export(GPIO_PTX4, 0);

	/* SW1 input */
	gpio_request(GPIO_PTF7, NULL); /* MODE */
	gpio_direction_input(GPIO_PTF7);
	gpio_export(GPIO_PTF7, 0);

	/* LCDC */
	gpio_request(GPIO_FN_LCDD15, NULL);
	gpio_request(GPIO_FN_LCDD14, NULL);
	gpio_request(GPIO_FN_LCDD13, NULL);
	gpio_request(GPIO_FN_LCDD12, NULL);
	gpio_request(GPIO_FN_LCDD11, NULL);
	gpio_request(GPIO_FN_LCDD10, NULL);
	gpio_request(GPIO_FN_LCDD9, NULL);
	gpio_request(GPIO_FN_LCDD8, NULL);
	gpio_request(GPIO_FN_LCDD7, NULL);
	gpio_request(GPIO_FN_LCDD6, NULL);
	gpio_request(GPIO_FN_LCDD5, NULL);
	gpio_request(GPIO_FN_LCDD4, NULL);
	gpio_request(GPIO_FN_LCDD3, NULL);
	gpio_request(GPIO_FN_LCDD2, NULL);
	gpio_request(GPIO_FN_LCDD1, NULL);
	gpio_request(GPIO_FN_LCDD0, NULL);
	gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
	gpio_request(GPIO_FN_LCDDCK, NULL);
	gpio_request(GPIO_FN_LCDVEPWC, NULL);
	gpio_request(GPIO_FN_LCDVCPWC, NULL);
	gpio_request(GPIO_FN_LCDVSYN, NULL);
	gpio_request(GPIO_FN_LCDHSYN, NULL);
	gpio_request(GPIO_FN_LCDDISP, NULL);
	gpio_request(GPIO_FN_LCDDON, NULL);

	/* LCD backlight */
	gpio_request(GPIO_PTS3, NULL);
	gpio_direction_output(GPIO_PTS3, 1);

	/* CEU */
	gpio_request(GPIO_FN_VIO_CLK2, NULL);
	gpio_request(GPIO_FN_VIO_VD2, NULL);
	gpio_request(GPIO_FN_VIO_HD2, NULL);
	gpio_request(GPIO_FN_VIO_FLD, NULL);
	gpio_request(GPIO_FN_VIO_CKO, NULL);
	gpio_request(GPIO_FN_VIO_D15, NULL);
	gpio_request(GPIO_FN_VIO_D14, NULL);
	gpio_request(GPIO_FN_VIO_D13, NULL);
	gpio_request(GPIO_FN_VIO_D12, NULL);
	gpio_request(GPIO_FN_VIO_D11, NULL);
	gpio_request(GPIO_FN_VIO_D10, NULL);
	gpio_request(GPIO_FN_VIO_D9, NULL);
	gpio_request(GPIO_FN_VIO_D8, NULL);

	gpio_request(GPIO_PTZ7, NULL);
	gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
	gpio_request(GPIO_PTZ6, NULL);
	gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
	gpio_request(GPIO_PTZ5, NULL);
	gpio_direction_output(GPIO_PTZ5, 1); /* RST_CAM */
	gpio_request(GPIO_PTZ4, NULL);
	gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */

	ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);

	/* FLCTL */
	gpio_request(GPIO_FN_FCE, NULL);
	gpio_request(GPIO_FN_NAF7, NULL);
	gpio_request(GPIO_FN_NAF6, NULL);
	gpio_request(GPIO_FN_NAF5, NULL);
	gpio_request(GPIO_FN_NAF4, NULL);
	gpio_request(GPIO_FN_NAF3, NULL);
	gpio_request(GPIO_FN_NAF2, NULL);
	gpio_request(GPIO_FN_NAF1, NULL);
	gpio_request(GPIO_FN_NAF0, NULL);
	gpio_request(GPIO_FN_FCDE, NULL);
	gpio_request(GPIO_FN_FOE, NULL);
	gpio_request(GPIO_FN_FSC, NULL);
	gpio_request(GPIO_FN_FWE, NULL);
	gpio_request(GPIO_FN_FRB, NULL);

	ctrl_outw(0, PORT_HIZCRC);
	ctrl_outw(0xFFFF, PORT_DRVCRA);
	ctrl_outw(0xFFFF, PORT_DRVCRB);

	platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);

	i2c_register_board_info(0, ap325rxa_i2c_devices,
				ARRAY_SIZE(ap325rxa_i2c_devices));

	return platform_add_devices(ap325rxa_devices,
				ARRAY_SIZE(ap325rxa_devices));
}
device_initcall(ap325rxa_devices_setup);

static struct sh_machine_vector mv_ap325rxa __initmv = {
	.mv_name = "AP-325RXA",
};
Commit	Line	Data
04e917b6 YG	1	/*
	2	* Renesas - AP-325RXA
	3	* (Compatible with Algo System ., LTD. - AP-320A)
	4	*
	5	* Copyright (C) 2008 Renesas Solutions Corp.
	6	* Author : Yusuke Goda <goda.yuske@renesas.com>
	7	*
	8	* This file is subject to the terms and conditions of the GNU General Public
	9	* License. See the file "COPYING" in the main directory of this archive
	10	* for more details.
	11	*/
	12
	13	#include <linux/init.h>
	14	#include <linux/device.h>
4875ea22	15	#include <linux/interrupt.h>
04e917b6 YG	16	#include <linux/platform_device.h>
04e917b6 YG	17	#include <linux/mtd/physmap.h>
908978ac	18	#include <linux/mtd/sh_flctl.h>
04e917b6	19	#include <linux/delay.h>
026953db	20	#include <linux/i2c.h>
90b76491	21	#include <linux/smsc911x.h>
16587c45	22	#include <linux/gpio.h>
8b2224dc MD	23	#include <media/soc_camera_platform.h>
8b2224dc MD	24	#include <media/sh_mobile_ceu.h>
225c9a8d	25	#include <video/sh_mobile_lcdc.h>
04e917b6	26	#include <asm/io.h>
6968980a	27	#include <asm/clock.h>
f7275650	28	#include <cpu/sh7723.h>
04e917b6	29
90b76491 SG	30	static struct smsc911x_platform_config smsc911x_config = {
	31	.phy_interface = PHY_INTERFACE_MODE_MII,
	32	.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
	33	.irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
	34	.flags = SMSC911X_USE_32BIT,
4875ea22 MD	35	};
4875ea22 MD	36
90b76491	37	static struct resource smsc9118_resources[] = {
04e917b6 YG	38	[0] = {
	39	.start = 0xb6080000,
	40	.end = 0xb60fffff,
	41	.flags = IORESOURCE_MEM,
	42	},
	43	[1] = {
	44	.start = 35,
	45	.end = 35,
	46	.flags = IORESOURCE_IRQ,
	47	}
	48	};
	49
90b76491 SG	50	static struct platform_device smsc9118_device = {
90b76491 SG	51	.name = "smsc911x",
04e917b6	52	.id = -1,
90b76491 SG	53	.num_resources = ARRAY_SIZE(smsc9118_resources),
90b76491 SG	54	.resource = smsc9118_resources,
4875ea22	55	.dev = {
90b76491	56	.platform_data = &smsc911x_config,
4875ea22	57	},
04e917b6 YG	58	};
04e917b6 YG	59
aa88f169 NI	60	/*
	61	* AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
	62	* If this area erased, this board can not boot.
	63	*/
04e917b6 YG	64	static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
04e917b6 YG	65	{
aa88f169 NI	66	.name = "uboot",
	67	.offset = 0,
	68	.size = (1 * 1024 * 1024),
	69	.mask_flags = MTD_WRITEABLE, /* Read-only */
	70	}, {
	71	.name = "kernel",
	72	.offset = MTDPART_OFS_APPEND,
	73	.size = (2 * 1024 * 1024),
	74	}, {
	75	.name = "free-area0",
	76	.offset = MTDPART_OFS_APPEND,
	77	.size = ((7 * 1024 * 1024) + (512 * 1024)),
04e917b6	78	}, {
aa88f169 NI	79	.name = "CPLD-Data",
	80	.offset = MTDPART_OFS_APPEND,
	81	.mask_flags = MTD_WRITEABLE, /* Read-only */
	82	.size = (1024 * 128 * 2),
04e917b6	83	}, {
aa88f169 NI	84	.name = "free-area1",
	85	.offset = MTDPART_OFS_APPEND,
	86	.size = MTDPART_SIZ_FULL,
04e917b6 YG	87	},
	88	};
	89
	90	static struct physmap_flash_data ap325rxa_nor_flash_data = {
	91	.width = 2,
	92	.parts = ap325rxa_nor_flash_partitions,
	93	.nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
	94	};
	95
	96	static struct resource ap325rxa_nor_flash_resources[] = {
	97	[0] = {
	98	.name = "NOR Flash",
	99	.start = 0x00000000,
	100	.end = 0x00ffffff,
	101	.flags = IORESOURCE_MEM,
	102	}
	103	};
	104
	105	static struct platform_device ap325rxa_nor_flash_device = {
	106	.name = "physmap-flash",
	107	.resource = ap325rxa_nor_flash_resources,
	108	.num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
	109	.dev = {
	110	.platform_data = &ap325rxa_nor_flash_data,
	111	},
	112	};
	113
908978ac YS	114	static struct mtd_partition nand_partition_info[] = {
	115	{
	116	.name = "nand_data",
	117	.offset = 0,
	118	.size = MTDPART_SIZ_FULL,
	119	},
	120	};
	121
	122	static struct resource nand_flash_resources[] = {
	123	[0] = {
	124	.start = 0xa4530000,
	125	.end = 0xa45300ff,
	126	.flags = IORESOURCE_MEM,
	127	}
	128	};
	129
	130	static struct sh_flctl_platform_data nand_flash_data = {
	131	.parts = nand_partition_info,
	132	.nr_parts = ARRAY_SIZE(nand_partition_info),
	133	.flcmncr_val = FCKSEL_E \| TYPESEL_SET \| NANWF_E,
	134	.has_hwecc = 1,
	135	};
	136
	137	static struct platform_device nand_flash_device = {
	138	.name = "sh_flctl",
	139	.resource = nand_flash_resources,
	140	.num_resources = ARRAY_SIZE(nand_flash_resources),
	141	.dev = {
	142	.platform_data = &nand_flash_data,
	143	},
	144	};
	145
6968980a MD	146	#define FPGA_LCDREG 0xB4100180
	147	#define FPGA_BKLREG 0xB4100212
	148	#define FPGA_LCDREG_VAL 0x0018
8b2224dc	149	#define PORT_MSELCRB 0xA4050182
908978ac YS	150	#define PORT_HIZCRC 0xA405015C
	151	#define PORT_DRVCRA 0xA405018A
	152	#define PORT_DRVCRB 0xA405018C
6968980a MD	153
	154	static void ap320_wvga_power_on(void *board_data)
	155	{
	156	msleep(100);
	157
	158	/* ASD AP-320/325 LCD ON */
	159	ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
	160
	161	/* backlight */
16587c45	162	gpio_set_value(GPIO_PTS3, 0);
6968980a MD	163	ctrl_outw(0x100, FPGA_BKLREG);
	164	}
	165
	166	static struct sh_mobile_lcdc_info lcdc_info = {
	167	.clock_source = LCDC_CLK_EXTERNAL,
	168	.ch[0] = {
	169	.chan = LCDC_CHAN_MAINLCD,
	170	.bpp = 16,
	171	.interface_type = RGB18,
	172	.clock_divider = 1,
	173	.lcd_cfg = {
	174	.name = "LB070WV1",
	175	.xres = 800,
	176	.yres = 480,
	177	.left_margin = 40,
	178	.right_margin = 160,
	179	.hsync_len = 8,
	180	.upper_margin = 63,
	181	.lower_margin = 80,
	182	.vsync_len = 1,
	183	.sync = 0, /* hsync and vsync are active low */
	184	},
ce9c008c MD	185	.lcd_size_cfg = { /* 7.0 inch */
	186	.width = 152,
	187	.height = 91,
	188	},
6968980a MD	189	.board_cfg = {
	190	.display_on = ap320_wvga_power_on,
	191	},
	192	}
	193	};
	194
	195	static struct resource lcdc_resources[] = {
	196	[0] = {
	197	.name = "LCDC",
	198	.start = 0xfe940000, /* P4-only space */
	199	.end = 0xfe941fff,
	200	.flags = IORESOURCE_MEM,
	201	},
07905554 MD	202	[1] = {
	203	.start = 28,
	204	.flags = IORESOURCE_IRQ,
	205	},
6968980a MD	206	};
	207
	208	static struct platform_device lcdc_device = {
	209	.name = "sh_mobile_lcdc_fb",
	210	.num_resources = ARRAY_SIZE(lcdc_resources),
	211	.resource = lcdc_resources,
	212	.dev = {
	213	.platform_data = &lcdc_info,
	214	},
	215	};
	216
e565b518	217	#ifdef CONFIG_I2C
8b2224dc MD	218	static unsigned char camera_ncm03j_magic[] =
	219	{
	220	0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
	221	0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
	222	0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
	223	0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
	224	0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
	225	0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
	226	0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
	227	0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
	228	0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
	229	0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
	230	0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
	231	0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
	232	0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
	233	0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
	234	0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
	235	0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
	236	};
	237
	238	static int camera_set_capture(struct soc_camera_platform_info *info,
	239	int enable)
	240	{
	241	struct i2c_adapter *a = i2c_get_adapter(0);
	242	struct i2c_msg msg;
	243	int ret = 0;
	244	int i;
	245
	246	if (!enable)
	247	return 0; /* no disable for now */
	248
	249	for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
	250	u_int8_t buf[8];
	251
	252	msg.addr = 0x6e;
	253	msg.buf = buf;
	254	msg.len = 2;
	255	msg.flags = 0;
	256
	257	buf[0] = camera_ncm03j_magic[i];
	258	buf[1] = camera_ncm03j_magic[i + 1];
	259
	260	ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
	261	}
	262
	263	return ret;
	264	}
	265
	266	static struct soc_camera_platform_info camera_info = {
	267	.iface = 0,
	268	.format_name = "UYVY",
	269	.format_depth = 16,
	270	.format = {
	271	.pixelformat = V4L2_PIX_FMT_UYVY,
	272	.colorspace = V4L2_COLORSPACE_SMPTE170M,
	273	.width = 640,
	274	.height = 480,
	275	},
	276	.bus_param = SOCAM_PCLK_SAMPLE_RISING \| SOCAM_HSYNC_ACTIVE_HIGH \|
	277	SOCAM_VSYNC_ACTIVE_HIGH \| SOCAM_MASTER \| SOCAM_DATAWIDTH_8,
	278	.set_capture = camera_set_capture,
	279	};
	280
	281	static struct platform_device camera_device = {
282	.name = "soc_camera_platform",
283	.dev = {
284	.platform_data = &camera_info,
285	},
286	};
e565b518	287	#endif /* CONFIG_I2C */
8b2224dc MD	288
	289	static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
	290	.flags = SOCAM_PCLK_SAMPLE_RISING \| SOCAM_HSYNC_ACTIVE_HIGH \|
	291	SOCAM_VSYNC_ACTIVE_HIGH \| SOCAM_MASTER \| SOCAM_DATAWIDTH_8,
	292	};
	293
	294	static struct resource ceu_resources[] = {
	295	[0] = {
	296	.name = "CEU",
	297	.start = 0xfe910000,
	298	.end = 0xfe91009f,
	299	.flags = IORESOURCE_MEM,
	300	},
	301	[1] = {
	302	.start = 52,
	303	.flags = IORESOURCE_IRQ,
	304	},
	305	[2] = {
	306	/* place holder for contiguous memory */
	307	},
	308	};
	309
	310	static struct platform_device ceu_device = {
	311	.name = "sh_mobile_ceu",
a42b6dd6	312	.id = 0, /* "ceu0" clock */
8b2224dc MD	313	.num_resources = ARRAY_SIZE(ceu_resources),
	314	.resource = ceu_resources,
	315	.dev = {
	316	.platform_data = &sh_mobile_ceu_info,
	317	},
	318	};
	319
04e917b6	320	static struct platform_device *ap325rxa_devices[] __initdata = {
90b76491	321	&smsc9118_device,
6968980a MD	322	&ap325rxa_nor_flash_device,
6968980a MD	323	&lcdc_device,
8b2224dc	324	&ceu_device,
e565b518	325	#ifdef CONFIG_I2C
8b2224dc	326	&camera_device,
e565b518	327	#endif
908978ac	328	&nand_flash_device,
04e917b6 YG	329	};
04e917b6 YG	330
026953db	331	static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
a3e02706 NI	332	{
	333	I2C_BOARD_INFO("pcf8563", 0x51),
	334	},
026953db MD	335	};
026953db MD	336
04e917b6 YG	337	static int __init ap325rxa_devices_setup(void)
04e917b6 YG	338	{
16587c45 MD	339	/* LD3 and LD4 LEDs */
	340	gpio_request(GPIO_PTX5, NULL); /* RUN */
	341	gpio_direction_output(GPIO_PTX5, 1);
	342	gpio_export(GPIO_PTX5, 0);
	343
	344	gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
	345	gpio_direction_output(GPIO_PTX4, 0);
	346	gpio_export(GPIO_PTX4, 0);
	347
	348	/* SW1 input */
	349	gpio_request(GPIO_PTF7, NULL); /* MODE */
	350	gpio_direction_input(GPIO_PTF7);
	351	gpio_export(GPIO_PTF7, 0);
	352
	353	/* LCDC */
16587c45 MD	354	gpio_request(GPIO_FN_LCDD15, NULL);
	355	gpio_request(GPIO_FN_LCDD14, NULL);
	356	gpio_request(GPIO_FN_LCDD13, NULL);
	357	gpio_request(GPIO_FN_LCDD12, NULL);
	358	gpio_request(GPIO_FN_LCDD11, NULL);
	359	gpio_request(GPIO_FN_LCDD10, NULL);
	360	gpio_request(GPIO_FN_LCDD9, NULL);
	361	gpio_request(GPIO_FN_LCDD8, NULL);
	362	gpio_request(GPIO_FN_LCDD7, NULL);
	363	gpio_request(GPIO_FN_LCDD6, NULL);
	364	gpio_request(GPIO_FN_LCDD5, NULL);
	365	gpio_request(GPIO_FN_LCDD4, NULL);
	366	gpio_request(GPIO_FN_LCDD3, NULL);
	367	gpio_request(GPIO_FN_LCDD2, NULL);
	368	gpio_request(GPIO_FN_LCDD1, NULL);
	369	gpio_request(GPIO_FN_LCDD0, NULL);
	370	gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
	371	gpio_request(GPIO_FN_LCDDCK, NULL);
	372	gpio_request(GPIO_FN_LCDVEPWC, NULL);
	373	gpio_request(GPIO_FN_LCDVCPWC, NULL);
	374	gpio_request(GPIO_FN_LCDVSYN, NULL);
	375	gpio_request(GPIO_FN_LCDHSYN, NULL);
	376	gpio_request(GPIO_FN_LCDDISP, NULL);
	377	gpio_request(GPIO_FN_LCDDON, NULL);
	378
	379	/* LCD backlight */
	380	gpio_request(GPIO_PTS3, NULL);
	381	gpio_direction_output(GPIO_PTS3, 1);
	382
	383	/* CEU */
16587c45 MD	384	gpio_request(GPIO_FN_VIO_CLK2, NULL);
	385	gpio_request(GPIO_FN_VIO_VD2, NULL);
	386	gpio_request(GPIO_FN_VIO_HD2, NULL);
	387	gpio_request(GPIO_FN_VIO_FLD, NULL);
	388	gpio_request(GPIO_FN_VIO_CKO, NULL);
	389	gpio_request(GPIO_FN_VIO_D15, NULL);
	390	gpio_request(GPIO_FN_VIO_D14, NULL);
	391	gpio_request(GPIO_FN_VIO_D13, NULL);
	392	gpio_request(GPIO_FN_VIO_D12, NULL);
	393	gpio_request(GPIO_FN_VIO_D11, NULL);
	394	gpio_request(GPIO_FN_VIO_D10, NULL);
	395	gpio_request(GPIO_FN_VIO_D9, NULL);
	396	gpio_request(GPIO_FN_VIO_D8, NULL);
	397
	398	gpio_request(GPIO_PTZ7, NULL);
	399	gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
	400	gpio_request(GPIO_PTZ6, NULL);
	401	gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
	402	gpio_request(GPIO_PTZ5, NULL);
	403	gpio_direction_output(GPIO_PTZ5, 1); /* RST_CAM */
	404	gpio_request(GPIO_PTZ4, NULL);
	405	gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
	406
	407	ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
8b2224dc	408
908978ac	409	/* FLCTL */
dd0e20e5 PM	410	gpio_request(GPIO_FN_FCE, NULL);
	411	gpio_request(GPIO_FN_NAF7, NULL);
	412	gpio_request(GPIO_FN_NAF6, NULL);
	413	gpio_request(GPIO_FN_NAF5, NULL);
	414	gpio_request(GPIO_FN_NAF4, NULL);
	415	gpio_request(GPIO_FN_NAF3, NULL);
	416	gpio_request(GPIO_FN_NAF2, NULL);
	417	gpio_request(GPIO_FN_NAF1, NULL);
	418	gpio_request(GPIO_FN_NAF0, NULL);
	419	gpio_request(GPIO_FN_FCDE, NULL);
	420	gpio_request(GPIO_FN_FOE, NULL);
	421	gpio_request(GPIO_FN_FSC, NULL);
	422	gpio_request(GPIO_FN_FWE, NULL);
	423	gpio_request(GPIO_FN_FRB, NULL);
908978ac YS	424
	425	ctrl_outw(0, PORT_HIZCRC);
	426	ctrl_outw(0xFFFF, PORT_DRVCRA);
	427	ctrl_outw(0xFFFF, PORT_DRVCRB);
	428
8b2224dc	429	platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
6968980a	430
026953db MD	431	i2c_register_board_info(0, ap325rxa_i2c_devices,
026953db MD	432	ARRAY_SIZE(ap325rxa_i2c_devices));
908978ac	433
04e917b6 YG	434	return platform_add_devices(ap325rxa_devices,
	435	ARRAY_SIZE(ap325rxa_devices));
	436	}
	437	device_initcall(ap325rxa_devices_setup);
	438
04e917b6 YG	439	static struct sh_machine_vector mv_ap325rxa __initmv = {
04e917b6 YG	440	.mv_name = "AP-325RXA",
04e917b6	441	};