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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
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2 | menu "Processor features" |
3 | ||
4 | choice | |
6b2aac42 | 5 | prompt "Endianness selection" |
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6 | default CPU_LITTLE_ENDIAN |
7 | help | |
8 | Some SuperH machines can be configured for either little or big | |
9 | endian byte order. These modes require different kernels. | |
10 | ||
11 | config CPU_LITTLE_ENDIAN | |
12 | bool "Little Endian" | |
13 | ||
14 | config CPU_BIG_ENDIAN | |
15 | bool "Big Endian" | |
16 | ||
17 | endchoice | |
18 | ||
19 | config SH_FPU | |
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20 | def_bool y |
21 | prompt "FPU support" | |
4690bdc7 | 22 | depends on CPU_HAS_FPU |
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23 | help |
24 | Selecting this option will enable support for SH processors that | |
25 | have FPU units (ie, SH77xx). | |
26 | ||
27 | This option must be set in order to enable the FPU. | |
28 | ||
29 | config SH_FPU_EMU | |
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30 | def_bool n |
31 | prompt "FPU emulation support" | |
0d57af1e | 32 | depends on !SH_FPU |
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33 | help |
34 | Selecting this option will enable support for software FPU emulation. | |
35 | Most SH-3 users will want to say Y here, whereas most SH-4 users will | |
36 | want to say N. | |
37 | ||
38 | config SH_DSP | |
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39 | def_bool y |
40 | prompt "DSP support" | |
4690bdc7 | 41 | depends on CPU_HAS_DSP |
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42 | help |
43 | Selecting this option will enable support for SH processors that | |
44 | have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). | |
45 | ||
46 | This option must be set in order to enable the DSP. | |
47 | ||
48 | config SH_ADC | |
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49 | def_bool y |
50 | prompt "ADC support" | |
4690bdc7 | 51 | depends on CPU_SH3 |
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52 | help |
53 | Selecting this option will allow the Linux kernel to use SH3 on-chip | |
54 | ADC module. | |
55 | ||
56 | If unsure, say N. | |
57 | ||
58 | config SH_STORE_QUEUES | |
59 | bool "Support for Store Queues" | |
60 | depends on CPU_SH4 | |
61 | help | |
62 | Selecting this option will enable an in-kernel API for manipulating | |
63 | the store queues integrated in the SH-4 processors. | |
64 | ||
65 | config SPECULATIVE_EXECUTION | |
66 | bool "Speculative subroutine return" | |
8c563a30 | 67 | depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || CPU_SUBTYPE_SH7786 |
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68 | help |
69 | This enables support for a speculative instruction fetch for | |
70 | subroutine return. There are various pitfalls associated with | |
71 | this, as outlined in the SH7780 hardware manual. | |
72 | ||
73 | If unsure, say N. | |
74 | ||
75 | config CPU_HAS_INTEVT | |
76 | bool | |
77 | ||
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78 | config CPU_HAS_IPR_IRQ |
79 | bool | |
80 | ||
81 | config CPU_HAS_SR_RB | |
82 | bool | |
83 | help | |
84 | This will enable the use of SR.RB register bank usage. Processors | |
85 | that are lacking this bit must have another method in place for | |
86 | accomplishing what is taken care of by the banked registers. | |
87 | ||
d47a97bd | 88 | See <file:Documentation/arch/sh/register-banks.rst> for further |
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89 | information on SR.RB and register banking in the kernel in general. |
90 | ||
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91 | config CPU_HAS_PTEAEX |
92 | bool | |
93 | ||
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94 | config CPU_HAS_DSP |
95 | bool | |
96 | ||
97 | config CPU_HAS_FPU | |
98 | bool | |
99 | ||
100 | endmenu |