Merge tag 'input-for-v6.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-block.git] / arch / sh / Kconfig
CommitLineData
b2441318 1# SPDX-License-Identifier: GPL-2.0
1da177e4 2config SUPERH
ea0e1a9a 3 def_bool y
582dc536 4 select ARCH_32BIT_OFF_T
8690bbcf 5 select ARCH_HAS_CPU_CACHE_ALIASING
91024b3c
AK
6 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
7 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
582dc536 8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
aef0f78e 9 select ARCH_HAS_BINFMT_FLAT if !MMU
01eb454e 10 select ARCH_HAS_CPU_FINALIZE_INIT
2792d84e 11 select ARCH_HAS_CURRENT_STACK_POINTER
582dc536
CH
12 select ARCH_HAS_GIGANTIC_PAGE
13 select ARCH_HAS_GCOV_PROFILE_ALL
3010a5ea 14 select ARCH_HAS_PTE_SPECIAL
45624ac3 15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
582dc536 16 select ARCH_HIBERNATION_POSSIBLE if MMU
09d8dd93 17 select ARCH_MIGHT_HAVE_PC_PARPORT
582dc536 18 select ARCH_WANT_IPC_PARSE_VERSION
582dc536 19 select CPU_NO_EFFICIENT_FFS
ff4c25f2 20 select DMA_DECLARE_COHERENT
582dc536 21 select GENERIC_ATOMIC64
582dc536
CH
22 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
23 select GENERIC_IDLE_POLL_SETUP
24 select GENERIC_IRQ_SHOW
8bc6666f
GU
25 select GENERIC_LIB_ASHLDI3
26 select GENERIC_LIB_ASHRDI3
27 select GENERIC_LIB_LSHRDI3
582dc536
CH
28 select GENERIC_PCI_IOMAP if PCI
29 select GENERIC_SCHED_CLOCK
582dc536 30 select GENERIC_SMP_IDLE_THREAD
6ca297d4 31 select GUP_GET_PXX_LOW_HIGH if X2TLB
fcbfe812 32 select HAS_IOPORT if HAS_IOPORT_MAP
0453c9a7 33 select GENERIC_IOREMAP if MMU
582dc536
CH
34 select HAVE_ARCH_AUDITSYSCALL
35 select HAVE_ARCH_KGDB
0bb605c2 36 select HAVE_ARCH_SECCOMP_FILTER
d7b01f78 37 select HAVE_ARCH_TRACEHOOK
9b2a60c4 38 select HAVE_DEBUG_BUGVERBOSE
b69ec42b 39 select HAVE_DEBUG_KMEMLEAK
582dc536 40 select HAVE_DYNAMIC_FTRACE
25176ad0 41 select HAVE_GUP_FAST if MMU
582dc536
CH
42 select HAVE_FUNCTION_GRAPH_TRACER
43 select HAVE_FUNCTION_TRACER
582dc536
CH
44 select HAVE_FTRACE_MCOUNT_RECORD
45 select HAVE_HW_BREAKPOINT
582dc536 46 select HAVE_IOREMAP_PROT if MMU && !X2TLB
07e88e1b 47 select HAVE_KERNEL_BZIP2
582dc536 48 select HAVE_KERNEL_GZIP
07e88e1b 49 select HAVE_KERNEL_LZMA
c7b16efb 50 select HAVE_KERNEL_LZO
582dc536
CH
51 select HAVE_KERNEL_XZ
52 select HAVE_KPROBES
53 select HAVE_KRETPROBES
54 select HAVE_MIXED_BREAKPOINTS_REGS
55 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
56 select HAVE_NMI
582dc536
CH
57 select HAVE_PATA_PLATFORM
58 select HAVE_PERF_EVENTS
59 select HAVE_REGS_AND_STACK_ACCESS_API
af1839eb 60 select HAVE_UID16
cd1a41ce 61 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
582dc536 62 select HAVE_STACKPROTECTOR
a74f7e04 63 select HAVE_SYSCALL_TRACEPOINTS
ed170924 64 select IRQ_FORCED_THREADING
a050ba1e 65 select LOCK_MM_AND_FIND_VMA
786d35d4 66 select MODULES_USE_ELF_RELA
582dc536 67 select NEED_SG_DMA_LENGTH
cd57d07b 68 select NO_DMA if !MMU && !DMA_COHERENT
eb01d42a 69 select NO_GENERIC_PCI_IOPORT_MAP if PCI
0679a858 70 select OLD_SIGACTION
582dc536 71 select OLD_SIGSUSPEND
eb01d42a 72 select PCI_DOMAINS if PCI
e583d6b3 73 select PERF_EVENTS
582dc536
CH
74 select PERF_USE_VMALLOC
75 select RTC_LIB
57b81330 76 select SPARSE_IRQ
4aae683f 77 select TRACE_IRQFLAGS_SUPPORT
37744fee
AB
78 help
79 The SuperH is a RISC processor targeted for use in embedded systems
80 and consumer electronics; it was also used in the Sega Dreamcast
81 gaming console. The SuperH port has a home page at
82 <http://www.linux-sh.org/>.
39d28a2d 83
fa691511
PM
84config GENERIC_BUG
85 def_bool y
37744fee 86 depends on BUG
3767f3f1 87
e2268c71 88config GENERIC_HWEIGHT
d7ef4fb3 89 def_bool y
e2268c71 90
1da177e4 91config GENERIC_CALIBRATE_DELAY
cf204fa7 92 bool
1da177e4 93
bdcab87b
PM
94config GENERIC_LOCKBREAK
95 def_bool y
7be60ccb 96 depends on SMP && PREEMPTION
bdcab87b 97
af998a9a
MD
98config ARCH_SUSPEND_POSSIBLE
99 def_bool n
100
101config ARCH_HIBERNATION_POSSIBLE
102 def_bool n
357d5946 103
0a9b0db1
PM
104config SYS_SUPPORTS_APM_EMULATION
105 bool
af998a9a 106 select ARCH_SUSPEND_POSSIBLE
357d5946
PM
107
108config SYS_SUPPORTS_SMP
109 bool
110
111config SYS_SUPPORTS_NUMA
112 bool
113
afbfb52e 114config STACKTRACE_SUPPORT
d7ef4fb3 115 def_bool y
afbfb52e
PM
116
117config LOCKDEP_SUPPORT
d7ef4fb3 118 def_bool y
afbfb52e 119
f0d1b0b3 120config ARCH_HAS_ILOG2_U32
d7ef4fb3 121 def_bool n
f0d1b0b3
DH
122
123config ARCH_HAS_ILOG2_U64
d7ef4fb3 124 def_bool n
f0d1b0b3 125
ce816fa8 126config NO_IOPORT_MAP
37b7a978 127 def_bool !PCI
10c88ca5
AR
128 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \
129 !SH_DREAMCAST
86e4dd5a 130
e7cc9a73
MD
131config IO_TRAPPED
132 bool
133
b7e68d68
PM
134config SWAP_IO_SPACE
135 bool
136
01be5d63
PM
137config DMA_COHERENT
138 bool
139
140config DMA_NONCOHERENT
cd57d07b 141 def_bool !NO_DMA && !DMA_COHERENT
6dfdf673 142 select ARCH_HAS_DMA_PREP_COHERENT
6fa1d28e 143 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
6dfdf673 144 select DMA_DIRECT_REMAP
01be5d63 145
69543d63
KS
146config PGTABLE_LEVELS
147 default 3 if X2TLB
148 default 2
149
1da177e4
LT
150menu "System type"
151
b5f42db0
PM
152#
153# Processor families
154#
155config CPU_SH2
156 bool
049d2804 157 select SH_INTC
b5f42db0
PM
158
159config CPU_SH2A
160 bool
161 select CPU_SH2
e2fcf74f 162 select UNCACHED_MAPPING
b5f42db0 163
5a846aba
RF
164config CPU_J2
165 bool
166 select CPU_SH2
167 select OF
168 select OF_EARLY_FLATTREE
169
b5f42db0
PM
170config CPU_SH3
171 bool
172 select CPU_HAS_INTEVT
173 select CPU_HAS_SR_RB
049d2804 174 select SH_INTC
fbfa8934 175 select SYS_SUPPORTS_SH_TMU
b5f42db0
PM
176
177config CPU_SH4
178 bool
855f9a8e 179 select ARCH_SUPPORTS_HUGETLBFS if MMU
b5f42db0
PM
180 select CPU_HAS_INTEVT
181 select CPU_HAS_SR_RB
b5f42db0 182 select CPU_HAS_FPU if !CPU_SH4AL_DSP
049d2804 183 select SH_INTC
fbfa8934 184 select SYS_SUPPORTS_SH_TMU
b5f42db0
PM
185
186config CPU_SH4A
187 bool
188 select CPU_SH4
189
190config CPU_SH4AL_DSP
191 bool
192 select CPU_SH4A
193 select CPU_HAS_DSP
194
195config CPU_SHX2
196 bool
197
198config CPU_SHX3
199 bool
01be5d63 200 select DMA_COHERENT
4b478ee2
PM
201 select SYS_SUPPORTS_SMP
202 select SYS_SUPPORTS_NUMA
b5f42db0 203
dc65a977
PM
204config ARCH_SHMOBILE
205 bool
77594912 206 select ARCH_SUSPEND_POSSIBLE
464ed18e 207 select PM
dc65a977 208
86c8c047
MF
209config CPU_HAS_PMU
210 depends on CPU_SH4 || CPU_SH4A
211 default y
212 bool
213
b5f42db0
PM
214choice
215 prompt "Processor sub-type selection"
216
217#
218# Processor subtypes
219#
220
221# SH-2 Processor Support
222
223config CPU_SUBTYPE_SH7619
224 bool "Support SH7619 processor"
225 select CPU_SH2
fbfa8934 226 select SYS_SUPPORTS_SH_CMT
b5f42db0 227
5a846aba
RF
228config CPU_SUBTYPE_J2
229 bool "Support J2 processor"
230 select CPU_J2
b4214e41
RF
231 select SYS_SUPPORTS_SMP
232 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
5a846aba 233
b5f42db0
PM
234# SH-2A Processor Support
235
2825999e
PG
236config CPU_SUBTYPE_SH7201
237 bool "Support SH7201 processor"
238 select CPU_SH2A
239 select CPU_HAS_FPU
fbfa8934 240 select SYS_SUPPORTS_SH_MTU2
2825999e 241
6d01f510
PM
242config CPU_SUBTYPE_SH7203
243 bool "Support SH7203 processor"
244 select CPU_SH2A
74d99a5e 245 select CPU_HAS_FPU
fbfa8934
MD
246 select SYS_SUPPORTS_SH_CMT
247 select SYS_SUPPORTS_SH_MTU2
b768ecbc 248 select PINCTRL
6d01f510 249
b5f42db0
PM
250config CPU_SUBTYPE_SH7206
251 bool "Support SH7206 processor"
252 select CPU_SH2A
fbfa8934
MD
253 select SYS_SUPPORTS_SH_CMT
254 select SYS_SUPPORTS_SH_MTU2
b5f42db0 255
a8f67f4b
PM
256config CPU_SUBTYPE_SH7263
257 bool "Support SH7263 processor"
258 select CPU_SH2A
74d99a5e 259 select CPU_HAS_FPU
fbfa8934
MD
260 select SYS_SUPPORTS_SH_CMT
261 select SYS_SUPPORTS_SH_MTU2
a8f67f4b 262
51ce3068
PE
263config CPU_SUBTYPE_SH7264
264 bool "Support SH7264 processor"
265 select CPU_SH2A
266 select CPU_HAS_FPU
fbfa8934
MD
267 select SYS_SUPPORTS_SH_CMT
268 select SYS_SUPPORTS_SH_MTU2
5946e7bb 269 select PINCTRL
51ce3068 270
0b25b7c8
PE
271config CPU_SUBTYPE_SH7269
272 bool "Support SH7269 processor"
273 select CPU_SH2A
274 select CPU_HAS_FPU
fbfa8934
MD
275 select SYS_SUPPORTS_SH_CMT
276 select SYS_SUPPORTS_SH_MTU2
fb872fcc 277 select PINCTRL
0b25b7c8 278
2ad69908
PM
279config CPU_SUBTYPE_MXG
280 bool "Support MX-G processor"
281 select CPU_SH2A
fbfa8934 282 select SYS_SUPPORTS_SH_MTU2
2ad69908
PM
283 help
284 Select MX-G if running on an R8A03022BG part.
285
b5f42db0
PM
286# SH-3 Processor Support
287
288config CPU_SUBTYPE_SH7705
289 bool "Support SH7705 processor"
290 select CPU_SH3
291
292config CPU_SUBTYPE_SH7706
293 bool "Support SH7706 processor"
294 select CPU_SH3
295 help
296 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
297
298config CPU_SUBTYPE_SH7707
299 bool "Support SH7707 processor"
300 select CPU_SH3
301 help
302 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
303
304config CPU_SUBTYPE_SH7708
305 bool "Support SH7708 processor"
306 select CPU_SH3
307 help
308 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
309 if you have a 100 Mhz SH-3 HD6417708R CPU.
310
311config CPU_SUBTYPE_SH7709
312 bool "Support SH7709 processor"
313 select CPU_SH3
314 help
315 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
316
317config CPU_SUBTYPE_SH7710
318 bool "Support SH7710 processor"
319 select CPU_SH3
320 select CPU_HAS_DSP
321 help
322 Select SH7710 if you have a SH3-DSP SH7710 CPU.
323
324config CPU_SUBTYPE_SH7712
325 bool "Support SH7712 processor"
326 select CPU_SH3
327 select CPU_HAS_DSP
328 help
329 Select SH7712 if you have a SH3-DSP SH7712 CPU.
330
331config CPU_SUBTYPE_SH7720
332 bool "Support SH7720 processor"
333 select CPU_SH3
334 select CPU_HAS_DSP
fbfa8934 335 select SYS_SUPPORTS_SH_CMT
7b61ca5d 336 select USB_OHCI_SH if USB_OHCI_HCD
85db6bff 337 select PINCTRL
b5f42db0
PM
338 help
339 Select SH7720 if you have a SH3-DSP SH7720 CPU.
340
31a49c4b
YS
341config CPU_SUBTYPE_SH7721
342 bool "Support SH7721 processor"
343 select CPU_SH3
344 select CPU_HAS_DSP
fbfa8934 345 select SYS_SUPPORTS_SH_CMT
7b61ca5d 346 select USB_OHCI_SH if USB_OHCI_HCD
31a49c4b
YS
347 help
348 Select SH7721 if you have a SH3-DSP SH7721 CPU.
349
b5f42db0
PM
350# SH-4 Processor Support
351
352config CPU_SUBTYPE_SH7750
353 bool "Support SH7750 processor"
354 select CPU_SH4
355 help
356 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
357
358config CPU_SUBTYPE_SH7091
359 bool "Support SH7091 processor"
360 select CPU_SH4
361 help
362 Select SH7091 if you have an SH-4 based Sega device (such as
363 the Dreamcast, Naomi, and Naomi 2).
364
365config CPU_SUBTYPE_SH7750R
366 bool "Support SH7750R processor"
367 select CPU_SH4
368
369config CPU_SUBTYPE_SH7750S
370 bool "Support SH7750S processor"
371 select CPU_SH4
372
373config CPU_SUBTYPE_SH7751
374 bool "Support SH7751 processor"
375 select CPU_SH4
376 help
377 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
378 or if you have a HD6417751R CPU.
379
380config CPU_SUBTYPE_SH7751R
381 bool "Support SH7751R processor"
382 select CPU_SH4
383
384config CPU_SUBTYPE_SH7760
385 bool "Support SH7760 processor"
386 select CPU_SH4
387
b5f42db0
PM
388# SH-4A Processor Support
389
178dd0cd
PM
390config CPU_SUBTYPE_SH7723
391 bool "Support SH7723 processor"
392 select CPU_SH4A
393 select CPU_SHX2
dc65a977 394 select ARCH_SHMOBILE
178dd0cd 395 select ARCH_SPARSEMEM_ENABLE
fbfa8934 396 select SYS_SUPPORTS_SH_CMT
16941a89 397 select PINCTRL
178dd0cd
PM
398 help
399 Select SH7723 if you have an SH-MobileR2 CPU.
400
0207a2ef
KM
401config CPU_SUBTYPE_SH7724
402 bool "Support SH7724 processor"
403 select CPU_SH4A
404 select CPU_SHX2
59fe700d 405 select ARCH_SHMOBILE
0207a2ef 406 select ARCH_SPARSEMEM_ENABLE
fbfa8934 407 select SYS_SUPPORTS_SH_CMT
18ebd228 408 select PINCTRL
0207a2ef
KM
409 help
410 Select SH7724 if you have an SH-MobileR2R CPU.
411
fea88a0c
NI
412config CPU_SUBTYPE_SH7734
413 bool "Support SH7734 processor"
414 select CPU_SH4A
415 select CPU_SHX2
2c172182 416 select PINCTRL
fea88a0c
NI
417 help
418 Select SH7734 if you have a SH4A SH7734 CPU.
419
c01f0f1a
YS
420config CPU_SUBTYPE_SH7757
421 bool "Support SH7757 processor"
422 select CPU_SH4A
423 select CPU_SHX2
eb61b772 424 select PINCTRL
c01f0f1a
YS
425 help
426 Select SH7757 if you have a SH4A SH7757 CPU.
427
7d740a06
YS
428config CPU_SUBTYPE_SH7763
429 bool "Support SH7763 processor"
430 select CPU_SH4A
7b61ca5d 431 select USB_OHCI_SH if USB_OHCI_HCD
7d740a06
YS
432 help
433 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
434
b5f42db0
PM
435config CPU_SUBTYPE_SH7770
436 bool "Support SH7770 processor"
437 select CPU_SH4A
438
439config CPU_SUBTYPE_SH7780
440 bool "Support SH7780 processor"
441 select CPU_SH4A
442
443config CPU_SUBTYPE_SH7785
444 bool "Support SH7785 processor"
445 select CPU_SH4A
446 select CPU_SHX2
55ba99eb
KM
447 select ARCH_SPARSEMEM_ENABLE
448 select SYS_SUPPORTS_NUMA
77bd27b2 449 select PINCTRL
55ba99eb
KM
450
451config CPU_SUBTYPE_SH7786
452 bool "Support SH7786 processor"
453 select CPU_SH4A
37042fbd 454 select CPU_SHX3
8263a67e 455 select CPU_HAS_PTEAEX
2eb2a436 456 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
7b61ca5d 457 select USB_OHCI_SH if USB_OHCI_HCD
7b61ca5d 458 select USB_EHCI_SH if USB_EHCI_HCD
c0fdbff9 459 select PINCTRL
b5f42db0
PM
460
461config CPU_SUBTYPE_SHX3
462 bool "Support SH-X3 processor"
463 select CPU_SH4A
464 select CPU_SHX3
5840263e 465 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
fdcfdfa1 466 select GPIOLIB
3e347f08 467 select PINCTRL
b5f42db0
PM
468
469# SH4AL-DSP Processor Support
470
471config CPU_SUBTYPE_SH7343
472 bool "Support SH7343 processor"
473 select CPU_SH4AL_DSP
dc65a977 474 select ARCH_SHMOBILE
fbfa8934 475 select SYS_SUPPORTS_SH_CMT
b5f42db0
PM
476
477config CPU_SUBTYPE_SH7722
478 bool "Support SH7722 processor"
479 select CPU_SH4AL_DSP
480 select CPU_SHX2
dc65a977 481 select ARCH_SHMOBILE
b5f42db0
PM
482 select ARCH_SPARSEMEM_ENABLE
483 select SYS_SUPPORTS_NUMA
fbfa8934 484 select SYS_SUPPORTS_SH_CMT
ef97c3c1 485 select PINCTRL
9109a30e
MD
486
487config CPU_SUBTYPE_SH7366
488 bool "Support SH7366 processor"
489 select CPU_SH4AL_DSP
490 select CPU_SHX2
dc65a977 491 select ARCH_SHMOBILE
9109a30e
MD
492 select ARCH_SPARSEMEM_ENABLE
493 select SYS_SUPPORTS_NUMA
fbfa8934 494 select SYS_SUPPORTS_SH_CMT
b5f42db0 495
3cc000b5
PM
496endchoice
497
f3d22298 498source "arch/sh/mm/Kconfig"
939a24a6 499
4690bdc7 500source "arch/sh/Kconfig.cpu"
f3d22298 501
939a24a6 502source "arch/sh/boards/Kconfig"
32351a28 503
32351a28
PM
504menu "Timer and clock configuration"
505
cad82448
PM
506config SH_PCLK_FREQ
507 int "Peripheral clock frequency (in Hz)"
8152a74b 508 depends on SH_CLK_CPG_LEGACY
9d4436a6 509 default "31250000" if CPU_SUBTYPE_SH7619
8152a74b
PM
510 default "33333333" if CPU_SUBTYPE_SH7770 || \
511 CPU_SUBTYPE_SH7760 || \
512 CPU_SUBTYPE_SH7705 || \
513 CPU_SUBTYPE_SH7203 || \
514 CPU_SUBTYPE_SH7206 || \
515 CPU_SUBTYPE_SH7263 || \
43a1839c 516 CPU_SUBTYPE_MXG
05627486 517 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
05627486 518 default "50000000"
1da177e4 519 help
cad82448
PM
520 This option is used to specify the peripheral clock frequency.
521 This is necessary for determining the reference clock value on
522 platforms lacking an RTC.
1da177e4 523
36aa1e32
PM
524config SH_CLK_CPG
525 def_bool y
526
253b0887 527config SH_CLK_CPG_LEGACY
36aa1e32 528 depends on SH_CLK_CPG
43a1839c 529 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
51ce3068 530 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
bcb86e0a
PM
531 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
532 !CPU_SUBTYPE_SH7269
253b0887 533
32351a28
PM
534endmenu
535
cad82448 536menu "CPU Frequency scaling"
cad82448 537source "drivers/cpufreq/Kconfig"
cad82448
PM
538endmenu
539
9f5e8eee
PM
540source "arch/sh/drivers/Kconfig"
541
cad82448 542endmenu
1da177e4 543
cad82448
PM
544menu "Kernel features"
545
8636a1f9 546source "kernel/Kconfig.hz"
91b91d01 547
40445d06
ED
548config ARCH_SUPPORTS_KEXEC
549 def_bool MMU
550
551config ARCH_SUPPORTS_CRASH_DUMP
552 def_bool BROKEN_ON_SMP
553
554config ARCH_SUPPORTS_KEXEC_JUMP
555 def_bool y
b7cf6ddc 556
e66ac3f2
SH
557config PHYSICAL_START
558 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
559 default MEMORY_START
a7f7f624 560 help
e66ac3f2
SH
561 This gives the physical address where the kernel is loaded
562 and is ordinarily the same as MEMORY_START.
563
564 Different values are primarily used in the case of kexec on panic
565 where the fail safe kernel needs to run at a different address
566 than the panic-ed kernel.
567
1da177e4
LT
568config SMP
569 bool "Symmetric multi-processing support"
357d5946 570 depends on SYS_SUPPORTS_SMP
a7f7f624 571 help
1da177e4 572 This enables support for systems with more than one CPU. If you have
4a474157
RG
573 a system with only one CPU, say N. If you have a system with more
574 than one CPU, say Y.
1da177e4 575
4a474157 576 If you say N here, the kernel will run on uni- and multiprocessor
1da177e4
LT
577 machines, but will use only one CPU of a multiprocessor machine. If
578 you say Y here, the kernel will run on many, but not all,
4a474157 579 uniprocessor machines. On a uniprocessor machine, the kernel
1da177e4
LT
580 will run faster if you say N here.
581
582 People using multiprocessor machines who say Y here should also say
583 Y to "Enhanced Real Time Clock Support", below.
584
4f4cfa6c 585 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
91194e9b 586 available at <https://www.tldp.org/docs.html#howto>.
1da177e4
LT
587
588 If you don't know what to do here, say N.
589
590config NR_CPUS
591 int "Maximum number of CPUs (2-32)"
592 range 2 32
593 depends on SMP
2eb2a436 594 default "4" if CPU_SUBTYPE_SHX3
1da177e4
LT
595 default "2"
596 help
597 This allows you to specify the maximum number of CPUs which this
598 kernel will support. The maximum supported value is 32 and the
599 minimum value which makes sense is 2.
600
601 This is purely to save memory - each supported CPU adds
602 approximately eight kilobytes to the kernel image.
603
763142d1
PM
604config HOTPLUG_CPU
605 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
40b31360 606 depends on SMP
763142d1
PM
607 help
608 Say Y here to experiment with turning CPUs off and on. CPUs
609 can be controlled through /sys/devices/system/cpu.
610
83662461
PM
611config GUSA
612 def_bool y
37744fee 613 depends on !SMP
83662461
PM
614 help
615 This enables support for gUSA (general UserSpace Atomicity).
616 This is the default implementation for both UP and non-ll/sc
617 CPUs, and is used by the libc, amongst others.
618
619 For additional information, design information can be found
620 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
621
622 This should only be disabled for special cases where alternate
623 atomicity implementations exist.
624
1efe4ce3
SM
625config GUSA_RB
626 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
627 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
628 help
629 Enabling this option will allow the kernel to implement some
692105b8 630 atomic operations using a software implementation of load-locked/
1efe4ce3
SM
631 store-conditional (LLSC). On machines which do not have hardware
632 LLSC, this should be more efficient than the other alternative of
692105b8 633 disabling interrupts around the atomic sequence.
1efe4ce3 634
86c8c047
MF
635config HW_PERF_EVENTS
636 bool "Enable hardware performance counter support for perf events"
637 depends on PERF_EVENTS && CPU_HAS_PMU
638 default y
639 help
640 Enable hardware performance counter support for perf events. If
641 disabled, perf events will use software events only.
642
43b8774d
PM
643source "drivers/sh/Kconfig"
644
cad82448 645endmenu
1da177e4 646
cad82448 647menu "Boot options"
1da177e4 648
190fe191
RF
649config USE_BUILTIN_DTB
650 bool "Use builtin DTB"
651 default n
652 depends on SH_DEVICE_TREE
653 help
654 Link a device tree blob for particular hardware into the kernel,
655 suppressing use of the DTB pointer provided by the bootloader.
656 This option should only be used with legacy bootloaders that are
657 not capable of providing a DTB to the kernel, or for experimental
658 hardware without stable device tree bindings.
659
660config BUILTIN_DTB_SOURCE
661 string "Source file for builtin DTB"
662 default ""
663 depends on USE_BUILTIN_DTB
664 help
665 Base name (without suffix, relative to arch/sh/boot/dts) for the
666 a DTS file that will be used to produce the DTB linked into the
667 kernel.
668
cad82448 669config ZERO_PAGE_OFFSET
b412a49a
PM
670 hex
671 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
672 SH_7751_SOLUTION_ENGINE
673 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
7a847f81 674 default "0x00002000" if PAGE_SIZE_8KB
cad82448 675 default "0x00001000"
1da177e4 676 help
cad82448 677 This sets the default offset of zero page.
1da177e4 678
cad82448 679config BOOT_LINK_OFFSET
b412a49a
PM
680 hex
681 default "0x00210000" if SH_SHMIN
b412a49a
PM
682 default "0x00810000" if SH_7780_SOLUTION_ENGINE
683 default "0x009e0000" if SH_TITAN
684 default "0x01800000" if SH_SDK7780
685 default "0x02000000" if SH_EDOSK7760
cad82448
PM
686 default "0x00800000"
687 help
688 This option allows you to set the link address offset of the zImage.
689 This can be useful if you are on a board which has a small amount of
690 memory.
1da177e4 691
b412a49a
PM
692config ENTRY_OFFSET
693 hex
694 default "0x00001000" if PAGE_SIZE_4KB
695 default "0x00002000" if PAGE_SIZE_8KB
696 default "0x00004000" if PAGE_SIZE_16KB
697 default "0x00010000" if PAGE_SIZE_64KB
698 default "0x00000000"
699
4705b2e8
MD
700config ROMIMAGE_MMCIF
701 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
0d57af1e 702 depends on CPU_SUBTYPE_SH7724
4705b2e8
MD
703 help
704 Say Y here to include experimental MMCIF loading code in
705 romImage. With this enabled it is possible to write the romImage
706 kernel image to an MMC card and boot the kernel straight from
707 the reset vector. At reset the processor Mask ROM will load the
708 first part of the romImage which in turn loads the rest the kernel
709 image to RAM using the MMCIF hardware block.
710
d724a9c9
PM
711choice
712 prompt "Kernel command line"
d724a9c9
PM
713 default CMDLINE_OVERWRITE
714 help
715 Setting this option allows the kernel command line arguments
716 to be set.
717
718config CMDLINE_OVERWRITE
719 bool "Overwrite bootloader kernel arguments"
720 help
721 Given string will overwrite any arguments passed in by
722 a bootloader.
723
724config CMDLINE_EXTEND
725 bool "Extend bootloader kernel arguments"
726 help
727 Given string will be concatenated with arguments passed in
728 by a bootloader.
729
d9a1dab6
MY
730config CMDLINE_FROM_BOOTLOADER
731 bool "Use bootloader kernel arguments"
732 help
733 Uses the command-line options passed by the boot loader.
734
d724a9c9 735endchoice
1da177e4 736
cad82448 737config CMDLINE
d724a9c9
PM
738 string "Kernel command line arguments string"
739 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
cad82448 740 default "console=ttySC1,115200"
1da177e4
LT
741
742endmenu
743
cad82448 744menu "Bus options"
1da177e4 745
17be2d2b 746config MAPLE
e16038ab
PM
747 bool "Maple Bus support"
748 depends on SH_DREAMCAST
749 help
750 The Maple Bus is SEGA's serial communication bus for peripherals
751 on the Dreamcast. Without this bus support you won't be able to
752 get your Dreamcast keyboard etc to work, so most users
753 probably want to say 'Y' here, unless you are only using the
754 Dreamcast with a serial line terminal or a remote network
755 connection.
17be2d2b 756
1da177e4
LT
757endmenu
758
3aa770e7 759menu "Power management options (EXPERIMENTAL)"
f4cb5700 760
c6f17cb2
MD
761source "kernel/power/Kconfig"
762
763source "drivers/cpuidle/Kconfig"
3aa770e7 764
3aa770e7 765endmenu