Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | # |
2 | # For a description of the syntax of this configuration file, | |
3 | # see Documentation/kbuild/kconfig-language.txt. | |
4 | # | |
5 | ||
6 | mainmenu "Linux/SuperH Kernel Configuration" | |
7 | ||
8 | config SUPERH | |
9 | bool | |
10 | default y | |
7a440c95 | 11 | select EMBEDDED |
1da177e4 LT |
12 | help |
13 | The SuperH is a RISC processor targeted for use in embedded systems | |
14 | and consumer electronics; it was also used in the Sega Dreamcast | |
15 | gaming console. The SuperH port has a home page at | |
16 | <http://www.linux-sh.org/>. | |
17 | ||
1da177e4 LT |
18 | config RWSEM_GENERIC_SPINLOCK |
19 | bool | |
20 | default y | |
21 | ||
22 | config RWSEM_XCHGADD_ALGORITHM | |
23 | bool | |
24 | ||
e2268c71 AM |
25 | config GENERIC_FIND_NEXT_BIT |
26 | bool | |
27 | default y | |
28 | ||
29 | config GENERIC_HWEIGHT | |
30 | bool | |
31 | default y | |
32 | ||
1da177e4 LT |
33 | config GENERIC_HARDIRQS |
34 | bool | |
35 | default y | |
36 | ||
37 | config GENERIC_IRQ_PROBE | |
38 | bool | |
39 | default y | |
40 | ||
41 | config GENERIC_CALIBRATE_DELAY | |
42 | bool | |
43 | default y | |
44 | ||
cad82448 PM |
45 | config GENERIC_IOMAP |
46 | bool | |
47 | ||
45882145 PM |
48 | config GENERIC_TIME |
49 | def_bool n | |
50 | ||
a08b6b79 Z |
51 | config ARCH_MAY_HAVE_PC_FDC |
52 | bool | |
a08b6b79 | 53 | |
1da177e4 LT |
54 | source "init/Kconfig" |
55 | ||
56 | menu "System type" | |
57 | ||
bc8fb5d0 PM |
58 | config SOLUTION_ENGINE |
59 | bool | |
60 | ||
1da177e4 LT |
61 | choice |
62 | prompt "SuperH system type" | |
63 | default SH_UNKNOWN | |
64 | ||
65 | config SH_SOLUTION_ENGINE | |
66 | bool "SolutionEngine" | |
bc8fb5d0 | 67 | select SOLUTION_ENGINE |
1da177e4 LT |
68 | help |
69 | Select SolutionEngine if configuring for a Hitachi SH7709 | |
70 | or SH7750 evaluation board. | |
71 | ||
72 | config SH_7751_SOLUTION_ENGINE | |
73 | bool "SolutionEngine7751" | |
bc8fb5d0 | 74 | select SOLUTION_ENGINE |
cad82448 | 75 | select CPU_SUBTYPE_SH7751 |
1da177e4 LT |
76 | help |
77 | Select 7751 SolutionEngine if configuring for a Hitachi SH7751 | |
78 | evaluation board. | |
79 | ||
80 | config SH_7300_SOLUTION_ENGINE | |
81 | bool "SolutionEngine7300" | |
bc8fb5d0 | 82 | select SOLUTION_ENGINE |
cad82448 | 83 | select CPU_SUBTYPE_SH7300 |
1da177e4 | 84 | help |
bc8fb5d0 PM |
85 | Select 7300 SolutionEngine if configuring for a Hitachi |
86 | SH7300(SH-Mobile V) evaluation board. | |
87 | ||
88 | config SH_7343_SOLUTION_ENGINE | |
89 | bool "SolutionEngine7343" | |
90 | select SOLUTION_ENGINE | |
91 | select CPU_SUBTYPE_SH7343 | |
92 | help | |
93 | Select 7343 SolutionEngine if configuring for a Hitachi | |
94 | SH7343 (SH-Mobile 3AS) evaluation board. | |
1da177e4 LT |
95 | |
96 | config SH_73180_SOLUTION_ENGINE | |
97 | bool "SolutionEngine73180" | |
bc8fb5d0 PM |
98 | select SOLUTION_ENGINE |
99 | select CPU_SUBTYPE_SH73180 | |
100 | help | |
101 | Select 73180 SolutionEngine if configuring for a Hitachi | |
102 | SH73180(SH-Mobile 3) evaluation board. | |
1da177e4 LT |
103 | |
104 | config SH_7751_SYSTEMH | |
105 | bool "SystemH7751R" | |
cad82448 | 106 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
107 | help |
108 | Select SystemH if you are configuring for a Renesas SystemH | |
109 | 7751R evaluation board. | |
110 | ||
cad82448 PM |
111 | config SH_HP6XX |
112 | bool "HP6XX" | |
1da177e4 | 113 | help |
cad82448 | 114 | Select HP6XX if configuring for a HP jornada HP6xx. |
1da177e4 LT |
115 | More information (hardware only) at |
116 | <http://www.hp.com/jornada/>. | |
117 | ||
1da177e4 LT |
118 | config SH_EC3104 |
119 | bool "EC3104" | |
120 | help | |
121 | Select EC3104 if configuring for a system with an Eclipse | |
122 | International EC3104 chip, e.g. the Harris AD2000. | |
123 | ||
124 | config SH_SATURN | |
125 | bool "Saturn" | |
cad82448 | 126 | select CPU_SUBTYPE_SH7604 |
1da177e4 LT |
127 | help |
128 | Select Saturn if configuring for a SEGA Saturn. | |
129 | ||
130 | config SH_DREAMCAST | |
131 | bool "Dreamcast" | |
cad82448 | 132 | select CPU_SUBTYPE_SH7091 |
1da177e4 LT |
133 | help |
134 | Select Dreamcast if configuring for a SEGA Dreamcast. | |
135 | More information at | |
136 | <http://www.m17n.org/linux-sh/dreamcast/>. There is a | |
137 | Dreamcast project is at <http://linuxdc.sourceforge.net/>. | |
138 | ||
1da177e4 LT |
139 | config SH_BIGSUR |
140 | bool "BigSur" | |
141 | ||
1da177e4 | 142 | config SH_MPC1211 |
cad82448 PM |
143 | bool "Interface MPC1211" |
144 | help | |
145 | CTP/PCI-SH02 is a CPU module computer that is produced | |
146 | by Interface Corporation. | |
147 | More information at <http://www.interface.co.jp> | |
1da177e4 LT |
148 | |
149 | config SH_SH03 | |
cad82448 | 150 | bool "Interface CTP/PCI-SH03" |
1da177e4 | 151 | help |
cad82448 | 152 | CTP/PCI-SH03 is a CPU module computer that is produced |
1da177e4 | 153 | by Interface Corporation. |
1da177e4 LT |
154 | More information at <http://www.interface.co.jp> |
155 | ||
156 | config SH_SECUREEDGE5410 | |
157 | bool "SecureEdge5410" | |
cad82448 | 158 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
159 | help |
160 | Select SecureEdge5410 if configuring for a SnapGear SH board. | |
161 | This includes both the OEM SecureEdge products as well as the | |
162 | SME product line. | |
163 | ||
164 | config SH_HS7751RVOIP | |
165 | bool "HS7751RVOIP" | |
cad82448 | 166 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
167 | help |
168 | Select HS7751RVOIP if configuring for a Renesas Technology | |
169 | Sales VoIP board. | |
170 | ||
91b91d01 PM |
171 | config SH_7710VOIPGW |
172 | bool "SH7710-VOIP-GW" | |
173 | select CPU_SUBTYPE_SH7710 | |
174 | help | |
175 | Select this option to build a kernel for the SH7710 based | |
176 | VOIP GW. | |
177 | ||
1da177e4 LT |
178 | config SH_RTS7751R2D |
179 | bool "RTS7751R2D" | |
cad82448 | 180 | select CPU_SUBTYPE_SH7751R |
1da177e4 LT |
181 | help |
182 | Select RTS7751R2D if configuring for a Renesas Technology | |
183 | Sales SH-Graphics board. | |
184 | ||
cad82448 PM |
185 | config SH_R7780RP |
186 | bool "R7780RP-1" | |
187 | select CPU_SUBTYPE_SH7780 | |
188 | help | |
189 | Select R7780RP-1 if configuring for a Renesas Solutions | |
190 | HIGHLANDER board. | |
191 | ||
1da177e4 LT |
192 | config SH_EDOSK7705 |
193 | bool "EDOSK7705" | |
cad82448 | 194 | select CPU_SUBTYPE_SH7705 |
1da177e4 LT |
195 | |
196 | config SH_SH4202_MICRODEV | |
197 | bool "SH4-202 MicroDev" | |
cad82448 | 198 | select CPU_SUBTYPE_SH4_202 |
1da177e4 LT |
199 | help |
200 | Select SH4-202 MicroDev if configuring for a SuperH MicroDev board | |
201 | with an SH4-202 CPU. | |
202 | ||
cad82448 PM |
203 | config SH_LANDISK |
204 | bool "LANDISK" | |
205 | select CPU_SUBTYPE_SH7751R | |
206 | help | |
207 | I-O DATA DEVICE, INC. "LANDISK Series" support. | |
208 | ||
209 | config SH_TITAN | |
210 | bool "TITAN" | |
211 | select CPU_SUBTYPE_SH7751R | |
212 | help | |
213 | Select Titan if you are configuring for a Nimble Microsystems | |
214 | NetEngine NP51R. | |
215 | ||
51e22e7a TY |
216 | config SH_SHMIN |
217 | bool "SHMIN" | |
218 | select CPU_SUBTYPE_SH7706 | |
219 | help | |
3cb2fccc | 220 | Select SHMIN if configuring for the SHMIN board. |
51e22e7a | 221 | |
9d4436a6 YS |
222 | config SH_7206_SOLUTION_ENGINE |
223 | bool "SolutionEngine7206" | |
224 | select CPU_SUBTYPE_SH7206 | |
225 | help | |
226 | Select 7206 SolutionEngine if configuring for a Hitachi SH7206 | |
227 | evaluation board. | |
228 | ||
229 | config SH_7619_SOLUTION_ENGINE | |
230 | bool "SolutionEngine7619" | |
231 | select CPU_SUBTYPE_SH7619 | |
232 | help | |
233 | Select 7619 SolutionEngine if configuring for a Hitachi SH7619 | |
234 | evaluation board. | |
235 | ||
1da177e4 LT |
236 | config SH_UNKNOWN |
237 | bool "BareCPU" | |
238 | help | |
239 | "Bare CPU" aka "unknown" means an SH-based system which is not one | |
240 | of the specific ones mentioned above, which means you need to enter | |
241 | all sorts of stuff like CONFIG_MEMORY_START because the config | |
242 | system doesn't already know what it is. You get a machine vector | |
243 | without any platform-specific code in it, so things like the RTC may | |
244 | not work. | |
245 | ||
246 | This option is for the early stages of porting to a new machine. | |
247 | ||
248 | endchoice | |
249 | ||
cad82448 | 250 | source "arch/sh/mm/Kconfig" |
1da177e4 | 251 | |
1da177e4 LT |
252 | config CF_ENABLER |
253 | bool "Compact Flash Enabler support" | |
5a4053b2 | 254 | depends on SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_SH03 |
1da177e4 LT |
255 | ---help--- |
256 | Compact Flash is a small, removable mass storage device introduced | |
257 | in 1994 originally as a PCMCIA device. If you say `Y' here, you | |
258 | compile in support for Compact Flash devices directly connected to | |
259 | a SuperH processor. A Compact Flash FAQ is available at | |
260 | <http://www.compactflash.org/faqs/faq.htm>. | |
261 | ||
262 | If your board has "Directly Connected" CompactFlash at area 5 or 6, | |
263 | you may want to enable this option. Then, you can use CF as | |
264 | primary IDE drive (only tested for SanDisk). | |
265 | ||
266 | If in doubt, select 'N'. | |
267 | ||
268 | choice | |
269 | prompt "Compact Flash Connection Area" | |
270 | depends on CF_ENABLER | |
271 | default CF_AREA6 | |
272 | ||
273 | config CF_AREA5 | |
274 | bool "Area5" | |
275 | help | |
276 | If your board has "Directly Connected" CompactFlash, You should | |
277 | select the area where your CF is connected to. | |
278 | ||
279 | - "Area5" if CompactFlash is connected to Area 5 (0x14000000) | |
280 | - "Area6" if it is connected to Area 6 (0x18000000) | |
281 | ||
5a4053b2 | 282 | "Area6" will work for most boards. |
1da177e4 LT |
283 | |
284 | config CF_AREA6 | |
285 | bool "Area6" | |
286 | ||
287 | endchoice | |
288 | ||
289 | config CF_BASE_ADDR | |
290 | hex | |
291 | depends on CF_ENABLER | |
292 | default "0xb8000000" if CF_AREA6 | |
293 | default "0xb4000000" if CF_AREA5 | |
294 | ||
cad82448 PM |
295 | menu "Processor features" |
296 | ||
53644087 PM |
297 | choice |
298 | prompt "Endianess selection" | |
299 | default CPU_LITTLE_ENDIAN | |
cad82448 PM |
300 | help |
301 | Some SuperH machines can be configured for either little or big | |
53644087 PM |
302 | endian byte order. These modes require different kernels. |
303 | ||
304 | config CPU_LITTLE_ENDIAN | |
305 | bool "Little Endian" | |
306 | ||
307 | config CPU_BIG_ENDIAN | |
308 | bool "Big Endian" | |
309 | ||
310 | endchoice | |
cad82448 | 311 | |
1da177e4 LT |
312 | config SH_FPU |
313 | bool "FPU support" | |
314 | depends on !CPU_SH3 | |
315 | default y | |
316 | help | |
317 | Selecting this option will enable support for SH processors that | |
318 | have FPU units (ie, SH77xx). | |
319 | ||
320 | This option must be set in order to enable the FPU. | |
321 | ||
4b565680 TY |
322 | config SH_FPU_EMU |
323 | bool "FPU emulation support" | |
324 | depends on !SH_FPU && EXPERIMENTAL | |
325 | default n | |
326 | help | |
327 | Selecting this option will enable support for software FPU emulation. | |
328 | Most SH-3 users will want to say Y here, whereas most SH-4 users will | |
329 | want to say N. | |
330 | ||
1da177e4 LT |
331 | config SH_DSP |
332 | bool "DSP support" | |
e5723e0e PM |
333 | default y if SH4AL_DSP || !CPU_SH4 |
334 | default n | |
1da177e4 LT |
335 | help |
336 | Selecting this option will enable support for SH processors that | |
e5723e0e | 337 | have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP). |
1da177e4 LT |
338 | |
339 | This option must be set in order to enable the DSP. | |
340 | ||
341 | config SH_ADC | |
342 | bool "ADC support" | |
343 | depends on CPU_SH3 | |
344 | default y | |
345 | help | |
346 | Selecting this option will allow the Linux kernel to use SH3 on-chip | |
347 | ADC module. | |
348 | ||
349 | If unsure, say N. | |
350 | ||
cad82448 PM |
351 | config SH_STORE_QUEUES |
352 | bool "Support for Store Queues" | |
353 | depends on CPU_SH4 | |
354 | help | |
355 | Selecting this option will enable an in-kernel API for manipulating | |
356 | the store queues integrated in the SH-4 processors. | |
357 | ||
358 | config CPU_HAS_INTEVT | |
1da177e4 | 359 | bool |
1da177e4 | 360 | |
cad82448 PM |
361 | config CPU_HAS_PINT_IRQ |
362 | bool | |
1da177e4 | 363 | |
ba463937 PM |
364 | config CPU_HAS_MASKREG_IRQ |
365 | bool | |
366 | ||
cad82448 PM |
367 | config CPU_HAS_INTC2_IRQ |
368 | bool | |
3f22ab27 | 369 | |
cad82448 PM |
370 | config CPU_HAS_SR_RB |
371 | bool "CPU has SR.RB" | |
372 | depends on CPU_SH3 || CPU_SH4 | |
373 | default y | |
1da177e4 | 374 | help |
cad82448 PM |
375 | This will enable the use of SR.RB register bank usage. Processors |
376 | that are lacking this bit must have another method in place for | |
377 | accomplishing what is taken care of by the banked registers. | |
1da177e4 | 378 | |
cad82448 PM |
379 | See <file:Documentation/sh/register-banks.txt> for further |
380 | information on SR.RB and register banking in the kernel in general. | |
1da177e4 | 381 | |
9b3a53ab SM |
382 | config CPU_HAS_PTEA |
383 | bool | |
384 | ||
cad82448 | 385 | endmenu |
1da177e4 | 386 | |
cad82448 | 387 | menu "Timer support" |
45882145 | 388 | depends on !GENERIC_TIME |
1da177e4 | 389 | |
cad82448 PM |
390 | config SH_TMU |
391 | bool "TMU timer support" | |
9d4436a6 | 392 | depends on CPU_SH3 || CPU_SH4 |
1da177e4 | 393 | default y |
1da177e4 | 394 | help |
cad82448 | 395 | This enables the use of the TMU as the system timer. |
1da177e4 | 396 | |
9d4436a6 YS |
397 | config SH_CMT |
398 | bool "CMT timer support" | |
399 | depends on CPU_SH2 | |
400 | default y | |
401 | help | |
402 | This enables the use of the CMT as the system timer. | |
403 | ||
404 | config SH_MTU2 | |
405 | bool "MTU2 timer support" | |
406 | depends on CPU_SH2A | |
407 | default n | |
408 | help | |
409 | This enables the use of the MTU2 as the system timer. | |
410 | ||
cad82448 | 411 | endmenu |
1da177e4 | 412 | |
e8fb67f8 | 413 | source "arch/sh/boards/renesas/hs7751rvoip/Kconfig" |
1da177e4 | 414 | |
36efc354 | 415 | source "arch/sh/boards/renesas/rts7751r2d/Kconfig" |
cad82448 | 416 | |
5283ecb5 PM |
417 | source "arch/sh/boards/renesas/r7780rp/Kconfig" |
418 | ||
417528a2 PM |
419 | config SH_TIMER_IRQ |
420 | int | |
421 | default "28" if CPU_SUBTYPE_SH7780 | |
422 | default "86" if CPU_SUBTYPE_SH7619 | |
423 | default "140" if CPU_SUBTYPE_SH7206 | |
424 | default "16" | |
425 | ||
bd156147 PM |
426 | config NO_IDLE_HZ |
427 | bool "Dynamic tick timer" | |
428 | help | |
429 | Select this option if you want to disable continuous timer ticks | |
430 | and have them programmed to occur as required. This option saves | |
431 | power as the system can remain in idle state for longer. | |
432 | ||
433 | By default dynamic tick is disabled during the boot, and can be | |
434 | manually enabled with: | |
435 | ||
436 | echo 1 > /sys/devices/system/timer/timer0/dyn_tick | |
437 | ||
438 | Alternatively, if you want dynamic tick automatically enabled | |
439 | during boot, pass "dyntick=enable" via the kernel command string. | |
440 | ||
441 | Please note that dynamic tick may affect the accuracy of | |
442 | timekeeping on some platforms depending on the implementation. | |
443 | ||
cad82448 PM |
444 | config SH_PCLK_FREQ |
445 | int "Peripheral clock frequency (in Hz)" | |
9d4436a6 YS |
446 | default "27000000" if CPU_SUBTYPE_SH73180 || CPU_SUBTYPE_SH7343 |
447 | default "31250000" if CPU_SUBTYPE_SH7619 | |
448 | default "33333333" if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH7770 || \ | |
449 | CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ | |
450 | CPU_SUBTYPE_SH7206 | |
cad82448 PM |
451 | default "50000000" if CPU_SUBTYPE_SH7750 || CPU_SUBTYPE_SH7780 |
452 | default "60000000" if CPU_SUBTYPE_SH7751 | |
cad82448 | 453 | default "66000000" if CPU_SUBTYPE_SH4_202 |
1da177e4 | 454 | help |
cad82448 PM |
455 | This option is used to specify the peripheral clock frequency. |
456 | This is necessary for determining the reference clock value on | |
457 | platforms lacking an RTC. | |
1da177e4 | 458 | |
9d4436a6 YS |
459 | config SH_CLK_MD |
460 | int "CPU Mode Pin Setting" | |
461 | depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206 | |
462 | help | |
463 | MD2 - MD0 Setting. | |
464 | ||
cad82448 PM |
465 | menu "CPU Frequency scaling" |
466 | ||
467 | source "drivers/cpufreq/Kconfig" | |
1da177e4 | 468 | |
cad82448 PM |
469 | config SH_CPU_FREQ |
470 | tristate "SuperH CPU Frequency driver" | |
471 | depends on CPU_FREQ | |
472 | select CPU_FREQ_TABLE | |
1da177e4 | 473 | help |
cad82448 PM |
474 | This adds the cpufreq driver for SuperH. At present, only |
475 | the SH-4 is supported. | |
1da177e4 | 476 | |
cad82448 | 477 | For details, take a look at <file:Documentation/cpu-freq>. |
1da177e4 LT |
478 | |
479 | If unsure, say N. | |
480 | ||
cad82448 PM |
481 | endmenu |
482 | ||
483 | source "arch/sh/drivers/dma/Kconfig" | |
484 | ||
485 | source "arch/sh/cchips/Kconfig" | |
486 | ||
487 | config HEARTBEAT | |
488 | bool "Heartbeat LED" | |
5a4053b2 | 489 | depends on SH_MPC1211 || SH_SH03 || \ |
bc8fb5d0 | 490 | SH_BIGSUR || SOLUTION_ENGINE || \ |
cad82448 | 491 | SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_LANDISK |
1da177e4 | 492 | help |
cad82448 PM |
493 | Use the power-on LED on your machine as a load meter. The exact |
494 | behavior is platform-dependent, but normally the flash frequency is | |
495 | a hyperbolic function of the 5-minute load average. | |
1da177e4 | 496 | |
9f5e8eee PM |
497 | source "arch/sh/drivers/Kconfig" |
498 | ||
cad82448 | 499 | endmenu |
1da177e4 | 500 | |
cad82448 PM |
501 | config ISA_DMA_API |
502 | bool | |
05efc67d | 503 | depends on SH_MPC1211 |
cad82448 | 504 | default y |
1da177e4 | 505 | |
cad82448 PM |
506 | menu "Kernel features" |
507 | ||
91b91d01 PM |
508 | source kernel/Kconfig.hz |
509 | ||
cad82448 PM |
510 | config KEXEC |
511 | bool "kexec system call (EXPERIMENTAL)" | |
512 | depends on EXPERIMENTAL | |
1da177e4 | 513 | help |
cad82448 PM |
514 | kexec is a system call that implements the ability to shutdown your |
515 | current kernel, and to start another kernel. It is like a reboot | |
1f1332f7 | 516 | but it is independent of the system firmware. And like a reboot |
cad82448 PM |
517 | you can start any kernel with it, not just Linux. |
518 | ||
1f1332f7 | 519 | The name comes from the similarity to the exec system call. |
cad82448 PM |
520 | |
521 | It is an ongoing process to be certain the hardware in a machine | |
522 | is properly shutdown, so do not be surprised if this code does not | |
523 | initially work for you. It may help to enable device hotplugging | |
524 | support. As of this writing the exact hardware interface is | |
525 | strongly in flux, so no good recommendation can be made. | |
526 | ||
1da177e4 LT |
527 | config SMP |
528 | bool "Symmetric multi-processing support" | |
529 | ---help--- | |
530 | This enables support for systems with more than one CPU. If you have | |
531 | a system with only one CPU, like most personal computers, say N. If | |
532 | you have a system with more than one CPU, say Y. | |
533 | ||
534 | If you say N here, the kernel will run on single and multiprocessor | |
535 | machines, but will use only one CPU of a multiprocessor machine. If | |
536 | you say Y here, the kernel will run on many, but not all, | |
537 | singleprocessor machines. On a singleprocessor machine, the kernel | |
538 | will run faster if you say N here. | |
539 | ||
540 | People using multiprocessor machines who say Y here should also say | |
541 | Y to "Enhanced Real Time Clock Support", below. | |
542 | ||
543 | See also the <file:Documentation/smp.txt>, | |
544 | <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available | |
545 | at <http://www.tldp.org/docs.html#howto>. | |
546 | ||
547 | If you don't know what to do here, say N. | |
548 | ||
549 | config NR_CPUS | |
550 | int "Maximum number of CPUs (2-32)" | |
551 | range 2 32 | |
552 | depends on SMP | |
553 | default "2" | |
554 | help | |
555 | This allows you to specify the maximum number of CPUs which this | |
556 | kernel will support. The maximum supported value is 32 and the | |
557 | minimum value which makes sense is 2. | |
558 | ||
559 | This is purely to save memory - each supported CPU adds | |
560 | approximately eight kilobytes to the kernel image. | |
561 | ||
91b91d01 PM |
562 | source "kernel/Kconfig.preempt" |
563 | ||
cad82448 PM |
564 | config CPU_HAS_SR_RB |
565 | bool "CPU has SR.RB" | |
566 | depends on CPU_SH3 || CPU_SH4 | |
1da177e4 LT |
567 | default y |
568 | help | |
cad82448 PM |
569 | This will enable the use of SR.RB register bank usage. Processors |
570 | that are lacking this bit must have another method in place for | |
571 | accomplishing what is taken care of by the banked registers. | |
1da177e4 | 572 | |
cad82448 PM |
573 | See <file:Documentation/sh/register-banks.txt> for further |
574 | information on SR.RB and register banking in the kernel in general. | |
1da177e4 | 575 | |
c80d79d7 YG |
576 | config NODES_SHIFT |
577 | int | |
578 | default "1" | |
579 | depends on NEED_MULTIPLE_NODES | |
580 | ||
cad82448 | 581 | endmenu |
1da177e4 | 582 | |
cad82448 | 583 | menu "Boot options" |
1da177e4 | 584 | |
cad82448 PM |
585 | config ZERO_PAGE_OFFSET |
586 | hex "Zero page offset" | |
587 | default "0x00004000" if SH_MPC1211 || SH_SH03 | |
588 | default "0x00001000" | |
1da177e4 | 589 | help |
cad82448 | 590 | This sets the default offset of zero page. |
1da177e4 | 591 | |
cad82448 PM |
592 | config BOOT_LINK_OFFSET |
593 | hex "Link address offset for booting" | |
594 | default "0x00800000" | |
595 | help | |
596 | This option allows you to set the link address offset of the zImage. | |
597 | This can be useful if you are on a board which has a small amount of | |
598 | memory. | |
1da177e4 | 599 | |
cad82448 PM |
600 | config UBC_WAKEUP |
601 | bool "Wakeup UBC on startup" | |
602 | help | |
603 | Selecting this option will wakeup the User Break Controller (UBC) on | |
604 | startup. Although the UBC is left in an awake state when the processor | |
605 | comes up, some boot loaders misbehave by putting the UBC to sleep in a | |
606 | power saving state, which causes issues with things like ptrace(). | |
1da177e4 | 607 | |
cad82448 | 608 | If unsure, say N. |
1da177e4 | 609 | |
cad82448 PM |
610 | config CMDLINE_BOOL |
611 | bool "Default bootloader kernel arguments" | |
1da177e4 | 612 | |
cad82448 PM |
613 | config CMDLINE |
614 | string "Initial kernel command string" | |
615 | depends on CMDLINE_BOOL | |
616 | default "console=ttySC1,115200" | |
1da177e4 LT |
617 | |
618 | endmenu | |
619 | ||
cad82448 | 620 | menu "Bus options" |
1da177e4 LT |
621 | |
622 | # Even on SuperH devices which don't have an ISA bus, | |
623 | # this variable helps the PCMCIA modules handle | |
624 | # IRQ requesting properly -- Greg Banks. | |
625 | # | |
626 | # Though we're generally not interested in it when | |
627 | # we're not using PCMCIA, so we make it dependent on | |
628 | # PCMCIA outright. -- PFM. | |
629 | config ISA | |
630 | bool | |
cad82448 | 631 | default y if PCMCIA |
1da177e4 LT |
632 | help |
633 | Find out whether you have ISA slots on your motherboard. ISA is the | |
634 | name of a bus system, i.e. the way the CPU talks to the other stuff | |
635 | inside your box. Other bus systems are PCI, EISA, MicroChannel | |
636 | (MCA) or VESA. ISA is an older system, now being displaced by PCI; | |
637 | newer boards don't support it. If you have ISA, say Y, otherwise N. | |
638 | ||
639 | config EISA | |
640 | bool | |
641 | ---help--- | |
642 | The Extended Industry Standard Architecture (EISA) bus was | |
643 | developed as an open alternative to the IBM MicroChannel bus. | |
644 | ||
645 | The EISA bus provided some of the features of the IBM MicroChannel | |
646 | bus while maintaining backward compatibility with cards made for | |
647 | the older ISA bus. The EISA bus saw limited use between 1988 and | |
648 | 1995 when it was made obsolete by the PCI bus. | |
649 | ||
650 | Say Y here if you are building a kernel for an EISA-based machine. | |
651 | ||
652 | Otherwise, say N. | |
653 | ||
654 | config MCA | |
655 | bool | |
656 | help | |
657 | MicroChannel Architecture is found in some IBM PS/2 machines and | |
658 | laptops. It is a bus system similar to PCI or ISA. See | |
659 | <file:Documentation/mca.txt> (and especially the web page given | |
660 | there) before attempting to build an MCA bus kernel. | |
661 | ||
662 | config SBUS | |
663 | bool | |
664 | ||
cad82448 PM |
665 | config SUPERHYWAY |
666 | tristate "SuperHyway Bus support" | |
667 | depends on CPU_SUBTYPE_SH4_202 | |
1da177e4 LT |
668 | |
669 | source "arch/sh/drivers/pci/Kconfig" | |
670 | ||
671 | source "drivers/pci/Kconfig" | |
672 | ||
673 | source "drivers/pcmcia/Kconfig" | |
674 | ||
675 | source "drivers/pci/hotplug/Kconfig" | |
676 | ||
677 | endmenu | |
678 | ||
679 | menu "Executable file formats" | |
680 | ||
681 | source "fs/Kconfig.binfmt" | |
682 | ||
683 | endmenu | |
684 | ||
3aa770e7 AS |
685 | menu "Power management options (EXPERIMENTAL)" |
686 | depends on EXPERIMENTAL | |
687 | ||
688 | source kernel/power/Kconfig | |
689 | ||
690 | config APM | |
691 | bool "Advanced Power Management Emulation" | |
692 | depends on PM | |
693 | endmenu | |
694 | ||
d5950b43 SR |
695 | source "net/Kconfig" |
696 | ||
1da177e4 LT |
697 | source "drivers/Kconfig" |
698 | ||
699 | source "fs/Kconfig" | |
700 | ||
701 | source "arch/sh/oprofile/Kconfig" | |
702 | ||
703 | source "arch/sh/Kconfig.debug" | |
704 | ||
705 | source "security/Kconfig" | |
706 | ||
707 | source "crypto/Kconfig" | |
708 | ||
709 | source "lib/Kconfig" |