sh: Rearrange blocks in entry-common.S
[linux-block.git] / arch / sh / Kconfig
CommitLineData
b2441318 1# SPDX-License-Identifier: GPL-2.0
1da177e4 2config SUPERH
ea0e1a9a 3 def_bool y
582dc536
CH
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAVE_CUSTOM_GPIO_H
6 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
aef0f78e 7 select ARCH_HAS_BINFMT_FLAT if !MMU
582dc536
CH
8 select ARCH_HAS_GIGANTIC_PAGE
9 select ARCH_HAS_GCOV_PROFILE_ALL
3010a5ea 10 select ARCH_HAS_PTE_SPECIAL
45624ac3 11 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
582dc536 12 select ARCH_HIBERNATION_POSSIBLE if MMU
09d8dd93 13 select ARCH_MIGHT_HAVE_PC_PARPORT
582dc536 14 select ARCH_WANT_IPC_PARSE_VERSION
6d803ba7 15 select CLKDEV_LOOKUP
582dc536 16 select CPU_NO_EFFICIENT_FFS
ff4c25f2 17 select DMA_DECLARE_COHERENT
582dc536
CH
18 select GENERIC_ATOMIC64
19 select GENERIC_CLOCKEVENTS
20 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
21 select GENERIC_IDLE_POLL_SETUP
22 select GENERIC_IRQ_SHOW
23 select GENERIC_PCI_IOMAP if PCI
24 select GENERIC_SCHED_CLOCK
25 select GENERIC_STRNCPY_FROM_USER
26 select GENERIC_STRNLEN_USER
27 select GENERIC_SMP_IDLE_THREAD
28 select GUP_GET_PTE_LOW_HIGH if X2TLB
29 select HAVE_ARCH_AUDITSYSCALL
30 select HAVE_ARCH_KGDB
d7b01f78 31 select HAVE_ARCH_TRACEHOOK
e1cc9d8d 32 select HAVE_COPY_THREAD_TLS
9b2a60c4 33 select HAVE_DEBUG_BUGVERBOSE
b69ec42b 34 select HAVE_DEBUG_KMEMLEAK
582dc536
CH
35 select HAVE_DYNAMIC_FTRACE
36 select HAVE_FAST_GUP if MMU
37 select HAVE_FUNCTION_GRAPH_TRACER
38 select HAVE_FUNCTION_TRACER
39 select HAVE_FUTEX_CMPXCHG if FUTEX
40 select HAVE_FTRACE_MCOUNT_RECORD
41 select HAVE_HW_BREAKPOINT
42 select HAVE_IDE if HAS_IOPORT_MAP
43 select HAVE_IOREMAP_PROT if MMU && !X2TLB
07e88e1b 44 select HAVE_KERNEL_BZIP2
582dc536 45 select HAVE_KERNEL_GZIP
07e88e1b 46 select HAVE_KERNEL_LZMA
c7b16efb 47 select HAVE_KERNEL_LZO
582dc536
CH
48 select HAVE_KERNEL_XZ
49 select HAVE_KPROBES
50 select HAVE_KRETPROBES
51 select HAVE_MIXED_BREAKPOINTS_REGS
52 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
53 select HAVE_NMI
54 select HAVE_OPROFILE
55 select HAVE_PATA_PLATFORM
56 select HAVE_PERF_EVENTS
57 select HAVE_REGS_AND_STACK_ACCESS_API
af1839eb 58 select HAVE_UID16
582dc536 59 select HAVE_STACKPROTECTOR
a74f7e04 60 select HAVE_SYSCALL_TRACEPOINTS
ed170924 61 select IRQ_FORCED_THREADING
582dc536 62 select MAY_HAVE_SPARSE_IRQ
786d35d4 63 select MODULES_USE_ELF_RELA
582dc536 64 select NEED_SG_DMA_LENGTH
cd57d07b 65 select NO_DMA if !MMU && !DMA_COHERENT
eb01d42a 66 select NO_GENERIC_PCI_IOPORT_MAP if PCI
0679a858 67 select OLD_SIGACTION
582dc536 68 select OLD_SIGSUSPEND
eb01d42a 69 select PCI_DOMAINS if PCI
e583d6b3 70 select PERF_EVENTS
582dc536
CH
71 select PERF_USE_VMALLOC
72 select RTC_LIB
57b81330 73 select SPARSE_IRQ
37744fee
AB
74 help
75 The SuperH is a RISC processor targeted for use in embedded systems
76 and consumer electronics; it was also used in the Sega Dreamcast
77 gaming console. The SuperH port has a home page at
78 <http://www.linux-sh.org/>.
39d28a2d 79
fa691511
PM
80config GENERIC_BUG
81 def_bool y
37744fee 82 depends on BUG
3767f3f1 83
e2268c71 84config GENERIC_HWEIGHT
d7ef4fb3 85 def_bool y
e2268c71 86
1da177e4 87config GENERIC_CALIBRATE_DELAY
cf204fa7 88 bool
1da177e4 89
bdcab87b
PM
90config GENERIC_LOCKBREAK
91 def_bool y
7be60ccb 92 depends on SMP && PREEMPTION
bdcab87b 93
af998a9a
MD
94config ARCH_SUSPEND_POSSIBLE
95 def_bool n
96
97config ARCH_HIBERNATION_POSSIBLE
98 def_bool n
357d5946 99
0a9b0db1
PM
100config SYS_SUPPORTS_APM_EMULATION
101 bool
af998a9a 102 select ARCH_SUSPEND_POSSIBLE
357d5946 103
ffb4a73d
PM
104config SYS_SUPPORTS_HUGETLBFS
105 bool
106
357d5946
PM
107config SYS_SUPPORTS_SMP
108 bool
109
110config SYS_SUPPORTS_NUMA
111 bool
112
afbfb52e 113config STACKTRACE_SUPPORT
d7ef4fb3 114 def_bool y
afbfb52e
PM
115
116config LOCKDEP_SUPPORT
d7ef4fb3 117 def_bool y
afbfb52e 118
f0d1b0b3 119config ARCH_HAS_ILOG2_U32
d7ef4fb3 120 def_bool n
f0d1b0b3
DH
121
122config ARCH_HAS_ILOG2_U64
d7ef4fb3 123 def_bool n
f0d1b0b3 124
ce816fa8 125config NO_IOPORT_MAP
37b7a978 126 def_bool !PCI
8a8e5462
GU
127 depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \
128 !SH_SOLUTION_ENGINE
86e4dd5a 129
e7cc9a73
MD
130config IO_TRAPPED
131 bool
132
b7e68d68
PM
133config SWAP_IO_SPACE
134 bool
135
01be5d63
PM
136config DMA_COHERENT
137 bool
138
139config DMA_NONCOHERENT
cd57d07b 140 def_bool !NO_DMA && !DMA_COHERENT
6dfdf673 141 select ARCH_HAS_DMA_PREP_COHERENT
6fa1d28e 142 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
6dfdf673 143 select DMA_DIRECT_REMAP
01be5d63 144
69543d63
KS
145config PGTABLE_LEVELS
146 default 3 if X2TLB
147 default 2
148
1da177e4
LT
149menu "System type"
150
b5f42db0
PM
151#
152# Processor families
153#
154config CPU_SH2
155 bool
049d2804 156 select SH_INTC
b5f42db0
PM
157
158config CPU_SH2A
159 bool
160 select CPU_SH2
e2fcf74f 161 select UNCACHED_MAPPING
b5f42db0 162
5a846aba
RF
163config CPU_J2
164 bool
165 select CPU_SH2
166 select OF
167 select OF_EARLY_FLATTREE
168
b5f42db0
PM
169config CPU_SH3
170 bool
171 select CPU_HAS_INTEVT
172 select CPU_HAS_SR_RB
049d2804 173 select SH_INTC
fbfa8934 174 select SYS_SUPPORTS_SH_TMU
b5f42db0
PM
175
176config CPU_SH4
177 bool
178 select CPU_HAS_INTEVT
179 select CPU_HAS_SR_RB
b5f42db0 180 select CPU_HAS_FPU if !CPU_SH4AL_DSP
049d2804 181 select SH_INTC
fbfa8934 182 select SYS_SUPPORTS_SH_TMU
ffb4a73d 183 select SYS_SUPPORTS_HUGETLBFS if MMU
b5f42db0
PM
184
185config CPU_SH4A
186 bool
187 select CPU_SH4
188
189config CPU_SH4AL_DSP
190 bool
191 select CPU_SH4A
192 select CPU_HAS_DSP
193
194config CPU_SHX2
195 bool
196
197config CPU_SHX3
198 bool
01be5d63 199 select DMA_COHERENT
4b478ee2
PM
200 select SYS_SUPPORTS_SMP
201 select SYS_SUPPORTS_NUMA
b5f42db0 202
dc65a977
PM
203config ARCH_SHMOBILE
204 bool
77594912 205 select ARCH_SUSPEND_POSSIBLE
464ed18e 206 select PM
dc65a977 207
86c8c047
MF
208config CPU_HAS_PMU
209 depends on CPU_SH4 || CPU_SH4A
210 default y
211 bool
212
b5f42db0
PM
213choice
214 prompt "Processor sub-type selection"
215
216#
217# Processor subtypes
218#
219
220# SH-2 Processor Support
221
222config CPU_SUBTYPE_SH7619
223 bool "Support SH7619 processor"
224 select CPU_SH2
fbfa8934 225 select SYS_SUPPORTS_SH_CMT
b5f42db0 226
5a846aba
RF
227config CPU_SUBTYPE_J2
228 bool "Support J2 processor"
229 select CPU_J2
b4214e41
RF
230 select SYS_SUPPORTS_SMP
231 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
5a846aba 232
b5f42db0
PM
233# SH-2A Processor Support
234
2825999e
PG
235config CPU_SUBTYPE_SH7201
236 bool "Support SH7201 processor"
237 select CPU_SH2A
238 select CPU_HAS_FPU
fbfa8934 239 select SYS_SUPPORTS_SH_MTU2
2825999e 240
6d01f510
PM
241config CPU_SUBTYPE_SH7203
242 bool "Support SH7203 processor"
243 select CPU_SH2A
74d99a5e 244 select CPU_HAS_FPU
fbfa8934
MD
245 select SYS_SUPPORTS_SH_CMT
246 select SYS_SUPPORTS_SH_MTU2
b768ecbc 247 select PINCTRL
6d01f510 248
b5f42db0
PM
249config CPU_SUBTYPE_SH7206
250 bool "Support SH7206 processor"
251 select CPU_SH2A
fbfa8934
MD
252 select SYS_SUPPORTS_SH_CMT
253 select SYS_SUPPORTS_SH_MTU2
b5f42db0 254
a8f67f4b
PM
255config CPU_SUBTYPE_SH7263
256 bool "Support SH7263 processor"
257 select CPU_SH2A
74d99a5e 258 select CPU_HAS_FPU
fbfa8934
MD
259 select SYS_SUPPORTS_SH_CMT
260 select SYS_SUPPORTS_SH_MTU2
a8f67f4b 261
51ce3068
PE
262config CPU_SUBTYPE_SH7264
263 bool "Support SH7264 processor"
264 select CPU_SH2A
265 select CPU_HAS_FPU
fbfa8934
MD
266 select SYS_SUPPORTS_SH_CMT
267 select SYS_SUPPORTS_SH_MTU2
5946e7bb 268 select PINCTRL
51ce3068 269
0b25b7c8
PE
270config CPU_SUBTYPE_SH7269
271 bool "Support SH7269 processor"
272 select CPU_SH2A
273 select CPU_HAS_FPU
fbfa8934
MD
274 select SYS_SUPPORTS_SH_CMT
275 select SYS_SUPPORTS_SH_MTU2
fb872fcc 276 select PINCTRL
0b25b7c8 277
2ad69908
PM
278config CPU_SUBTYPE_MXG
279 bool "Support MX-G processor"
280 select CPU_SH2A
fbfa8934 281 select SYS_SUPPORTS_SH_MTU2
2ad69908
PM
282 help
283 Select MX-G if running on an R8A03022BG part.
284
b5f42db0
PM
285# SH-3 Processor Support
286
287config CPU_SUBTYPE_SH7705
288 bool "Support SH7705 processor"
289 select CPU_SH3
290
291config CPU_SUBTYPE_SH7706
292 bool "Support SH7706 processor"
293 select CPU_SH3
294 help
295 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
296
297config CPU_SUBTYPE_SH7707
298 bool "Support SH7707 processor"
299 select CPU_SH3
300 help
301 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
302
303config CPU_SUBTYPE_SH7708
304 bool "Support SH7708 processor"
305 select CPU_SH3
306 help
307 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
308 if you have a 100 Mhz SH-3 HD6417708R CPU.
309
310config CPU_SUBTYPE_SH7709
311 bool "Support SH7709 processor"
312 select CPU_SH3
313 help
314 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
315
316config CPU_SUBTYPE_SH7710
317 bool "Support SH7710 processor"
318 select CPU_SH3
319 select CPU_HAS_DSP
320 help
321 Select SH7710 if you have a SH3-DSP SH7710 CPU.
322
323config CPU_SUBTYPE_SH7712
324 bool "Support SH7712 processor"
325 select CPU_SH3
326 select CPU_HAS_DSP
327 help
328 Select SH7712 if you have a SH3-DSP SH7712 CPU.
329
330config CPU_SUBTYPE_SH7720
331 bool "Support SH7720 processor"
332 select CPU_SH3
333 select CPU_HAS_DSP
fbfa8934 334 select SYS_SUPPORTS_SH_CMT
7b61ca5d 335 select USB_OHCI_SH if USB_OHCI_HCD
85db6bff 336 select PINCTRL
b5f42db0
PM
337 help
338 Select SH7720 if you have a SH3-DSP SH7720 CPU.
339
31a49c4b
YS
340config CPU_SUBTYPE_SH7721
341 bool "Support SH7721 processor"
342 select CPU_SH3
343 select CPU_HAS_DSP
fbfa8934 344 select SYS_SUPPORTS_SH_CMT
7b61ca5d 345 select USB_OHCI_SH if USB_OHCI_HCD
31a49c4b
YS
346 help
347 Select SH7721 if you have a SH3-DSP SH7721 CPU.
348
b5f42db0
PM
349# SH-4 Processor Support
350
351config CPU_SUBTYPE_SH7750
352 bool "Support SH7750 processor"
353 select CPU_SH4
354 help
355 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
356
357config CPU_SUBTYPE_SH7091
358 bool "Support SH7091 processor"
359 select CPU_SH4
360 help
361 Select SH7091 if you have an SH-4 based Sega device (such as
362 the Dreamcast, Naomi, and Naomi 2).
363
364config CPU_SUBTYPE_SH7750R
365 bool "Support SH7750R processor"
366 select CPU_SH4
367
368config CPU_SUBTYPE_SH7750S
369 bool "Support SH7750S processor"
370 select CPU_SH4
371
372config CPU_SUBTYPE_SH7751
373 bool "Support SH7751 processor"
374 select CPU_SH4
375 help
376 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
377 or if you have a HD6417751R CPU.
378
379config CPU_SUBTYPE_SH7751R
380 bool "Support SH7751R processor"
381 select CPU_SH4
382
383config CPU_SUBTYPE_SH7760
384 bool "Support SH7760 processor"
385 select CPU_SH4
386
387config CPU_SUBTYPE_SH4_202
388 bool "Support SH4-202 processor"
389 select CPU_SH4
390
391# SH-4A Processor Support
392
178dd0cd
PM
393config CPU_SUBTYPE_SH7723
394 bool "Support SH7723 processor"
395 select CPU_SH4A
396 select CPU_SHX2
dc65a977 397 select ARCH_SHMOBILE
178dd0cd 398 select ARCH_SPARSEMEM_ENABLE
fbfa8934 399 select SYS_SUPPORTS_SH_CMT
16941a89 400 select PINCTRL
178dd0cd
PM
401 help
402 Select SH7723 if you have an SH-MobileR2 CPU.
403
0207a2ef
KM
404config CPU_SUBTYPE_SH7724
405 bool "Support SH7724 processor"
406 select CPU_SH4A
407 select CPU_SHX2
59fe700d 408 select ARCH_SHMOBILE
0207a2ef 409 select ARCH_SPARSEMEM_ENABLE
fbfa8934 410 select SYS_SUPPORTS_SH_CMT
18ebd228 411 select PINCTRL
0207a2ef
KM
412 help
413 Select SH7724 if you have an SH-MobileR2R CPU.
414
fea88a0c
NI
415config CPU_SUBTYPE_SH7734
416 bool "Support SH7734 processor"
417 select CPU_SH4A
418 select CPU_SHX2
2c172182 419 select PINCTRL
fea88a0c
NI
420 help
421 Select SH7734 if you have a SH4A SH7734 CPU.
422
c01f0f1a
YS
423config CPU_SUBTYPE_SH7757
424 bool "Support SH7757 processor"
425 select CPU_SH4A
426 select CPU_SHX2
eb61b772 427 select PINCTRL
c01f0f1a
YS
428 help
429 Select SH7757 if you have a SH4A SH7757 CPU.
430
7d740a06
YS
431config CPU_SUBTYPE_SH7763
432 bool "Support SH7763 processor"
433 select CPU_SH4A
7b61ca5d 434 select USB_OHCI_SH if USB_OHCI_HCD
7d740a06
YS
435 help
436 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
437
b5f42db0
PM
438config CPU_SUBTYPE_SH7770
439 bool "Support SH7770 processor"
440 select CPU_SH4A
441
442config CPU_SUBTYPE_SH7780
443 bool "Support SH7780 processor"
444 select CPU_SH4A
445
446config CPU_SUBTYPE_SH7785
447 bool "Support SH7785 processor"
448 select CPU_SH4A
449 select CPU_SHX2
55ba99eb
KM
450 select ARCH_SPARSEMEM_ENABLE
451 select SYS_SUPPORTS_NUMA
77bd27b2 452 select PINCTRL
55ba99eb
KM
453
454config CPU_SUBTYPE_SH7786
455 bool "Support SH7786 processor"
456 select CPU_SH4A
37042fbd 457 select CPU_SHX3
8263a67e 458 select CPU_HAS_PTEAEX
2eb2a436 459 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
7b61ca5d 460 select USB_OHCI_SH if USB_OHCI_HCD
7b61ca5d 461 select USB_EHCI_SH if USB_EHCI_HCD
c0fdbff9 462 select PINCTRL
b5f42db0
PM
463
464config CPU_SUBTYPE_SHX3
465 bool "Support SH-X3 processor"
466 select CPU_SH4A
467 select CPU_SHX3
5840263e 468 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
fdcfdfa1 469 select GPIOLIB
3e347f08 470 select PINCTRL
b5f42db0
PM
471
472# SH4AL-DSP Processor Support
473
474config CPU_SUBTYPE_SH7343
475 bool "Support SH7343 processor"
476 select CPU_SH4AL_DSP
dc65a977 477 select ARCH_SHMOBILE
fbfa8934 478 select SYS_SUPPORTS_SH_CMT
b5f42db0
PM
479
480config CPU_SUBTYPE_SH7722
481 bool "Support SH7722 processor"
482 select CPU_SH4AL_DSP
483 select CPU_SHX2
dc65a977 484 select ARCH_SHMOBILE
b5f42db0
PM
485 select ARCH_SPARSEMEM_ENABLE
486 select SYS_SUPPORTS_NUMA
fbfa8934 487 select SYS_SUPPORTS_SH_CMT
ef97c3c1 488 select PINCTRL
9109a30e
MD
489
490config CPU_SUBTYPE_SH7366
491 bool "Support SH7366 processor"
492 select CPU_SH4AL_DSP
493 select CPU_SHX2
dc65a977 494 select ARCH_SHMOBILE
9109a30e
MD
495 select ARCH_SPARSEMEM_ENABLE
496 select SYS_SUPPORTS_NUMA
fbfa8934 497 select SYS_SUPPORTS_SH_CMT
b5f42db0 498
3cc000b5
PM
499endchoice
500
f3d22298 501source "arch/sh/mm/Kconfig"
939a24a6 502
4690bdc7 503source "arch/sh/Kconfig.cpu"
f3d22298 504
939a24a6 505source "arch/sh/boards/Kconfig"
32351a28 506
32351a28
PM
507menu "Timer and clock configuration"
508
cad82448
PM
509config SH_PCLK_FREQ
510 int "Peripheral clock frequency (in Hz)"
8152a74b 511 depends on SH_CLK_CPG_LEGACY
9d4436a6 512 default "31250000" if CPU_SUBTYPE_SH7619
8152a74b
PM
513 default "33333333" if CPU_SUBTYPE_SH7770 || \
514 CPU_SUBTYPE_SH7760 || \
515 CPU_SUBTYPE_SH7705 || \
516 CPU_SUBTYPE_SH7203 || \
517 CPU_SUBTYPE_SH7206 || \
518 CPU_SUBTYPE_SH7263 || \
43a1839c 519 CPU_SUBTYPE_MXG
05627486 520 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
cad82448 521 default "66000000" if CPU_SUBTYPE_SH4_202
05627486 522 default "50000000"
1da177e4 523 help
cad82448
PM
524 This option is used to specify the peripheral clock frequency.
525 This is necessary for determining the reference clock value on
526 platforms lacking an RTC.
1da177e4 527
36aa1e32
PM
528config SH_CLK_CPG
529 def_bool y
530
253b0887 531config SH_CLK_CPG_LEGACY
36aa1e32 532 depends on SH_CLK_CPG
43a1839c 533 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
51ce3068 534 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
bcb86e0a
PM
535 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
536 !CPU_SUBTYPE_SH7269
253b0887 537
32351a28
PM
538endmenu
539
cad82448 540menu "CPU Frequency scaling"
cad82448 541source "drivers/cpufreq/Kconfig"
cad82448
PM
542endmenu
543
9f5e8eee
PM
544source "arch/sh/drivers/Kconfig"
545
cad82448 546endmenu
1da177e4 547
cad82448
PM
548menu "Kernel features"
549
8636a1f9 550source "kernel/Kconfig.hz"
91b91d01 551
cad82448
PM
552config KEXEC
553 bool "kexec system call (EXPERIMENTAL)"
37744fee 554 depends on MMU
2965faa5 555 select KEXEC_CORE
1da177e4 556 help
cad82448
PM
557 kexec is a system call that implements the ability to shutdown your
558 current kernel, and to start another kernel. It is like a reboot
1f1332f7 559 but it is independent of the system firmware. And like a reboot
cad82448
PM
560 you can start any kernel with it, not just Linux.
561
1f1332f7 562 The name comes from the similarity to the exec system call.
cad82448
PM
563
564 It is an ongoing process to be certain the hardware in a machine
565 is properly shutdown, so do not be surprised if this code does not
bf220695
GU
566 initially work for you. As of this writing the exact hardware
567 interface is strongly in flux, so no good recommendation can be
568 made.
cad82448 569
4d5ade5b
PM
570config CRASH_DUMP
571 bool "kernel crash dumps (EXPERIMENTAL)"
37744fee 572 depends on BROKEN_ON_SMP
4d5ade5b
PM
573 help
574 Generate crash dump after being started by kexec.
575 This should be normally only set in special crash dump kernels
576 which are loaded in the main kernel with kexec-tools into
577 a specially reserved region and then later executed after
578 a crash by kdump/kexec. The crash dump kernel must be compiled
579 to a memory address not used by the main kernel using
e66ac3f2 580 PHYSICAL_START.
4d5ade5b 581
330d4810 582 For more details see Documentation/admin-guide/kdump/kdump.rst
4d5ade5b 583
b7cf6ddc
MD
584config KEXEC_JUMP
585 bool "kexec jump (EXPERIMENTAL)"
37744fee 586 depends on KEXEC && HIBERNATION
b7cf6ddc
MD
587 help
588 Jump between original kernel and kexeced kernel and invoke
589 code via KEXEC
590
e66ac3f2
SH
591config PHYSICAL_START
592 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
593 default MEMORY_START
a7f7f624 594 help
e66ac3f2
SH
595 This gives the physical address where the kernel is loaded
596 and is ordinarily the same as MEMORY_START.
597
598 Different values are primarily used in the case of kexec on panic
599 where the fail safe kernel needs to run at a different address
600 than the panic-ed kernel.
601
c4637d47
PM
602config SECCOMP
603 bool "Enable seccomp to safely compute untrusted bytecode"
604 depends on PROC_FS
c4637d47
PM
605 help
606 This kernel feature is useful for number crunching applications
607 that may need to compute untrusted bytecode during their
608 execution. By using pipes or other transports made available to
609 the process as file descriptors supporting the read/write
610 syscalls, it's possible to isolate those applications in
611 their own address space using seccomp. Once seccomp is
612 enabled via prctl, it cannot be disabled and the task is only
613 allowed to execute a few safe syscalls defined by each seccomp
614 mode.
615
616 If unsure, say N.
617
1da177e4
LT
618config SMP
619 bool "Symmetric multi-processing support"
357d5946 620 depends on SYS_SUPPORTS_SMP
a7f7f624 621 help
1da177e4 622 This enables support for systems with more than one CPU. If you have
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623 a system with only one CPU, say N. If you have a system with more
624 than one CPU, say Y.
1da177e4 625
4a474157 626 If you say N here, the kernel will run on uni- and multiprocessor
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627 machines, but will use only one CPU of a multiprocessor machine. If
628 you say Y here, the kernel will run on many, but not all,
4a474157 629 uniprocessor machines. On a uniprocessor machine, the kernel
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630 will run faster if you say N here.
631
632 People using multiprocessor machines who say Y here should also say
633 Y to "Enhanced Real Time Clock Support", below.
634
4f4cfa6c 635 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
91194e9b 636 available at <https://www.tldp.org/docs.html#howto>.
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637
638 If you don't know what to do here, say N.
639
640config NR_CPUS
641 int "Maximum number of CPUs (2-32)"
642 range 2 32
643 depends on SMP
2eb2a436 644 default "4" if CPU_SUBTYPE_SHX3
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645 default "2"
646 help
647 This allows you to specify the maximum number of CPUs which this
648 kernel will support. The maximum supported value is 32 and the
649 minimum value which makes sense is 2.
650
651 This is purely to save memory - each supported CPU adds
652 approximately eight kilobytes to the kernel image.
653
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654config HOTPLUG_CPU
655 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
40b31360 656 depends on SMP
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657 help
658 Say Y here to experiment with turning CPUs off and on. CPUs
659 can be controlled through /sys/devices/system/cpu.
660
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661config GUSA
662 def_bool y
37744fee 663 depends on !SMP
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664 help
665 This enables support for gUSA (general UserSpace Atomicity).
666 This is the default implementation for both UP and non-ll/sc
667 CPUs, and is used by the libc, amongst others.
668
669 For additional information, design information can be found
670 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
671
672 This should only be disabled for special cases where alternate
673 atomicity implementations exist.
674
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675config GUSA_RB
676 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
677 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
678 help
679 Enabling this option will allow the kernel to implement some
692105b8 680 atomic operations using a software implementation of load-locked/
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681 store-conditional (LLSC). On machines which do not have hardware
682 LLSC, this should be more efficient than the other alternative of
692105b8 683 disabling interrupts around the atomic sequence.
1efe4ce3 684
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685config HW_PERF_EVENTS
686 bool "Enable hardware performance counter support for perf events"
687 depends on PERF_EVENTS && CPU_HAS_PMU
688 default y
689 help
690 Enable hardware performance counter support for perf events. If
691 disabled, perf events will use software events only.
692
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693source "drivers/sh/Kconfig"
694
cad82448 695endmenu
1da177e4 696
cad82448 697menu "Boot options"
1da177e4 698
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699config USE_BUILTIN_DTB
700 bool "Use builtin DTB"
701 default n
702 depends on SH_DEVICE_TREE
703 help
704 Link a device tree blob for particular hardware into the kernel,
705 suppressing use of the DTB pointer provided by the bootloader.
706 This option should only be used with legacy bootloaders that are
707 not capable of providing a DTB to the kernel, or for experimental
708 hardware without stable device tree bindings.
709
710config BUILTIN_DTB_SOURCE
711 string "Source file for builtin DTB"
712 default ""
713 depends on USE_BUILTIN_DTB
714 help
715 Base name (without suffix, relative to arch/sh/boot/dts) for the
716 a DTS file that will be used to produce the DTB linked into the
717 kernel.
718
cad82448 719config ZERO_PAGE_OFFSET
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720 hex
721 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
722 SH_7751_SOLUTION_ENGINE
723 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
7a847f81 724 default "0x00002000" if PAGE_SIZE_8KB
cad82448 725 default "0x00001000"
1da177e4 726 help
cad82448 727 This sets the default offset of zero page.
1da177e4 728
cad82448 729config BOOT_LINK_OFFSET
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730 hex
731 default "0x00210000" if SH_SHMIN
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732 default "0x00810000" if SH_7780_SOLUTION_ENGINE
733 default "0x009e0000" if SH_TITAN
734 default "0x01800000" if SH_SDK7780
735 default "0x02000000" if SH_EDOSK7760
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736 default "0x00800000"
737 help
738 This option allows you to set the link address offset of the zImage.
739 This can be useful if you are on a board which has a small amount of
740 memory.
1da177e4 741
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742config ENTRY_OFFSET
743 hex
744 default "0x00001000" if PAGE_SIZE_4KB
745 default "0x00002000" if PAGE_SIZE_8KB
746 default "0x00004000" if PAGE_SIZE_16KB
747 default "0x00010000" if PAGE_SIZE_64KB
748 default "0x00000000"
749
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750config ROMIMAGE_MMCIF
751 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
0d57af1e 752 depends on CPU_SUBTYPE_SH7724
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753 help
754 Say Y here to include experimental MMCIF loading code in
755 romImage. With this enabled it is possible to write the romImage
756 kernel image to an MMC card and boot the kernel straight from
757 the reset vector. At reset the processor Mask ROM will load the
758 first part of the romImage which in turn loads the rest the kernel
759 image to RAM using the MMCIF hardware block.
760
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761choice
762 prompt "Kernel command line"
763 optional
764 default CMDLINE_OVERWRITE
765 help
766 Setting this option allows the kernel command line arguments
767 to be set.
768
769config CMDLINE_OVERWRITE
770 bool "Overwrite bootloader kernel arguments"
771 help
772 Given string will overwrite any arguments passed in by
773 a bootloader.
774
775config CMDLINE_EXTEND
776 bool "Extend bootloader kernel arguments"
777 help
778 Given string will be concatenated with arguments passed in
779 by a bootloader.
780
781endchoice
1da177e4 782
cad82448 783config CMDLINE
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784 string "Kernel command line arguments string"
785 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
cad82448 786 default "console=ttySC1,115200"
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787
788endmenu
789
cad82448 790menu "Bus options"
1da177e4 791
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792config SUPERHYWAY
793 tristate "SuperHyway Bus support"
794 depends on CPU_SUBTYPE_SH4_202
1da177e4 795
17be2d2b 796config MAPLE
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797 bool "Maple Bus support"
798 depends on SH_DREAMCAST
799 help
800 The Maple Bus is SEGA's serial communication bus for peripherals
801 on the Dreamcast. Without this bus support you won't be able to
802 get your Dreamcast keyboard etc to work, so most users
803 probably want to say 'Y' here, unless you are only using the
804 Dreamcast with a serial line terminal or a remote network
805 connection.
17be2d2b 806
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807endmenu
808
3aa770e7 809menu "Power management options (EXPERIMENTAL)"
f4cb5700 810
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811source "kernel/power/Kconfig"
812
813source "drivers/cpuidle/Kconfig"
3aa770e7 814
3aa770e7 815endmenu