Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | config SUPERH |
ea0e1a9a | 3 | def_bool y |
582dc536 CH |
4 | select ARCH_32BIT_OFF_T |
5 | select ARCH_HAVE_CUSTOM_GPIO_H | |
6 | select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) | |
aef0f78e | 7 | select ARCH_HAS_BINFMT_FLAT if !MMU |
582dc536 CH |
8 | select ARCH_HAS_GIGANTIC_PAGE |
9 | select ARCH_HAS_GCOV_PROFILE_ALL | |
3010a5ea | 10 | select ARCH_HAS_PTE_SPECIAL |
45624ac3 | 11 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
582dc536 | 12 | select ARCH_HIBERNATION_POSSIBLE if MMU |
09d8dd93 | 13 | select ARCH_MIGHT_HAVE_PC_PARPORT |
582dc536 | 14 | select ARCH_WANT_IPC_PARSE_VERSION |
6d803ba7 | 15 | select CLKDEV_LOOKUP |
582dc536 | 16 | select CPU_NO_EFFICIENT_FFS |
ff4c25f2 | 17 | select DMA_DECLARE_COHERENT |
582dc536 | 18 | select GENERIC_ATOMIC64 |
582dc536 CH |
19 | select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST |
20 | select GENERIC_IDLE_POLL_SETUP | |
21 | select GENERIC_IRQ_SHOW | |
22 | select GENERIC_PCI_IOMAP if PCI | |
23 | select GENERIC_SCHED_CLOCK | |
24 | select GENERIC_STRNCPY_FROM_USER | |
25 | select GENERIC_STRNLEN_USER | |
26 | select GENERIC_SMP_IDLE_THREAD | |
27 | select GUP_GET_PTE_LOW_HIGH if X2TLB | |
28 | select HAVE_ARCH_AUDITSYSCALL | |
29 | select HAVE_ARCH_KGDB | |
0bb605c2 | 30 | select HAVE_ARCH_SECCOMP_FILTER |
d7b01f78 | 31 | select HAVE_ARCH_TRACEHOOK |
9b2a60c4 | 32 | select HAVE_DEBUG_BUGVERBOSE |
b69ec42b | 33 | select HAVE_DEBUG_KMEMLEAK |
582dc536 CH |
34 | select HAVE_DYNAMIC_FTRACE |
35 | select HAVE_FAST_GUP if MMU | |
36 | select HAVE_FUNCTION_GRAPH_TRACER | |
37 | select HAVE_FUNCTION_TRACER | |
38 | select HAVE_FUTEX_CMPXCHG if FUTEX | |
39 | select HAVE_FTRACE_MCOUNT_RECORD | |
40 | select HAVE_HW_BREAKPOINT | |
41 | select HAVE_IDE if HAS_IOPORT_MAP | |
42 | select HAVE_IOREMAP_PROT if MMU && !X2TLB | |
07e88e1b | 43 | select HAVE_KERNEL_BZIP2 |
582dc536 | 44 | select HAVE_KERNEL_GZIP |
07e88e1b | 45 | select HAVE_KERNEL_LZMA |
c7b16efb | 46 | select HAVE_KERNEL_LZO |
582dc536 CH |
47 | select HAVE_KERNEL_XZ |
48 | select HAVE_KPROBES | |
49 | select HAVE_KRETPROBES | |
50 | select HAVE_MIXED_BREAKPOINTS_REGS | |
51 | select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER | |
52 | select HAVE_NMI | |
582dc536 CH |
53 | select HAVE_PATA_PLATFORM |
54 | select HAVE_PERF_EVENTS | |
55 | select HAVE_REGS_AND_STACK_ACCESS_API | |
af1839eb | 56 | select HAVE_UID16 |
cd1a41ce | 57 | select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS |
582dc536 | 58 | select HAVE_STACKPROTECTOR |
a74f7e04 | 59 | select HAVE_SYSCALL_TRACEPOINTS |
ed170924 | 60 | select IRQ_FORCED_THREADING |
582dc536 | 61 | select MAY_HAVE_SPARSE_IRQ |
786d35d4 | 62 | select MODULES_USE_ELF_RELA |
582dc536 | 63 | select NEED_SG_DMA_LENGTH |
cd57d07b | 64 | select NO_DMA if !MMU && !DMA_COHERENT |
eb01d42a | 65 | select NO_GENERIC_PCI_IOPORT_MAP if PCI |
0679a858 | 66 | select OLD_SIGACTION |
582dc536 | 67 | select OLD_SIGSUSPEND |
eb01d42a | 68 | select PCI_DOMAINS if PCI |
e583d6b3 | 69 | select PERF_EVENTS |
582dc536 CH |
70 | select PERF_USE_VMALLOC |
71 | select RTC_LIB | |
5e6e9852 | 72 | select SET_FS |
57b81330 | 73 | select SPARSE_IRQ |
37744fee AB |
74 | help |
75 | The SuperH is a RISC processor targeted for use in embedded systems | |
76 | and consumer electronics; it was also used in the Sega Dreamcast | |
77 | gaming console. The SuperH port has a home page at | |
78 | <http://www.linux-sh.org/>. | |
39d28a2d | 79 | |
fa691511 PM |
80 | config GENERIC_BUG |
81 | def_bool y | |
37744fee | 82 | depends on BUG |
3767f3f1 | 83 | |
e2268c71 | 84 | config GENERIC_HWEIGHT |
d7ef4fb3 | 85 | def_bool y |
e2268c71 | 86 | |
1da177e4 | 87 | config GENERIC_CALIBRATE_DELAY |
cf204fa7 | 88 | bool |
1da177e4 | 89 | |
bdcab87b PM |
90 | config GENERIC_LOCKBREAK |
91 | def_bool y | |
7be60ccb | 92 | depends on SMP && PREEMPTION |
bdcab87b | 93 | |
af998a9a MD |
94 | config ARCH_SUSPEND_POSSIBLE |
95 | def_bool n | |
96 | ||
97 | config ARCH_HIBERNATION_POSSIBLE | |
98 | def_bool n | |
357d5946 | 99 | |
0a9b0db1 PM |
100 | config SYS_SUPPORTS_APM_EMULATION |
101 | bool | |
af998a9a | 102 | select ARCH_SUSPEND_POSSIBLE |
357d5946 PM |
103 | |
104 | config SYS_SUPPORTS_SMP | |
105 | bool | |
106 | ||
107 | config SYS_SUPPORTS_NUMA | |
108 | bool | |
109 | ||
afbfb52e | 110 | config STACKTRACE_SUPPORT |
d7ef4fb3 | 111 | def_bool y |
afbfb52e PM |
112 | |
113 | config LOCKDEP_SUPPORT | |
d7ef4fb3 | 114 | def_bool y |
afbfb52e | 115 | |
f0d1b0b3 | 116 | config ARCH_HAS_ILOG2_U32 |
d7ef4fb3 | 117 | def_bool n |
f0d1b0b3 DH |
118 | |
119 | config ARCH_HAS_ILOG2_U64 | |
d7ef4fb3 | 120 | def_bool n |
f0d1b0b3 | 121 | |
ce816fa8 | 122 | config NO_IOPORT_MAP |
37b7a978 | 123 | def_bool !PCI |
8a8e5462 GU |
124 | depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \ |
125 | !SH_SOLUTION_ENGINE | |
86e4dd5a | 126 | |
e7cc9a73 MD |
127 | config IO_TRAPPED |
128 | bool | |
129 | ||
b7e68d68 PM |
130 | config SWAP_IO_SPACE |
131 | bool | |
132 | ||
01be5d63 PM |
133 | config DMA_COHERENT |
134 | bool | |
135 | ||
136 | config DMA_NONCOHERENT | |
cd57d07b | 137 | def_bool !NO_DMA && !DMA_COHERENT |
6dfdf673 | 138 | select ARCH_HAS_DMA_PREP_COHERENT |
6fa1d28e | 139 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
6dfdf673 | 140 | select DMA_DIRECT_REMAP |
01be5d63 | 141 | |
69543d63 KS |
142 | config PGTABLE_LEVELS |
143 | default 3 if X2TLB | |
144 | default 2 | |
145 | ||
1da177e4 LT |
146 | menu "System type" |
147 | ||
b5f42db0 PM |
148 | # |
149 | # Processor families | |
150 | # | |
151 | config CPU_SH2 | |
152 | bool | |
049d2804 | 153 | select SH_INTC |
b5f42db0 PM |
154 | |
155 | config CPU_SH2A | |
156 | bool | |
157 | select CPU_SH2 | |
e2fcf74f | 158 | select UNCACHED_MAPPING |
b5f42db0 | 159 | |
5a846aba RF |
160 | config CPU_J2 |
161 | bool | |
162 | select CPU_SH2 | |
163 | select OF | |
164 | select OF_EARLY_FLATTREE | |
165 | ||
b5f42db0 PM |
166 | config CPU_SH3 |
167 | bool | |
168 | select CPU_HAS_INTEVT | |
169 | select CPU_HAS_SR_RB | |
049d2804 | 170 | select SH_INTC |
fbfa8934 | 171 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
172 | |
173 | config CPU_SH4 | |
174 | bool | |
855f9a8e | 175 | select ARCH_SUPPORTS_HUGETLBFS if MMU |
b5f42db0 PM |
176 | select CPU_HAS_INTEVT |
177 | select CPU_HAS_SR_RB | |
b5f42db0 | 178 | select CPU_HAS_FPU if !CPU_SH4AL_DSP |
049d2804 | 179 | select SH_INTC |
fbfa8934 | 180 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
181 | |
182 | config CPU_SH4A | |
183 | bool | |
184 | select CPU_SH4 | |
185 | ||
186 | config CPU_SH4AL_DSP | |
187 | bool | |
188 | select CPU_SH4A | |
189 | select CPU_HAS_DSP | |
190 | ||
191 | config CPU_SHX2 | |
192 | bool | |
193 | ||
194 | config CPU_SHX3 | |
195 | bool | |
01be5d63 | 196 | select DMA_COHERENT |
4b478ee2 PM |
197 | select SYS_SUPPORTS_SMP |
198 | select SYS_SUPPORTS_NUMA | |
b5f42db0 | 199 | |
dc65a977 PM |
200 | config ARCH_SHMOBILE |
201 | bool | |
77594912 | 202 | select ARCH_SUSPEND_POSSIBLE |
464ed18e | 203 | select PM |
dc65a977 | 204 | |
86c8c047 MF |
205 | config CPU_HAS_PMU |
206 | depends on CPU_SH4 || CPU_SH4A | |
207 | default y | |
208 | bool | |
209 | ||
b5f42db0 PM |
210 | choice |
211 | prompt "Processor sub-type selection" | |
212 | ||
213 | # | |
214 | # Processor subtypes | |
215 | # | |
216 | ||
217 | # SH-2 Processor Support | |
218 | ||
219 | config CPU_SUBTYPE_SH7619 | |
220 | bool "Support SH7619 processor" | |
221 | select CPU_SH2 | |
fbfa8934 | 222 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 223 | |
5a846aba RF |
224 | config CPU_SUBTYPE_J2 |
225 | bool "Support J2 processor" | |
226 | select CPU_J2 | |
b4214e41 RF |
227 | select SYS_SUPPORTS_SMP |
228 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP | |
5a846aba | 229 | |
b5f42db0 PM |
230 | # SH-2A Processor Support |
231 | ||
2825999e PG |
232 | config CPU_SUBTYPE_SH7201 |
233 | bool "Support SH7201 processor" | |
234 | select CPU_SH2A | |
235 | select CPU_HAS_FPU | |
fbfa8934 | 236 | select SYS_SUPPORTS_SH_MTU2 |
2825999e | 237 | |
6d01f510 PM |
238 | config CPU_SUBTYPE_SH7203 |
239 | bool "Support SH7203 processor" | |
240 | select CPU_SH2A | |
74d99a5e | 241 | select CPU_HAS_FPU |
fbfa8934 MD |
242 | select SYS_SUPPORTS_SH_CMT |
243 | select SYS_SUPPORTS_SH_MTU2 | |
b768ecbc | 244 | select PINCTRL |
6d01f510 | 245 | |
b5f42db0 PM |
246 | config CPU_SUBTYPE_SH7206 |
247 | bool "Support SH7206 processor" | |
248 | select CPU_SH2A | |
fbfa8934 MD |
249 | select SYS_SUPPORTS_SH_CMT |
250 | select SYS_SUPPORTS_SH_MTU2 | |
b5f42db0 | 251 | |
a8f67f4b PM |
252 | config CPU_SUBTYPE_SH7263 |
253 | bool "Support SH7263 processor" | |
254 | select CPU_SH2A | |
74d99a5e | 255 | select CPU_HAS_FPU |
fbfa8934 MD |
256 | select SYS_SUPPORTS_SH_CMT |
257 | select SYS_SUPPORTS_SH_MTU2 | |
a8f67f4b | 258 | |
51ce3068 PE |
259 | config CPU_SUBTYPE_SH7264 |
260 | bool "Support SH7264 processor" | |
261 | select CPU_SH2A | |
262 | select CPU_HAS_FPU | |
fbfa8934 MD |
263 | select SYS_SUPPORTS_SH_CMT |
264 | select SYS_SUPPORTS_SH_MTU2 | |
5946e7bb | 265 | select PINCTRL |
51ce3068 | 266 | |
0b25b7c8 PE |
267 | config CPU_SUBTYPE_SH7269 |
268 | bool "Support SH7269 processor" | |
269 | select CPU_SH2A | |
270 | select CPU_HAS_FPU | |
fbfa8934 MD |
271 | select SYS_SUPPORTS_SH_CMT |
272 | select SYS_SUPPORTS_SH_MTU2 | |
fb872fcc | 273 | select PINCTRL |
0b25b7c8 | 274 | |
2ad69908 PM |
275 | config CPU_SUBTYPE_MXG |
276 | bool "Support MX-G processor" | |
277 | select CPU_SH2A | |
fbfa8934 | 278 | select SYS_SUPPORTS_SH_MTU2 |
2ad69908 PM |
279 | help |
280 | Select MX-G if running on an R8A03022BG part. | |
281 | ||
b5f42db0 PM |
282 | # SH-3 Processor Support |
283 | ||
284 | config CPU_SUBTYPE_SH7705 | |
285 | bool "Support SH7705 processor" | |
286 | select CPU_SH3 | |
287 | ||
288 | config CPU_SUBTYPE_SH7706 | |
289 | bool "Support SH7706 processor" | |
290 | select CPU_SH3 | |
291 | help | |
292 | Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. | |
293 | ||
294 | config CPU_SUBTYPE_SH7707 | |
295 | bool "Support SH7707 processor" | |
296 | select CPU_SH3 | |
297 | help | |
298 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. | |
299 | ||
300 | config CPU_SUBTYPE_SH7708 | |
301 | bool "Support SH7708 processor" | |
302 | select CPU_SH3 | |
303 | help | |
304 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or | |
305 | if you have a 100 Mhz SH-3 HD6417708R CPU. | |
306 | ||
307 | config CPU_SUBTYPE_SH7709 | |
308 | bool "Support SH7709 processor" | |
309 | select CPU_SH3 | |
310 | help | |
311 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. | |
312 | ||
313 | config CPU_SUBTYPE_SH7710 | |
314 | bool "Support SH7710 processor" | |
315 | select CPU_SH3 | |
316 | select CPU_HAS_DSP | |
317 | help | |
318 | Select SH7710 if you have a SH3-DSP SH7710 CPU. | |
319 | ||
320 | config CPU_SUBTYPE_SH7712 | |
321 | bool "Support SH7712 processor" | |
322 | select CPU_SH3 | |
323 | select CPU_HAS_DSP | |
324 | help | |
325 | Select SH7712 if you have a SH3-DSP SH7712 CPU. | |
326 | ||
327 | config CPU_SUBTYPE_SH7720 | |
328 | bool "Support SH7720 processor" | |
329 | select CPU_SH3 | |
330 | select CPU_HAS_DSP | |
fbfa8934 | 331 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 332 | select USB_OHCI_SH if USB_OHCI_HCD |
85db6bff | 333 | select PINCTRL |
b5f42db0 PM |
334 | help |
335 | Select SH7720 if you have a SH3-DSP SH7720 CPU. | |
336 | ||
31a49c4b YS |
337 | config CPU_SUBTYPE_SH7721 |
338 | bool "Support SH7721 processor" | |
339 | select CPU_SH3 | |
340 | select CPU_HAS_DSP | |
fbfa8934 | 341 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 342 | select USB_OHCI_SH if USB_OHCI_HCD |
31a49c4b YS |
343 | help |
344 | Select SH7721 if you have a SH3-DSP SH7721 CPU. | |
345 | ||
b5f42db0 PM |
346 | # SH-4 Processor Support |
347 | ||
348 | config CPU_SUBTYPE_SH7750 | |
349 | bool "Support SH7750 processor" | |
350 | select CPU_SH4 | |
351 | help | |
352 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. | |
353 | ||
354 | config CPU_SUBTYPE_SH7091 | |
355 | bool "Support SH7091 processor" | |
356 | select CPU_SH4 | |
357 | help | |
358 | Select SH7091 if you have an SH-4 based Sega device (such as | |
359 | the Dreamcast, Naomi, and Naomi 2). | |
360 | ||
361 | config CPU_SUBTYPE_SH7750R | |
362 | bool "Support SH7750R processor" | |
363 | select CPU_SH4 | |
364 | ||
365 | config CPU_SUBTYPE_SH7750S | |
366 | bool "Support SH7750S processor" | |
367 | select CPU_SH4 | |
368 | ||
369 | config CPU_SUBTYPE_SH7751 | |
370 | bool "Support SH7751 processor" | |
371 | select CPU_SH4 | |
372 | help | |
373 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, | |
374 | or if you have a HD6417751R CPU. | |
375 | ||
376 | config CPU_SUBTYPE_SH7751R | |
377 | bool "Support SH7751R processor" | |
378 | select CPU_SH4 | |
379 | ||
380 | config CPU_SUBTYPE_SH7760 | |
381 | bool "Support SH7760 processor" | |
382 | select CPU_SH4 | |
383 | ||
384 | config CPU_SUBTYPE_SH4_202 | |
385 | bool "Support SH4-202 processor" | |
386 | select CPU_SH4 | |
387 | ||
388 | # SH-4A Processor Support | |
389 | ||
178dd0cd PM |
390 | config CPU_SUBTYPE_SH7723 |
391 | bool "Support SH7723 processor" | |
392 | select CPU_SH4A | |
393 | select CPU_SHX2 | |
dc65a977 | 394 | select ARCH_SHMOBILE |
178dd0cd | 395 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 396 | select SYS_SUPPORTS_SH_CMT |
16941a89 | 397 | select PINCTRL |
178dd0cd PM |
398 | help |
399 | Select SH7723 if you have an SH-MobileR2 CPU. | |
400 | ||
0207a2ef KM |
401 | config CPU_SUBTYPE_SH7724 |
402 | bool "Support SH7724 processor" | |
403 | select CPU_SH4A | |
404 | select CPU_SHX2 | |
59fe700d | 405 | select ARCH_SHMOBILE |
0207a2ef | 406 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 407 | select SYS_SUPPORTS_SH_CMT |
18ebd228 | 408 | select PINCTRL |
0207a2ef KM |
409 | help |
410 | Select SH7724 if you have an SH-MobileR2R CPU. | |
411 | ||
fea88a0c NI |
412 | config CPU_SUBTYPE_SH7734 |
413 | bool "Support SH7734 processor" | |
414 | select CPU_SH4A | |
415 | select CPU_SHX2 | |
2c172182 | 416 | select PINCTRL |
fea88a0c NI |
417 | help |
418 | Select SH7734 if you have a SH4A SH7734 CPU. | |
419 | ||
c01f0f1a YS |
420 | config CPU_SUBTYPE_SH7757 |
421 | bool "Support SH7757 processor" | |
422 | select CPU_SH4A | |
423 | select CPU_SHX2 | |
eb61b772 | 424 | select PINCTRL |
c01f0f1a YS |
425 | help |
426 | Select SH7757 if you have a SH4A SH7757 CPU. | |
427 | ||
7d740a06 YS |
428 | config CPU_SUBTYPE_SH7763 |
429 | bool "Support SH7763 processor" | |
430 | select CPU_SH4A | |
7b61ca5d | 431 | select USB_OHCI_SH if USB_OHCI_HCD |
7d740a06 YS |
432 | help |
433 | Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. | |
434 | ||
b5f42db0 PM |
435 | config CPU_SUBTYPE_SH7770 |
436 | bool "Support SH7770 processor" | |
437 | select CPU_SH4A | |
438 | ||
439 | config CPU_SUBTYPE_SH7780 | |
440 | bool "Support SH7780 processor" | |
441 | select CPU_SH4A | |
442 | ||
443 | config CPU_SUBTYPE_SH7785 | |
444 | bool "Support SH7785 processor" | |
445 | select CPU_SH4A | |
446 | select CPU_SHX2 | |
55ba99eb KM |
447 | select ARCH_SPARSEMEM_ENABLE |
448 | select SYS_SUPPORTS_NUMA | |
77bd27b2 | 449 | select PINCTRL |
55ba99eb KM |
450 | |
451 | config CPU_SUBTYPE_SH7786 | |
452 | bool "Support SH7786 processor" | |
453 | select CPU_SH4A | |
37042fbd | 454 | select CPU_SHX3 |
8263a67e | 455 | select CPU_HAS_PTEAEX |
2eb2a436 | 456 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
7b61ca5d | 457 | select USB_OHCI_SH if USB_OHCI_HCD |
7b61ca5d | 458 | select USB_EHCI_SH if USB_EHCI_HCD |
c0fdbff9 | 459 | select PINCTRL |
b5f42db0 PM |
460 | |
461 | config CPU_SUBTYPE_SHX3 | |
462 | bool "Support SH-X3 processor" | |
463 | select CPU_SH4A | |
464 | select CPU_SHX3 | |
5840263e | 465 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
fdcfdfa1 | 466 | select GPIOLIB |
3e347f08 | 467 | select PINCTRL |
b5f42db0 PM |
468 | |
469 | # SH4AL-DSP Processor Support | |
470 | ||
471 | config CPU_SUBTYPE_SH7343 | |
472 | bool "Support SH7343 processor" | |
473 | select CPU_SH4AL_DSP | |
dc65a977 | 474 | select ARCH_SHMOBILE |
fbfa8934 | 475 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 PM |
476 | |
477 | config CPU_SUBTYPE_SH7722 | |
478 | bool "Support SH7722 processor" | |
479 | select CPU_SH4AL_DSP | |
480 | select CPU_SHX2 | |
dc65a977 | 481 | select ARCH_SHMOBILE |
b5f42db0 PM |
482 | select ARCH_SPARSEMEM_ENABLE |
483 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 484 | select SYS_SUPPORTS_SH_CMT |
ef97c3c1 | 485 | select PINCTRL |
9109a30e MD |
486 | |
487 | config CPU_SUBTYPE_SH7366 | |
488 | bool "Support SH7366 processor" | |
489 | select CPU_SH4AL_DSP | |
490 | select CPU_SHX2 | |
dc65a977 | 491 | select ARCH_SHMOBILE |
9109a30e MD |
492 | select ARCH_SPARSEMEM_ENABLE |
493 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 494 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 495 | |
3cc000b5 PM |
496 | endchoice |
497 | ||
f3d22298 | 498 | source "arch/sh/mm/Kconfig" |
939a24a6 | 499 | |
4690bdc7 | 500 | source "arch/sh/Kconfig.cpu" |
f3d22298 | 501 | |
939a24a6 | 502 | source "arch/sh/boards/Kconfig" |
32351a28 | 503 | |
32351a28 PM |
504 | menu "Timer and clock configuration" |
505 | ||
cad82448 PM |
506 | config SH_PCLK_FREQ |
507 | int "Peripheral clock frequency (in Hz)" | |
8152a74b | 508 | depends on SH_CLK_CPG_LEGACY |
9d4436a6 | 509 | default "31250000" if CPU_SUBTYPE_SH7619 |
8152a74b PM |
510 | default "33333333" if CPU_SUBTYPE_SH7770 || \ |
511 | CPU_SUBTYPE_SH7760 || \ | |
512 | CPU_SUBTYPE_SH7705 || \ | |
513 | CPU_SUBTYPE_SH7203 || \ | |
514 | CPU_SUBTYPE_SH7206 || \ | |
515 | CPU_SUBTYPE_SH7263 || \ | |
43a1839c | 516 | CPU_SUBTYPE_MXG |
05627486 | 517 | default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R |
cad82448 | 518 | default "66000000" if CPU_SUBTYPE_SH4_202 |
05627486 | 519 | default "50000000" |
1da177e4 | 520 | help |
cad82448 PM |
521 | This option is used to specify the peripheral clock frequency. |
522 | This is necessary for determining the reference clock value on | |
523 | platforms lacking an RTC. | |
1da177e4 | 524 | |
36aa1e32 PM |
525 | config SH_CLK_CPG |
526 | def_bool y | |
527 | ||
253b0887 | 528 | config SH_CLK_CPG_LEGACY |
36aa1e32 | 529 | depends on SH_CLK_CPG |
43a1839c | 530 | def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ |
51ce3068 | 531 | !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ |
bcb86e0a PM |
532 | !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ |
533 | !CPU_SUBTYPE_SH7269 | |
253b0887 | 534 | |
32351a28 PM |
535 | endmenu |
536 | ||
cad82448 | 537 | menu "CPU Frequency scaling" |
cad82448 | 538 | source "drivers/cpufreq/Kconfig" |
cad82448 PM |
539 | endmenu |
540 | ||
9f5e8eee PM |
541 | source "arch/sh/drivers/Kconfig" |
542 | ||
cad82448 | 543 | endmenu |
1da177e4 | 544 | |
cad82448 PM |
545 | menu "Kernel features" |
546 | ||
8636a1f9 | 547 | source "kernel/Kconfig.hz" |
91b91d01 | 548 | |
cad82448 PM |
549 | config KEXEC |
550 | bool "kexec system call (EXPERIMENTAL)" | |
37744fee | 551 | depends on MMU |
2965faa5 | 552 | select KEXEC_CORE |
1da177e4 | 553 | help |
cad82448 PM |
554 | kexec is a system call that implements the ability to shutdown your |
555 | current kernel, and to start another kernel. It is like a reboot | |
1f1332f7 | 556 | but it is independent of the system firmware. And like a reboot |
cad82448 PM |
557 | you can start any kernel with it, not just Linux. |
558 | ||
1f1332f7 | 559 | The name comes from the similarity to the exec system call. |
cad82448 PM |
560 | |
561 | It is an ongoing process to be certain the hardware in a machine | |
562 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
563 | initially work for you. As of this writing the exact hardware |
564 | interface is strongly in flux, so no good recommendation can be | |
565 | made. | |
cad82448 | 566 | |
4d5ade5b PM |
567 | config CRASH_DUMP |
568 | bool "kernel crash dumps (EXPERIMENTAL)" | |
37744fee | 569 | depends on BROKEN_ON_SMP |
4d5ade5b PM |
570 | help |
571 | Generate crash dump after being started by kexec. | |
572 | This should be normally only set in special crash dump kernels | |
573 | which are loaded in the main kernel with kexec-tools into | |
574 | a specially reserved region and then later executed after | |
575 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
576 | to a memory address not used by the main kernel using | |
e66ac3f2 | 577 | PHYSICAL_START. |
4d5ade5b | 578 | |
330d4810 | 579 | For more details see Documentation/admin-guide/kdump/kdump.rst |
4d5ade5b | 580 | |
b7cf6ddc MD |
581 | config KEXEC_JUMP |
582 | bool "kexec jump (EXPERIMENTAL)" | |
37744fee | 583 | depends on KEXEC && HIBERNATION |
b7cf6ddc MD |
584 | help |
585 | Jump between original kernel and kexeced kernel and invoke | |
586 | code via KEXEC | |
587 | ||
e66ac3f2 SH |
588 | config PHYSICAL_START |
589 | hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) | |
590 | default MEMORY_START | |
a7f7f624 | 591 | help |
e66ac3f2 SH |
592 | This gives the physical address where the kernel is loaded |
593 | and is ordinarily the same as MEMORY_START. | |
594 | ||
595 | Different values are primarily used in the case of kexec on panic | |
596 | where the fail safe kernel needs to run at a different address | |
597 | than the panic-ed kernel. | |
598 | ||
1da177e4 LT |
599 | config SMP |
600 | bool "Symmetric multi-processing support" | |
357d5946 | 601 | depends on SYS_SUPPORTS_SMP |
a7f7f624 | 602 | help |
1da177e4 | 603 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
604 | a system with only one CPU, say N. If you have a system with more |
605 | than one CPU, say Y. | |
1da177e4 | 606 | |
4a474157 | 607 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
608 | machines, but will use only one CPU of a multiprocessor machine. If |
609 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 610 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
611 | will run faster if you say N here. |
612 | ||
613 | People using multiprocessor machines who say Y here should also say | |
614 | Y to "Enhanced Real Time Clock Support", below. | |
615 | ||
4f4cfa6c | 616 | See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO |
91194e9b | 617 | available at <https://www.tldp.org/docs.html#howto>. |
1da177e4 LT |
618 | |
619 | If you don't know what to do here, say N. | |
620 | ||
621 | config NR_CPUS | |
622 | int "Maximum number of CPUs (2-32)" | |
623 | range 2 32 | |
624 | depends on SMP | |
2eb2a436 | 625 | default "4" if CPU_SUBTYPE_SHX3 |
1da177e4 LT |
626 | default "2" |
627 | help | |
628 | This allows you to specify the maximum number of CPUs which this | |
629 | kernel will support. The maximum supported value is 32 and the | |
630 | minimum value which makes sense is 2. | |
631 | ||
632 | This is purely to save memory - each supported CPU adds | |
633 | approximately eight kilobytes to the kernel image. | |
634 | ||
763142d1 PM |
635 | config HOTPLUG_CPU |
636 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
40b31360 | 637 | depends on SMP |
763142d1 PM |
638 | help |
639 | Say Y here to experiment with turning CPUs off and on. CPUs | |
640 | can be controlled through /sys/devices/system/cpu. | |
641 | ||
83662461 PM |
642 | config GUSA |
643 | def_bool y | |
37744fee | 644 | depends on !SMP |
83662461 PM |
645 | help |
646 | This enables support for gUSA (general UserSpace Atomicity). | |
647 | This is the default implementation for both UP and non-ll/sc | |
648 | CPUs, and is used by the libc, amongst others. | |
649 | ||
650 | For additional information, design information can be found | |
651 | in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. | |
652 | ||
653 | This should only be disabled for special cases where alternate | |
654 | atomicity implementations exist. | |
655 | ||
1efe4ce3 SM |
656 | config GUSA_RB |
657 | bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" | |
658 | depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) | |
659 | help | |
660 | Enabling this option will allow the kernel to implement some | |
692105b8 | 661 | atomic operations using a software implementation of load-locked/ |
1efe4ce3 SM |
662 | store-conditional (LLSC). On machines which do not have hardware |
663 | LLSC, this should be more efficient than the other alternative of | |
692105b8 | 664 | disabling interrupts around the atomic sequence. |
1efe4ce3 | 665 | |
86c8c047 MF |
666 | config HW_PERF_EVENTS |
667 | bool "Enable hardware performance counter support for perf events" | |
668 | depends on PERF_EVENTS && CPU_HAS_PMU | |
669 | default y | |
670 | help | |
671 | Enable hardware performance counter support for perf events. If | |
672 | disabled, perf events will use software events only. | |
673 | ||
43b8774d PM |
674 | source "drivers/sh/Kconfig" |
675 | ||
cad82448 | 676 | endmenu |
1da177e4 | 677 | |
cad82448 | 678 | menu "Boot options" |
1da177e4 | 679 | |
190fe191 RF |
680 | config USE_BUILTIN_DTB |
681 | bool "Use builtin DTB" | |
682 | default n | |
683 | depends on SH_DEVICE_TREE | |
684 | help | |
685 | Link a device tree blob for particular hardware into the kernel, | |
686 | suppressing use of the DTB pointer provided by the bootloader. | |
687 | This option should only be used with legacy bootloaders that are | |
688 | not capable of providing a DTB to the kernel, or for experimental | |
689 | hardware without stable device tree bindings. | |
690 | ||
691 | config BUILTIN_DTB_SOURCE | |
692 | string "Source file for builtin DTB" | |
693 | default "" | |
694 | depends on USE_BUILTIN_DTB | |
695 | help | |
696 | Base name (without suffix, relative to arch/sh/boot/dts) for the | |
697 | a DTS file that will be used to produce the DTB linked into the | |
698 | kernel. | |
699 | ||
cad82448 | 700 | config ZERO_PAGE_OFFSET |
b412a49a PM |
701 | hex |
702 | default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ | |
703 | SH_7751_SOLUTION_ENGINE | |
704 | default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 | |
7a847f81 | 705 | default "0x00002000" if PAGE_SIZE_8KB |
cad82448 | 706 | default "0x00001000" |
1da177e4 | 707 | help |
cad82448 | 708 | This sets the default offset of zero page. |
1da177e4 | 709 | |
cad82448 | 710 | config BOOT_LINK_OFFSET |
b412a49a PM |
711 | hex |
712 | default "0x00210000" if SH_SHMIN | |
b412a49a PM |
713 | default "0x00810000" if SH_7780_SOLUTION_ENGINE |
714 | default "0x009e0000" if SH_TITAN | |
715 | default "0x01800000" if SH_SDK7780 | |
716 | default "0x02000000" if SH_EDOSK7760 | |
cad82448 PM |
717 | default "0x00800000" |
718 | help | |
719 | This option allows you to set the link address offset of the zImage. | |
720 | This can be useful if you are on a board which has a small amount of | |
721 | memory. | |
1da177e4 | 722 | |
b412a49a PM |
723 | config ENTRY_OFFSET |
724 | hex | |
725 | default "0x00001000" if PAGE_SIZE_4KB | |
726 | default "0x00002000" if PAGE_SIZE_8KB | |
727 | default "0x00004000" if PAGE_SIZE_16KB | |
728 | default "0x00010000" if PAGE_SIZE_64KB | |
729 | default "0x00000000" | |
730 | ||
4705b2e8 MD |
731 | config ROMIMAGE_MMCIF |
732 | bool "Include MMCIF loader in romImage (EXPERIMENTAL)" | |
0d57af1e | 733 | depends on CPU_SUBTYPE_SH7724 |
4705b2e8 MD |
734 | help |
735 | Say Y here to include experimental MMCIF loading code in | |
736 | romImage. With this enabled it is possible to write the romImage | |
737 | kernel image to an MMC card and boot the kernel straight from | |
738 | the reset vector. At reset the processor Mask ROM will load the | |
739 | first part of the romImage which in turn loads the rest the kernel | |
740 | image to RAM using the MMCIF hardware block. | |
741 | ||
d724a9c9 PM |
742 | choice |
743 | prompt "Kernel command line" | |
744 | optional | |
745 | default CMDLINE_OVERWRITE | |
746 | help | |
747 | Setting this option allows the kernel command line arguments | |
748 | to be set. | |
749 | ||
750 | config CMDLINE_OVERWRITE | |
751 | bool "Overwrite bootloader kernel arguments" | |
752 | help | |
753 | Given string will overwrite any arguments passed in by | |
754 | a bootloader. | |
755 | ||
756 | config CMDLINE_EXTEND | |
757 | bool "Extend bootloader kernel arguments" | |
758 | help | |
759 | Given string will be concatenated with arguments passed in | |
760 | by a bootloader. | |
761 | ||
762 | endchoice | |
1da177e4 | 763 | |
cad82448 | 764 | config CMDLINE |
d724a9c9 PM |
765 | string "Kernel command line arguments string" |
766 | depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND | |
cad82448 | 767 | default "console=ttySC1,115200" |
1da177e4 LT |
768 | |
769 | endmenu | |
770 | ||
cad82448 | 771 | menu "Bus options" |
1da177e4 | 772 | |
cad82448 PM |
773 | config SUPERHYWAY |
774 | tristate "SuperHyway Bus support" | |
775 | depends on CPU_SUBTYPE_SH4_202 | |
1da177e4 | 776 | |
17be2d2b | 777 | config MAPLE |
e16038ab PM |
778 | bool "Maple Bus support" |
779 | depends on SH_DREAMCAST | |
780 | help | |
781 | The Maple Bus is SEGA's serial communication bus for peripherals | |
782 | on the Dreamcast. Without this bus support you won't be able to | |
783 | get your Dreamcast keyboard etc to work, so most users | |
784 | probably want to say 'Y' here, unless you are only using the | |
785 | Dreamcast with a serial line terminal or a remote network | |
786 | connection. | |
17be2d2b | 787 | |
1da177e4 LT |
788 | endmenu |
789 | ||
3aa770e7 | 790 | menu "Power management options (EXPERIMENTAL)" |
f4cb5700 | 791 | |
c6f17cb2 MD |
792 | source "kernel/power/Kconfig" |
793 | ||
794 | source "drivers/cpuidle/Kconfig" | |
3aa770e7 | 795 | |
3aa770e7 | 796 | endmenu |