arch: sh: smc37c93x: fix spelling mistake
[linux-block.git] / arch / sh / Kconfig
CommitLineData
b2441318 1# SPDX-License-Identifier: GPL-2.0
1da177e4 2config SUPERH
ea0e1a9a 3 def_bool y
aef0f78e 4 select ARCH_HAS_BINFMT_FLAT if !MMU
3010a5ea 5 select ARCH_HAS_PTE_SPECIAL
45624ac3 6 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
09d8dd93 7 select ARCH_MIGHT_HAVE_PC_PARPORT
560b8c0e 8 select HAVE_PATA_PLATFORM
6d803ba7 9 select CLKDEV_LOOKUP
ff4c25f2 10 select DMA_DECLARE_COHERENT
ce816fa8 11 select HAVE_IDE if HAS_IOPORT_MAP
42d4b839 12 select HAVE_OPROFILE
d7b01f78 13 select HAVE_ARCH_TRACEHOOK
cdd6c482 14 select HAVE_PERF_EVENTS
9b2a60c4 15 select HAVE_DEBUG_BUGVERBOSE
67a929e0 16 select HAVE_FAST_GUP if MMU
7563bbf8 17 select ARCH_HAVE_CUSTOM_GPIO_H
df013ffb 18 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
957e3fac 19 select ARCH_HAS_GCOV_PROFILE_ALL
72f0c137 20 select PERF_USE_VMALLOC
b69ec42b 21 select HAVE_DEBUG_KMEMLEAK
df8ce259 22 select HAVE_KERNEL_GZIP
fff7fb0b 23 select CPU_NO_EFFICIENT_FFS
07e88e1b
PM
24 select HAVE_KERNEL_BZIP2
25 select HAVE_KERNEL_LZMA
50cfa79d 26 select HAVE_KERNEL_XZ
c7b16efb 27 select HAVE_KERNEL_LZO
af1839eb 28 select HAVE_UID16
c1d7e01d 29 select ARCH_WANT_IPC_PARSE_VERSION
a74f7e04 30 select HAVE_SYSCALL_TRACEPOINTS
eaaaeef3 31 select HAVE_REGS_AND_STACK_ACCESS_API
2ed86b16 32 select MAY_HAVE_SPARSE_IRQ
ed170924 33 select IRQ_FORCED_THREADING
6eac1af0 34 select RTC_LIB
f01789c6 35 select GENERIC_ATOMIC64
3d44ae40 36 select GENERIC_IRQ_SHOW
ea0588cb 37 select GENERIC_SMP_IDLE_THREAD
dc775dd8 38 select GENERIC_IDLE_POLL_SETUP
8cf200d8
AMG
39 select GENERIC_CLOCKEVENTS
40 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
eb01d42a 41 select GENERIC_PCI_IOMAP if PCI
b46ed370 42 select GENERIC_SCHED_CLOCK
0e100e11 43 select GENERIC_STRNCPY_FROM_USER
cba8df4b 44 select GENERIC_STRNLEN_USER
786d35d4
DH
45 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
46 select MODULES_USE_ELF_RELA
eb01d42a 47 select NO_GENERIC_PCI_IOPORT_MAP if PCI
881e252d 48 select OLD_SIGSUSPEND
0679a858 49 select OLD_SIGACTION
eb01d42a 50 select PCI_DOMAINS if PCI
7a017721 51 select HAVE_ARCH_AUDITSYSCALL
72cc564f 52 select HAVE_FUTEX_CMPXCHG if FUTEX
42a0bb3f 53 select HAVE_NMI
86596f0a 54 select NEED_SG_DMA_LENGTH
4eb0716e 55 select ARCH_HAS_GIGANTIC_PAGE
942fa985 56 select ARCH_32BIT_OFF_T
3c9b9acc 57 select GUP_GET_PTE_LOW_HIGH if X2TLB
d39f5450
CS
58 select HAVE_KPROBES
59 select HAVE_KRETPROBES
6d63e73d 60 select HAVE_IOREMAP_PROT if MMU && !X2TLB
694f94f2 61 select HAVE_FUNCTION_TRACER
fad57feb
MF
62 select HAVE_FTRACE_MCOUNT_RECORD
63 select HAVE_DYNAMIC_FTRACE
c1d7e01d 64 select ARCH_WANT_IPC_PARSE_VERSION
327933f5 65 select HAVE_FUNCTION_GRAPH_TRACER
ab6e570b 66 select HAVE_ARCH_KGDB
6fbfe8d7 67 select HAVE_HW_BREAKPOINT
0102752e 68 select HAVE_MIXED_BREAKPOINTS_REGS
e583d6b3 69 select PERF_EVENTS
8dafc346 70 select ARCH_HIBERNATION_POSSIBLE if MMU
57b81330 71 select SPARSE_IRQ
d148eac0 72 select HAVE_STACKPROTECTOR
37744fee
AB
73 help
74 The SuperH is a RISC processor targeted for use in embedded systems
75 and consumer electronics; it was also used in the Sega Dreamcast
76 gaming console. The SuperH port has a home page at
77 <http://www.linux-sh.org/>.
39d28a2d 78
fa691511
PM
79config GENERIC_BUG
80 def_bool y
37744fee 81 depends on BUG
3767f3f1 82
e2268c71 83config GENERIC_HWEIGHT
d7ef4fb3 84 def_bool y
e2268c71 85
1da177e4 86config GENERIC_CALIBRATE_DELAY
cf204fa7 87 bool
1da177e4 88
bdcab87b
PM
89config GENERIC_LOCKBREAK
90 def_bool y
7be60ccb 91 depends on SMP && PREEMPTION
bdcab87b 92
af998a9a
MD
93config ARCH_SUSPEND_POSSIBLE
94 def_bool n
95
96config ARCH_HIBERNATION_POSSIBLE
97 def_bool n
357d5946 98
0a9b0db1
PM
99config SYS_SUPPORTS_APM_EMULATION
100 bool
af998a9a 101 select ARCH_SUSPEND_POSSIBLE
357d5946 102
ffb4a73d
PM
103config SYS_SUPPORTS_HUGETLBFS
104 bool
105
357d5946
PM
106config SYS_SUPPORTS_SMP
107 bool
108
109config SYS_SUPPORTS_NUMA
110 bool
111
afbfb52e 112config STACKTRACE_SUPPORT
d7ef4fb3 113 def_bool y
afbfb52e
PM
114
115config LOCKDEP_SUPPORT
d7ef4fb3 116 def_bool y
afbfb52e 117
f0d1b0b3 118config ARCH_HAS_ILOG2_U32
d7ef4fb3 119 def_bool n
f0d1b0b3
DH
120
121config ARCH_HAS_ILOG2_U64
d7ef4fb3 122 def_bool n
f0d1b0b3 123
ce816fa8 124config NO_IOPORT_MAP
37b7a978 125 def_bool !PCI
c30b9c43
PM
126 depends on !SH_CAYMAN && !SH_SH4202_MICRODEV && !SH_SHMIN && \
127 !SH_HP6XX && !SH_SOLUTION_ENGINE
86e4dd5a 128
e7cc9a73
MD
129config IO_TRAPPED
130 bool
131
b7e68d68
PM
132config SWAP_IO_SPACE
133 bool
134
01be5d63
PM
135config DMA_COHERENT
136 bool
137
138config DMA_NONCOHERENT
139 def_bool !DMA_COHERENT
6fa1d28e 140 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
01be5d63 141
69543d63
KS
142config PGTABLE_LEVELS
143 default 3 if X2TLB
144 default 2
145
1da177e4
LT
146menu "System type"
147
b5f42db0
PM
148#
149# Processor families
150#
151config CPU_SH2
152 bool
049d2804 153 select SH_INTC
b5f42db0
PM
154
155config CPU_SH2A
156 bool
157 select CPU_SH2
e2fcf74f 158 select UNCACHED_MAPPING
b5f42db0 159
5a846aba
RF
160config CPU_J2
161 bool
162 select CPU_SH2
163 select OF
164 select OF_EARLY_FLATTREE
165
b5f42db0
PM
166config CPU_SH3
167 bool
168 select CPU_HAS_INTEVT
169 select CPU_HAS_SR_RB
049d2804 170 select SH_INTC
fbfa8934 171 select SYS_SUPPORTS_SH_TMU
b5f42db0
PM
172
173config CPU_SH4
174 bool
175 select CPU_HAS_INTEVT
176 select CPU_HAS_SR_RB
b5f42db0 177 select CPU_HAS_FPU if !CPU_SH4AL_DSP
049d2804 178 select SH_INTC
fbfa8934 179 select SYS_SUPPORTS_SH_TMU
ffb4a73d 180 select SYS_SUPPORTS_HUGETLBFS if MMU
b5f42db0
PM
181
182config CPU_SH4A
183 bool
184 select CPU_SH4
185
186config CPU_SH4AL_DSP
187 bool
188 select CPU_SH4A
189 select CPU_HAS_DSP
190
191config CPU_SHX2
192 bool
193
194config CPU_SHX3
195 bool
01be5d63 196 select DMA_COHERENT
4b478ee2
PM
197 select SYS_SUPPORTS_SMP
198 select SYS_SUPPORTS_NUMA
b5f42db0 199
dc65a977
PM
200config ARCH_SHMOBILE
201 bool
77594912 202 select ARCH_SUSPEND_POSSIBLE
464ed18e 203 select PM
dc65a977 204
86c8c047
MF
205config CPU_HAS_PMU
206 depends on CPU_SH4 || CPU_SH4A
207 default y
208 bool
209
b5f42db0
PM
210choice
211 prompt "Processor sub-type selection"
212
213#
214# Processor subtypes
215#
216
217# SH-2 Processor Support
218
219config CPU_SUBTYPE_SH7619
220 bool "Support SH7619 processor"
221 select CPU_SH2
fbfa8934 222 select SYS_SUPPORTS_SH_CMT
b5f42db0 223
5a846aba
RF
224config CPU_SUBTYPE_J2
225 bool "Support J2 processor"
226 select CPU_J2
b4214e41
RF
227 select SYS_SUPPORTS_SMP
228 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
5a846aba 229
b5f42db0
PM
230# SH-2A Processor Support
231
2825999e
PG
232config CPU_SUBTYPE_SH7201
233 bool "Support SH7201 processor"
234 select CPU_SH2A
235 select CPU_HAS_FPU
fbfa8934 236 select SYS_SUPPORTS_SH_MTU2
2825999e 237
6d01f510
PM
238config CPU_SUBTYPE_SH7203
239 bool "Support SH7203 processor"
240 select CPU_SH2A
74d99a5e 241 select CPU_HAS_FPU
fbfa8934
MD
242 select SYS_SUPPORTS_SH_CMT
243 select SYS_SUPPORTS_SH_MTU2
b768ecbc 244 select PINCTRL
6d01f510 245
b5f42db0
PM
246config CPU_SUBTYPE_SH7206
247 bool "Support SH7206 processor"
248 select CPU_SH2A
fbfa8934
MD
249 select SYS_SUPPORTS_SH_CMT
250 select SYS_SUPPORTS_SH_MTU2
b5f42db0 251
a8f67f4b
PM
252config CPU_SUBTYPE_SH7263
253 bool "Support SH7263 processor"
254 select CPU_SH2A
74d99a5e 255 select CPU_HAS_FPU
fbfa8934
MD
256 select SYS_SUPPORTS_SH_CMT
257 select SYS_SUPPORTS_SH_MTU2
a8f67f4b 258
51ce3068
PE
259config CPU_SUBTYPE_SH7264
260 bool "Support SH7264 processor"
261 select CPU_SH2A
262 select CPU_HAS_FPU
fbfa8934
MD
263 select SYS_SUPPORTS_SH_CMT
264 select SYS_SUPPORTS_SH_MTU2
5946e7bb 265 select PINCTRL
51ce3068 266
0b25b7c8
PE
267config CPU_SUBTYPE_SH7269
268 bool "Support SH7269 processor"
269 select CPU_SH2A
270 select CPU_HAS_FPU
fbfa8934
MD
271 select SYS_SUPPORTS_SH_CMT
272 select SYS_SUPPORTS_SH_MTU2
fb872fcc 273 select PINCTRL
0b25b7c8 274
2ad69908
PM
275config CPU_SUBTYPE_MXG
276 bool "Support MX-G processor"
277 select CPU_SH2A
fbfa8934 278 select SYS_SUPPORTS_SH_MTU2
2ad69908
PM
279 help
280 Select MX-G if running on an R8A03022BG part.
281
b5f42db0
PM
282# SH-3 Processor Support
283
284config CPU_SUBTYPE_SH7705
285 bool "Support SH7705 processor"
286 select CPU_SH3
287
288config CPU_SUBTYPE_SH7706
289 bool "Support SH7706 processor"
290 select CPU_SH3
291 help
292 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
293
294config CPU_SUBTYPE_SH7707
295 bool "Support SH7707 processor"
296 select CPU_SH3
297 help
298 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
299
300config CPU_SUBTYPE_SH7708
301 bool "Support SH7708 processor"
302 select CPU_SH3
303 help
304 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
305 if you have a 100 Mhz SH-3 HD6417708R CPU.
306
307config CPU_SUBTYPE_SH7709
308 bool "Support SH7709 processor"
309 select CPU_SH3
310 help
311 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
312
313config CPU_SUBTYPE_SH7710
314 bool "Support SH7710 processor"
315 select CPU_SH3
316 select CPU_HAS_DSP
317 help
318 Select SH7710 if you have a SH3-DSP SH7710 CPU.
319
320config CPU_SUBTYPE_SH7712
321 bool "Support SH7712 processor"
322 select CPU_SH3
323 select CPU_HAS_DSP
324 help
325 Select SH7712 if you have a SH3-DSP SH7712 CPU.
326
327config CPU_SUBTYPE_SH7720
328 bool "Support SH7720 processor"
329 select CPU_SH3
330 select CPU_HAS_DSP
fbfa8934 331 select SYS_SUPPORTS_SH_CMT
7b61ca5d 332 select USB_OHCI_SH if USB_OHCI_HCD
85db6bff 333 select PINCTRL
b5f42db0
PM
334 help
335 Select SH7720 if you have a SH3-DSP SH7720 CPU.
336
31a49c4b
YS
337config CPU_SUBTYPE_SH7721
338 bool "Support SH7721 processor"
339 select CPU_SH3
340 select CPU_HAS_DSP
fbfa8934 341 select SYS_SUPPORTS_SH_CMT
7b61ca5d 342 select USB_OHCI_SH if USB_OHCI_HCD
31a49c4b
YS
343 help
344 Select SH7721 if you have a SH3-DSP SH7721 CPU.
345
b5f42db0
PM
346# SH-4 Processor Support
347
348config CPU_SUBTYPE_SH7750
349 bool "Support SH7750 processor"
350 select CPU_SH4
351 help
352 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
353
354config CPU_SUBTYPE_SH7091
355 bool "Support SH7091 processor"
356 select CPU_SH4
357 help
358 Select SH7091 if you have an SH-4 based Sega device (such as
359 the Dreamcast, Naomi, and Naomi 2).
360
361config CPU_SUBTYPE_SH7750R
362 bool "Support SH7750R processor"
363 select CPU_SH4
364
365config CPU_SUBTYPE_SH7750S
366 bool "Support SH7750S processor"
367 select CPU_SH4
368
369config CPU_SUBTYPE_SH7751
370 bool "Support SH7751 processor"
371 select CPU_SH4
372 help
373 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
374 or if you have a HD6417751R CPU.
375
376config CPU_SUBTYPE_SH7751R
377 bool "Support SH7751R processor"
378 select CPU_SH4
379
380config CPU_SUBTYPE_SH7760
381 bool "Support SH7760 processor"
382 select CPU_SH4
383
384config CPU_SUBTYPE_SH4_202
385 bool "Support SH4-202 processor"
386 select CPU_SH4
387
388# SH-4A Processor Support
389
178dd0cd
PM
390config CPU_SUBTYPE_SH7723
391 bool "Support SH7723 processor"
392 select CPU_SH4A
393 select CPU_SHX2
dc65a977 394 select ARCH_SHMOBILE
178dd0cd 395 select ARCH_SPARSEMEM_ENABLE
fbfa8934 396 select SYS_SUPPORTS_SH_CMT
16941a89 397 select PINCTRL
178dd0cd
PM
398 help
399 Select SH7723 if you have an SH-MobileR2 CPU.
400
0207a2ef
KM
401config CPU_SUBTYPE_SH7724
402 bool "Support SH7724 processor"
403 select CPU_SH4A
404 select CPU_SHX2
59fe700d 405 select ARCH_SHMOBILE
0207a2ef 406 select ARCH_SPARSEMEM_ENABLE
fbfa8934 407 select SYS_SUPPORTS_SH_CMT
18ebd228 408 select PINCTRL
0207a2ef
KM
409 help
410 Select SH7724 if you have an SH-MobileR2R CPU.
411
fea88a0c
NI
412config CPU_SUBTYPE_SH7734
413 bool "Support SH7734 processor"
414 select CPU_SH4A
415 select CPU_SHX2
2c172182 416 select PINCTRL
fea88a0c
NI
417 help
418 Select SH7734 if you have a SH4A SH7734 CPU.
419
c01f0f1a
YS
420config CPU_SUBTYPE_SH7757
421 bool "Support SH7757 processor"
422 select CPU_SH4A
423 select CPU_SHX2
eb61b772 424 select PINCTRL
c01f0f1a
YS
425 help
426 Select SH7757 if you have a SH4A SH7757 CPU.
427
7d740a06
YS
428config CPU_SUBTYPE_SH7763
429 bool "Support SH7763 processor"
430 select CPU_SH4A
7b61ca5d 431 select USB_OHCI_SH if USB_OHCI_HCD
7d740a06
YS
432 help
433 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
434
b5f42db0
PM
435config CPU_SUBTYPE_SH7770
436 bool "Support SH7770 processor"
437 select CPU_SH4A
438
439config CPU_SUBTYPE_SH7780
440 bool "Support SH7780 processor"
441 select CPU_SH4A
442
443config CPU_SUBTYPE_SH7785
444 bool "Support SH7785 processor"
445 select CPU_SH4A
446 select CPU_SHX2
55ba99eb
KM
447 select ARCH_SPARSEMEM_ENABLE
448 select SYS_SUPPORTS_NUMA
77bd27b2 449 select PINCTRL
55ba99eb
KM
450
451config CPU_SUBTYPE_SH7786
452 bool "Support SH7786 processor"
453 select CPU_SH4A
37042fbd 454 select CPU_SHX3
8263a67e 455 select CPU_HAS_PTEAEX
2eb2a436 456 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
7b61ca5d 457 select USB_OHCI_SH if USB_OHCI_HCD
7b61ca5d 458 select USB_EHCI_SH if USB_EHCI_HCD
c0fdbff9 459 select PINCTRL
b5f42db0
PM
460
461config CPU_SUBTYPE_SHX3
462 bool "Support SH-X3 processor"
463 select CPU_SH4A
464 select CPU_SHX3
5840263e 465 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
fdcfdfa1 466 select GPIOLIB
3e347f08 467 select PINCTRL
b5f42db0
PM
468
469# SH4AL-DSP Processor Support
470
471config CPU_SUBTYPE_SH7343
472 bool "Support SH7343 processor"
473 select CPU_SH4AL_DSP
dc65a977 474 select ARCH_SHMOBILE
fbfa8934 475 select SYS_SUPPORTS_SH_CMT
b5f42db0
PM
476
477config CPU_SUBTYPE_SH7722
478 bool "Support SH7722 processor"
479 select CPU_SH4AL_DSP
480 select CPU_SHX2
dc65a977 481 select ARCH_SHMOBILE
b5f42db0
PM
482 select ARCH_SPARSEMEM_ENABLE
483 select SYS_SUPPORTS_NUMA
fbfa8934 484 select SYS_SUPPORTS_SH_CMT
ef97c3c1 485 select PINCTRL
9109a30e
MD
486
487config CPU_SUBTYPE_SH7366
488 bool "Support SH7366 processor"
489 select CPU_SH4AL_DSP
490 select CPU_SHX2
dc65a977 491 select ARCH_SHMOBILE
9109a30e
MD
492 select ARCH_SPARSEMEM_ENABLE
493 select SYS_SUPPORTS_NUMA
fbfa8934 494 select SYS_SUPPORTS_SH_CMT
b5f42db0 495
3cc000b5
PM
496endchoice
497
f3d22298 498source "arch/sh/mm/Kconfig"
939a24a6 499
4690bdc7 500source "arch/sh/Kconfig.cpu"
f3d22298 501
939a24a6 502source "arch/sh/boards/Kconfig"
32351a28 503
32351a28
PM
504menu "Timer and clock configuration"
505
cad82448
PM
506config SH_PCLK_FREQ
507 int "Peripheral clock frequency (in Hz)"
8152a74b 508 depends on SH_CLK_CPG_LEGACY
9d4436a6 509 default "31250000" if CPU_SUBTYPE_SH7619
8152a74b
PM
510 default "33333333" if CPU_SUBTYPE_SH7770 || \
511 CPU_SUBTYPE_SH7760 || \
512 CPU_SUBTYPE_SH7705 || \
513 CPU_SUBTYPE_SH7203 || \
514 CPU_SUBTYPE_SH7206 || \
515 CPU_SUBTYPE_SH7263 || \
43a1839c 516 CPU_SUBTYPE_MXG
05627486 517 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
cad82448 518 default "66000000" if CPU_SUBTYPE_SH4_202
05627486 519 default "50000000"
1da177e4 520 help
cad82448
PM
521 This option is used to specify the peripheral clock frequency.
522 This is necessary for determining the reference clock value on
523 platforms lacking an RTC.
1da177e4 524
36aa1e32
PM
525config SH_CLK_CPG
526 def_bool y
527
253b0887 528config SH_CLK_CPG_LEGACY
36aa1e32 529 depends on SH_CLK_CPG
43a1839c 530 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
51ce3068 531 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
bcb86e0a
PM
532 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
533 !CPU_SUBTYPE_SH7269
253b0887 534
32351a28
PM
535endmenu
536
cad82448 537menu "CPU Frequency scaling"
cad82448 538source "drivers/cpufreq/Kconfig"
cad82448
PM
539endmenu
540
9f5e8eee
PM
541source "arch/sh/drivers/Kconfig"
542
cad82448 543endmenu
1da177e4 544
cad82448
PM
545menu "Kernel features"
546
8636a1f9 547source "kernel/Kconfig.hz"
91b91d01 548
cad82448
PM
549config KEXEC
550 bool "kexec system call (EXPERIMENTAL)"
37744fee 551 depends on MMU
2965faa5 552 select KEXEC_CORE
1da177e4 553 help
cad82448
PM
554 kexec is a system call that implements the ability to shutdown your
555 current kernel, and to start another kernel. It is like a reboot
1f1332f7 556 but it is independent of the system firmware. And like a reboot
cad82448
PM
557 you can start any kernel with it, not just Linux.
558
1f1332f7 559 The name comes from the similarity to the exec system call.
cad82448
PM
560
561 It is an ongoing process to be certain the hardware in a machine
562 is properly shutdown, so do not be surprised if this code does not
bf220695
GU
563 initially work for you. As of this writing the exact hardware
564 interface is strongly in flux, so no good recommendation can be
565 made.
cad82448 566
4d5ade5b
PM
567config CRASH_DUMP
568 bool "kernel crash dumps (EXPERIMENTAL)"
37744fee 569 depends on BROKEN_ON_SMP
4d5ade5b
PM
570 help
571 Generate crash dump after being started by kexec.
572 This should be normally only set in special crash dump kernels
573 which are loaded in the main kernel with kexec-tools into
574 a specially reserved region and then later executed after
575 a crash by kdump/kexec. The crash dump kernel must be compiled
576 to a memory address not used by the main kernel using
e66ac3f2 577 PHYSICAL_START.
4d5ade5b 578
330d4810 579 For more details see Documentation/admin-guide/kdump/kdump.rst
4d5ade5b 580
b7cf6ddc
MD
581config KEXEC_JUMP
582 bool "kexec jump (EXPERIMENTAL)"
37744fee 583 depends on KEXEC && HIBERNATION
b7cf6ddc
MD
584 help
585 Jump between original kernel and kexeced kernel and invoke
586 code via KEXEC
587
e66ac3f2
SH
588config PHYSICAL_START
589 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
590 default MEMORY_START
a7f7f624 591 help
e66ac3f2
SH
592 This gives the physical address where the kernel is loaded
593 and is ordinarily the same as MEMORY_START.
594
595 Different values are primarily used in the case of kexec on panic
596 where the fail safe kernel needs to run at a different address
597 than the panic-ed kernel.
598
c4637d47
PM
599config SECCOMP
600 bool "Enable seccomp to safely compute untrusted bytecode"
601 depends on PROC_FS
c4637d47
PM
602 help
603 This kernel feature is useful for number crunching applications
604 that may need to compute untrusted bytecode during their
605 execution. By using pipes or other transports made available to
606 the process as file descriptors supporting the read/write
607 syscalls, it's possible to isolate those applications in
608 their own address space using seccomp. Once seccomp is
609 enabled via prctl, it cannot be disabled and the task is only
610 allowed to execute a few safe syscalls defined by each seccomp
611 mode.
612
613 If unsure, say N.
614
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615config SMP
616 bool "Symmetric multi-processing support"
357d5946 617 depends on SYS_SUPPORTS_SMP
a7f7f624 618 help
1da177e4 619 This enables support for systems with more than one CPU. If you have
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620 a system with only one CPU, say N. If you have a system with more
621 than one CPU, say Y.
1da177e4 622
4a474157 623 If you say N here, the kernel will run on uni- and multiprocessor
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624 machines, but will use only one CPU of a multiprocessor machine. If
625 you say Y here, the kernel will run on many, but not all,
4a474157 626 uniprocessor machines. On a uniprocessor machine, the kernel
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627 will run faster if you say N here.
628
629 People using multiprocessor machines who say Y here should also say
630 Y to "Enhanced Real Time Clock Support", below.
631
4f4cfa6c 632 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
03502faa 633 available at <http://www.tldp.org/docs.html#howto>.
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634
635 If you don't know what to do here, say N.
636
637config NR_CPUS
638 int "Maximum number of CPUs (2-32)"
639 range 2 32
640 depends on SMP
2eb2a436 641 default "4" if CPU_SUBTYPE_SHX3
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642 default "2"
643 help
644 This allows you to specify the maximum number of CPUs which this
645 kernel will support. The maximum supported value is 32 and the
646 minimum value which makes sense is 2.
647
648 This is purely to save memory - each supported CPU adds
649 approximately eight kilobytes to the kernel image.
650
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651config HOTPLUG_CPU
652 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
40b31360 653 depends on SMP
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654 help
655 Say Y here to experiment with turning CPUs off and on. CPUs
656 can be controlled through /sys/devices/system/cpu.
657
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658config GUSA
659 def_bool y
37744fee 660 depends on !SMP
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661 help
662 This enables support for gUSA (general UserSpace Atomicity).
663 This is the default implementation for both UP and non-ll/sc
664 CPUs, and is used by the libc, amongst others.
665
666 For additional information, design information can be found
667 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
668
669 This should only be disabled for special cases where alternate
670 atomicity implementations exist.
671
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672config GUSA_RB
673 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
674 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
675 help
676 Enabling this option will allow the kernel to implement some
692105b8 677 atomic operations using a software implementation of load-locked/
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678 store-conditional (LLSC). On machines which do not have hardware
679 LLSC, this should be more efficient than the other alternative of
692105b8 680 disabling interrupts around the atomic sequence.
1efe4ce3 681
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682config HW_PERF_EVENTS
683 bool "Enable hardware performance counter support for perf events"
684 depends on PERF_EVENTS && CPU_HAS_PMU
685 default y
686 help
687 Enable hardware performance counter support for perf events. If
688 disabled, perf events will use software events only.
689
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690source "drivers/sh/Kconfig"
691
cad82448 692endmenu
1da177e4 693
cad82448 694menu "Boot options"
1da177e4 695
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696config USE_BUILTIN_DTB
697 bool "Use builtin DTB"
698 default n
699 depends on SH_DEVICE_TREE
700 help
701 Link a device tree blob for particular hardware into the kernel,
702 suppressing use of the DTB pointer provided by the bootloader.
703 This option should only be used with legacy bootloaders that are
704 not capable of providing a DTB to the kernel, or for experimental
705 hardware without stable device tree bindings.
706
707config BUILTIN_DTB_SOURCE
708 string "Source file for builtin DTB"
709 default ""
710 depends on USE_BUILTIN_DTB
711 help
712 Base name (without suffix, relative to arch/sh/boot/dts) for the
713 a DTS file that will be used to produce the DTB linked into the
714 kernel.
715
cad82448 716config ZERO_PAGE_OFFSET
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717 hex
718 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
719 SH_7751_SOLUTION_ENGINE
720 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
7a847f81 721 default "0x00002000" if PAGE_SIZE_8KB
cad82448 722 default "0x00001000"
1da177e4 723 help
cad82448 724 This sets the default offset of zero page.
1da177e4 725
cad82448 726config BOOT_LINK_OFFSET
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727 hex
728 default "0x00210000" if SH_SHMIN
a2e76c80 729 default "0x00400000" if SH_CAYMAN
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730 default "0x00810000" if SH_7780_SOLUTION_ENGINE
731 default "0x009e0000" if SH_TITAN
732 default "0x01800000" if SH_SDK7780
733 default "0x02000000" if SH_EDOSK7760
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734 default "0x00800000"
735 help
736 This option allows you to set the link address offset of the zImage.
737 This can be useful if you are on a board which has a small amount of
738 memory.
1da177e4 739
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740config ENTRY_OFFSET
741 hex
742 default "0x00001000" if PAGE_SIZE_4KB
743 default "0x00002000" if PAGE_SIZE_8KB
744 default "0x00004000" if PAGE_SIZE_16KB
745 default "0x00010000" if PAGE_SIZE_64KB
746 default "0x00000000"
747
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748config ROMIMAGE_MMCIF
749 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
0d57af1e 750 depends on CPU_SUBTYPE_SH7724
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751 help
752 Say Y here to include experimental MMCIF loading code in
753 romImage. With this enabled it is possible to write the romImage
754 kernel image to an MMC card and boot the kernel straight from
755 the reset vector. At reset the processor Mask ROM will load the
756 first part of the romImage which in turn loads the rest the kernel
757 image to RAM using the MMCIF hardware block.
758
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759choice
760 prompt "Kernel command line"
761 optional
762 default CMDLINE_OVERWRITE
763 help
764 Setting this option allows the kernel command line arguments
765 to be set.
766
767config CMDLINE_OVERWRITE
768 bool "Overwrite bootloader kernel arguments"
769 help
770 Given string will overwrite any arguments passed in by
771 a bootloader.
772
773config CMDLINE_EXTEND
774 bool "Extend bootloader kernel arguments"
775 help
776 Given string will be concatenated with arguments passed in
777 by a bootloader.
778
779endchoice
1da177e4 780
cad82448 781config CMDLINE
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782 string "Kernel command line arguments string"
783 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
cad82448 784 default "console=ttySC1,115200"
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785
786endmenu
787
cad82448 788menu "Bus options"
1da177e4 789
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790config SUPERHYWAY
791 tristate "SuperHyway Bus support"
792 depends on CPU_SUBTYPE_SH4_202
1da177e4 793
17be2d2b 794config MAPLE
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795 bool "Maple Bus support"
796 depends on SH_DREAMCAST
797 help
798 The Maple Bus is SEGA's serial communication bus for peripherals
799 on the Dreamcast. Without this bus support you won't be able to
800 get your Dreamcast keyboard etc to work, so most users
801 probably want to say 'Y' here, unless you are only using the
802 Dreamcast with a serial line terminal or a remote network
803 connection.
17be2d2b 804
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805endmenu
806
3aa770e7 807menu "Power management options (EXPERIMENTAL)"
f4cb5700 808
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809source "kernel/power/Kconfig"
810
811source "drivers/cpuidle/Kconfig"
3aa770e7 812
3aa770e7 813endmenu