sh: Fix compile error by operands(mov.l) in sh3/entry.S
[linux-block.git] / arch / sh / Kconfig
CommitLineData
1da177e4
LT
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/SuperH Kernel Configuration"
7
8config SUPERH
ea0e1a9a 9 def_bool y
7a440c95 10 select EMBEDDED
9483a578 11 select HAVE_CLK
ec7748b5 12 select HAVE_IDE
42d4b839 13 select HAVE_OPROFILE
9de90ac2 14 select HAVE_GENERIC_DMA_COHERENT
21944781 15 select HAVE_IOREMAP_PROT if MMU
d7b01f78 16 select HAVE_ARCH_TRACEHOOK
1da177e4
LT
17 help
18 The SuperH is a RISC processor targeted for use in embedded systems
19 and consumer electronics; it was also used in the Sega Dreamcast
20 gaming console. The SuperH port has a home page at
21 <http://www.linux-sh.org/>.
22
39d28a2d 23config SUPERH32
ea0e1a9a 24 def_bool !SUPERH64
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CS
25 select HAVE_KPROBES
26 select HAVE_KRETPROBES
694f94f2 27 select HAVE_FUNCTION_TRACER
fad57feb
MF
28 select HAVE_FTRACE_MCOUNT_RECORD
29 select HAVE_DYNAMIC_FTRACE
ab6e570b 30 select HAVE_ARCH_KGDB
ea0e1a9a
PM
31
32config SUPERH64
33 def_bool y if CPU_SH5
39d28a2d 34
f42b7e3d
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35config ARCH_DEFCONFIG
36 string
37 default "arch/sh/configs/shx3_defconfig" if SUPERH32
38 default "arch/sh/configs/cayman_defconfig" if SUPERH64
39
1da177e4 40config RWSEM_GENERIC_SPINLOCK
d7ef4fb3 41 def_bool y
1da177e4
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42
43config RWSEM_XCHGADD_ALGORITHM
44 bool
45
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46config GENERIC_BUG
47 def_bool y
a82d53ec 48 depends on BUG && SUPERH32
fa691511 49
e2268c71 50config GENERIC_FIND_NEXT_BIT
d7ef4fb3 51 def_bool y
e2268c71
AM
52
53config GENERIC_HWEIGHT
d7ef4fb3 54 def_bool y
e2268c71 55
1da177e4 56config GENERIC_HARDIRQS
d7ef4fb3 57 def_bool y
1da177e4 58
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59config GENERIC_HARDIRQS_NO__DO_IRQ
60 def_bool y
61
1da177e4 62config GENERIC_IRQ_PROBE
d7ef4fb3 63 def_bool y
1da177e4 64
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65config GENERIC_GPIO
66 def_bool n
67
1da177e4 68config GENERIC_CALIBRATE_DELAY
cf204fa7 69 bool
1da177e4 70
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71config GENERIC_IOMAP
72 bool
73
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74config GENERIC_TIME
75 def_bool n
76
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77config GENERIC_CLOCKEVENTS
78 def_bool n
79
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80config GENERIC_CLOCKEVENTS_BROADCAST
81 bool
82
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83config GENERIC_LOCKBREAK
84 def_bool y
85 depends on SMP && PREEMPT
86
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87config SYS_SUPPORTS_PM
88 bool
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89 depends on !SMP
90
91config ARCH_SUSPEND_POSSIBLE
92 def_bool n
93
94config ARCH_HIBERNATION_POSSIBLE
95 def_bool n
357d5946 96
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97config SYS_SUPPORTS_APM_EMULATION
98 bool
af998a9a 99 select ARCH_SUSPEND_POSSIBLE
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100
101config SYS_SUPPORTS_SMP
102 bool
103
104config SYS_SUPPORTS_NUMA
105 bool
106
107config SYS_SUPPORTS_PCI
108 bool
0a9b0db1 109
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110config SYS_SUPPORTS_CMT
111 bool
112
afbfb52e 113config STACKTRACE_SUPPORT
d7ef4fb3 114 def_bool y
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115
116config LOCKDEP_SUPPORT
d7ef4fb3 117 def_bool y
afbfb52e 118
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119config HAVE_LATENCYTOP_SUPPORT
120 def_bool y
121 depends on !SMP
122
f0d1b0b3 123config ARCH_HAS_ILOG2_U32
d7ef4fb3 124 def_bool n
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125
126config ARCH_HAS_ILOG2_U64
d7ef4fb3 127 def_bool n
f0d1b0b3 128
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129config ARCH_NO_VIRT_TO_BUS
130 def_bool y
131
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132config IO_TRAPPED
133 bool
134
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135source "init/Kconfig"
136
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137source "kernel/Kconfig.freezer"
138
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139menu "System type"
140
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141#
142# Processor families
143#
144config CPU_SH2
145 bool
146
147config CPU_SH2A
148 bool
149 select CPU_SH2
150
151config CPU_SH3
152 bool
153 select CPU_HAS_INTEVT
154 select CPU_HAS_SR_RB
155
156config CPU_SH4
157 bool
158 select CPU_HAS_INTEVT
159 select CPU_HAS_SR_RB
160 select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
161 select CPU_HAS_FPU if !CPU_SH4AL_DSP
162
163config CPU_SH4A
164 bool
165 select CPU_SH4
166
167config CPU_SH4AL_DSP
168 bool
169 select CPU_SH4A
170 select CPU_HAS_DSP
171
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172config CPU_SH5
173 bool
174 select CPU_HAS_FPU
175
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176config CPU_SHX2
177 bool
178
179config CPU_SHX3
180 bool
181
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182config ARCH_SHMOBILE
183 bool
184
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185choice
186 prompt "Processor sub-type selection"
187
188#
189# Processor subtypes
190#
191
192# SH-2 Processor Support
193
194config CPU_SUBTYPE_SH7619
195 bool "Support SH7619 processor"
196 select CPU_SH2
f5ad881b 197 select SYS_SUPPORTS_CMT
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198
199# SH-2A Processor Support
200
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201config CPU_SUBTYPE_SH7201
202 bool "Support SH7201 processor"
203 select CPU_SH2A
204 select CPU_HAS_FPU
205
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206config CPU_SUBTYPE_SH7203
207 bool "Support SH7203 processor"
208 select CPU_SH2A
74d99a5e 209 select CPU_HAS_FPU
f5ad881b 210 select SYS_SUPPORTS_CMT
6d01f510 211
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212config CPU_SUBTYPE_SH7206
213 bool "Support SH7206 processor"
214 select CPU_SH2A
f5ad881b 215 select SYS_SUPPORTS_CMT
b5f42db0 216
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217config CPU_SUBTYPE_SH7263
218 bool "Support SH7263 processor"
219 select CPU_SH2A
74d99a5e 220 select CPU_HAS_FPU
f5ad881b 221 select SYS_SUPPORTS_CMT
a8f67f4b 222
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223config CPU_SUBTYPE_MXG
224 bool "Support MX-G processor"
225 select CPU_SH2A
226 help
227 Select MX-G if running on an R8A03022BG part.
228
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229# SH-3 Processor Support
230
231config CPU_SUBTYPE_SH7705
232 bool "Support SH7705 processor"
233 select CPU_SH3
234
235config CPU_SUBTYPE_SH7706
236 bool "Support SH7706 processor"
237 select CPU_SH3
238 help
239 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
240
241config CPU_SUBTYPE_SH7707
242 bool "Support SH7707 processor"
243 select CPU_SH3
244 help
245 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
246
247config CPU_SUBTYPE_SH7708
248 bool "Support SH7708 processor"
249 select CPU_SH3
250 help
251 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
252 if you have a 100 Mhz SH-3 HD6417708R CPU.
253
254config CPU_SUBTYPE_SH7709
255 bool "Support SH7709 processor"
256 select CPU_SH3
257 help
258 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
259
260config CPU_SUBTYPE_SH7710
261 bool "Support SH7710 processor"
262 select CPU_SH3
263 select CPU_HAS_DSP
264 help
265 Select SH7710 if you have a SH3-DSP SH7710 CPU.
266
267config CPU_SUBTYPE_SH7712
268 bool "Support SH7712 processor"
269 select CPU_SH3
270 select CPU_HAS_DSP
271 help
272 Select SH7712 if you have a SH3-DSP SH7712 CPU.
273
274config CPU_SUBTYPE_SH7720
275 bool "Support SH7720 processor"
276 select CPU_SH3
277 select CPU_HAS_DSP
278 help
279 Select SH7720 if you have a SH3-DSP SH7720 CPU.
280
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281config CPU_SUBTYPE_SH7721
282 bool "Support SH7721 processor"
283 select CPU_SH3
284 select CPU_HAS_DSP
285 help
286 Select SH7721 if you have a SH3-DSP SH7721 CPU.
287
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288# SH-4 Processor Support
289
290config CPU_SUBTYPE_SH7750
291 bool "Support SH7750 processor"
292 select CPU_SH4
293 help
294 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
295
296config CPU_SUBTYPE_SH7091
297 bool "Support SH7091 processor"
298 select CPU_SH4
299 help
300 Select SH7091 if you have an SH-4 based Sega device (such as
301 the Dreamcast, Naomi, and Naomi 2).
302
303config CPU_SUBTYPE_SH7750R
304 bool "Support SH7750R processor"
305 select CPU_SH4
306
307config CPU_SUBTYPE_SH7750S
308 bool "Support SH7750S processor"
309 select CPU_SH4
310
311config CPU_SUBTYPE_SH7751
312 bool "Support SH7751 processor"
313 select CPU_SH4
314 help
315 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
316 or if you have a HD6417751R CPU.
317
318config CPU_SUBTYPE_SH7751R
319 bool "Support SH7751R processor"
320 select CPU_SH4
321
322config CPU_SUBTYPE_SH7760
323 bool "Support SH7760 processor"
324 select CPU_SH4
325
326config CPU_SUBTYPE_SH4_202
327 bool "Support SH4-202 processor"
328 select CPU_SH4
329
330# SH-4A Processor Support
331
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332config CPU_SUBTYPE_SH7723
333 bool "Support SH7723 processor"
334 select CPU_SH4A
335 select CPU_SHX2
dc65a977 336 select ARCH_SHMOBILE
178dd0cd 337 select ARCH_SPARSEMEM_ENABLE
f5ad881b 338 select SYS_SUPPORTS_CMT
178dd0cd
PM
339 help
340 Select SH7723 if you have an SH-MobileR2 CPU.
341
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YS
342config CPU_SUBTYPE_SH7763
343 bool "Support SH7763 processor"
344 select CPU_SH4A
345 help
346 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
347
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348config CPU_SUBTYPE_SH7770
349 bool "Support SH7770 processor"
350 select CPU_SH4A
351
352config CPU_SUBTYPE_SH7780
353 bool "Support SH7780 processor"
354 select CPU_SH4A
355
356config CPU_SUBTYPE_SH7785
357 bool "Support SH7785 processor"
358 select CPU_SH4A
359 select CPU_SHX2
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360 select ARCH_SPARSEMEM_ENABLE
361 select SYS_SUPPORTS_NUMA
362
363config CPU_SUBTYPE_SH7786
364 bool "Support SH7786 processor"
365 select CPU_SH4A
37042fbd 366 select CPU_SHX3
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367 select ARCH_SPARSEMEM_ENABLE
368 select SYS_SUPPORTS_NUMA
369
370config CPU_SUBTYPE_SHX3
371 bool "Support SH-X3 processor"
372 select CPU_SH4A
373 select CPU_SHX3
374 select ARCH_SPARSEMEM_ENABLE
375 select SYS_SUPPORTS_NUMA
376 select SYS_SUPPORTS_SMP
5840263e 377 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
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378
379# SH4AL-DSP Processor Support
380
381config CPU_SUBTYPE_SH7343
382 bool "Support SH7343 processor"
383 select CPU_SH4AL_DSP
dc65a977 384 select ARCH_SHMOBILE
f5ad881b 385 select SYS_SUPPORTS_CMT
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386
387config CPU_SUBTYPE_SH7722
388 bool "Support SH7722 processor"
389 select CPU_SH4AL_DSP
390 select CPU_SHX2
dc65a977 391 select ARCH_SHMOBILE
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392 select ARCH_SPARSEMEM_ENABLE
393 select SYS_SUPPORTS_NUMA
f5ad881b 394 select SYS_SUPPORTS_CMT
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395
396config CPU_SUBTYPE_SH7366
397 bool "Support SH7366 processor"
398 select CPU_SH4AL_DSP
399 select CPU_SHX2
dc65a977 400 select ARCH_SHMOBILE
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401 select ARCH_SPARSEMEM_ENABLE
402 select SYS_SUPPORTS_NUMA
f5ad881b 403 select SYS_SUPPORTS_CMT
b5f42db0 404
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405# SH-5 Processor Support
406
407config CPU_SUBTYPE_SH5_101
408 bool "Support SH5-101 processor"
409 select CPU_SH5
410
411config CPU_SUBTYPE_SH5_103
412 bool "Support SH5-103 processor"
8ef97dd7 413 select CPU_SH5
ea0e1a9a 414
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415endchoice
416
f3d22298 417source "arch/sh/mm/Kconfig"
939a24a6 418
4690bdc7 419source "arch/sh/Kconfig.cpu"
f3d22298 420
939a24a6 421source "arch/sh/boards/Kconfig"
32351a28 422
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423menu "Timer and clock configuration"
424
cad82448 425config SH_TMU
f5ad881b 426 bool "TMU timer support"
9d4436a6 427 depends on CPU_SH3 || CPU_SH4
f5ad881b 428 default y
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429 select GENERIC_TIME
430 select GENERIC_CLOCKEVENTS
1da177e4 431 help
cad82448 432 This enables the use of the TMU as the system timer.
1da177e4 433
9d4436a6 434config SH_CMT
f5ad881b 435 bool "CMT timer support"
508eb2ce 436 depends on SYS_SUPPORTS_CMT && CPU_SH2
f5ad881b 437 default y
9d4436a6
YS
438 help
439 This enables the use of the CMT as the system timer.
440
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441#
442# Support for the new-style CMT driver. This will replace SH_CMT
443# once its other dependencies are merged.
444#
445config SH_TIMER_CMT
446 bool "CMT clockevents driver"
447 depends on SYS_SUPPORTS_CMT && !SH_CMT
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448 select GENERIC_CLOCKEVENTS
449
9d4436a6 450config SH_MTU2
f5ad881b 451 bool "MTU2 timer support"
9d4436a6 452 depends on CPU_SH2A
f5ad881b 453 default y
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YS
454 help
455 This enables the use of the MTU2 as the system timer.
456
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457config SH_TIMER_IRQ
458 int
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459 default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \
460 CPU_SUBTYPE_SH7763
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461 default "86" if CPU_SUBTYPE_SH7619
462 default "140" if CPU_SUBTYPE_SH7206
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463 default "142" if CPU_SUBTYPE_SH7203 && SH_CMT
464 default "153" if CPU_SUBTYPE_SH7203 && SH_MTU2
2ad69908 465 default "238" if CPU_SUBTYPE_MXG
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466 default "16"
467
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468config SH_PCLK_FREQ
469 int "Peripheral clock frequency (in Hz)"
870e8a24 470 default "27000000" if CPU_SUBTYPE_SH7343
9d4436a6 471 default "31250000" if CPU_SUBTYPE_SH7619
05627486 472 default "32000000" if CPU_SUBTYPE_SH7722
178dd0cd 473 default "33333333" if CPU_SUBTYPE_SH7770 || CPU_SUBTYPE_SH7723 || \
9d4436a6 474 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
a8f67f4b 475 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
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476 CPU_SUBTYPE_SH7263 || CPU_SUBTYPE_MXG || \
477 CPU_SUBTYPE_SH7786
05627486 478 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
cad82448 479 default "66000000" if CPU_SUBTYPE_SH4_202
05627486 480 default "50000000"
1da177e4 481 help
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482 This option is used to specify the peripheral clock frequency.
483 This is necessary for determining the reference clock value on
484 platforms lacking an RTC.
1da177e4 485
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486config SH_CLK_MD
487 int "CPU Mode Pin Setting"
6d01f510 488 depends on CPU_SH2
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489 default 6 if CPU_SUBTYPE_SH7206
490 default 5 if CPU_SUBTYPE_SH7619
491 default 0
9d4436a6 492 help
11cbb70e 493 MD2 - MD0 pin setting.
9d4436a6 494
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495source "kernel/time/Kconfig"
496
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497endmenu
498
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499menu "CPU Frequency scaling"
500
501source "drivers/cpufreq/Kconfig"
1da177e4 502
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503config SH_CPU_FREQ
504 tristate "SuperH CPU Frequency driver"
cb5ec75b 505 depends on CPU_FREQ
cad82448 506 select CPU_FREQ_TABLE
1da177e4 507 help
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508 This adds the cpufreq driver for SuperH. Any CPU that supports
509 clock rate rounding through the clock framework can use this
510 driver. While it will make the kernel slightly larger, this is
511 harmless for CPUs that don't support rate rounding. The driver
512 will also generate a notice in the boot log before disabling
513 itself if the CPU in question is not capable of rate rounding.
1da177e4 514
cad82448 515 For details, take a look at <file:Documentation/cpu-freq>.
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516
517 If unsure, say N.
518
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519endmenu
520
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521source "arch/sh/drivers/Kconfig"
522
cad82448 523endmenu
1da177e4 524
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525menu "Kernel features"
526
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527source kernel/Kconfig.hz
528
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529config KEXEC
530 bool "kexec system call (EXPERIMENTAL)"
640f7487 531 depends on SUPERH32 && EXPERIMENTAL
1da177e4 532 help
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533 kexec is a system call that implements the ability to shutdown your
534 current kernel, and to start another kernel. It is like a reboot
1f1332f7 535 but it is independent of the system firmware. And like a reboot
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536 you can start any kernel with it, not just Linux.
537
1f1332f7 538 The name comes from the similarity to the exec system call.
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539
540 It is an ongoing process to be certain the hardware in a machine
541 is properly shutdown, so do not be surprised if this code does not
542 initially work for you. It may help to enable device hotplugging
543 support. As of this writing the exact hardware interface is
544 strongly in flux, so no good recommendation can be made.
545
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546config CRASH_DUMP
547 bool "kernel crash dumps (EXPERIMENTAL)"
640f7487 548 depends on SUPERH32 && EXPERIMENTAL
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549 help
550 Generate crash dump after being started by kexec.
551 This should be normally only set in special crash dump kernels
552 which are loaded in the main kernel with kexec-tools into
553 a specially reserved region and then later executed after
554 a crash by kdump/kexec. The crash dump kernel must be compiled
555 to a memory address not used by the main kernel using
556 MEMORY_START.
557
558 For more details see Documentation/kdump/kdump.txt
559
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560config SECCOMP
561 bool "Enable seccomp to safely compute untrusted bytecode"
562 depends on PROC_FS
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563 help
564 This kernel feature is useful for number crunching applications
565 that may need to compute untrusted bytecode during their
566 execution. By using pipes or other transports made available to
567 the process as file descriptors supporting the read/write
568 syscalls, it's possible to isolate those applications in
569 their own address space using seccomp. Once seccomp is
570 enabled via prctl, it cannot be disabled and the task is only
571 allowed to execute a few safe syscalls defined by each seccomp
572 mode.
573
574 If unsure, say N.
575
1da177e4
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576config SMP
577 bool "Symmetric multi-processing support"
357d5946 578 depends on SYS_SUPPORTS_SMP
490f5de5 579 select USE_GENERIC_SMP_HELPERS
1da177e4
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580 ---help---
581 This enables support for systems with more than one CPU. If you have
582 a system with only one CPU, like most personal computers, say N. If
583 you have a system with more than one CPU, say Y.
584
585 If you say N here, the kernel will run on single and multiprocessor
586 machines, but will use only one CPU of a multiprocessor machine. If
587 you say Y here, the kernel will run on many, but not all,
588 singleprocessor machines. On a singleprocessor machine, the kernel
589 will run faster if you say N here.
590
591 People using multiprocessor machines who say Y here should also say
592 Y to "Enhanced Real Time Clock Support", below.
593
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594 See also <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO
595 available at <http://www.tldp.org/docs.html#howto>.
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596
597 If you don't know what to do here, say N.
598
599config NR_CPUS
600 int "Maximum number of CPUs (2-32)"
601 range 2 32
602 depends on SMP
2b1bd1ac 603 default "4" if CPU_SHX3
1da177e4
LT
604 default "2"
605 help
606 This allows you to specify the maximum number of CPUs which this
607 kernel will support. The maximum supported value is 32 and the
608 minimum value which makes sense is 2.
609
610 This is purely to save memory - each supported CPU adds
611 approximately eight kilobytes to the kernel image.
612
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613source "kernel/Kconfig.preempt"
614
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615config GUSA
616 def_bool y
1efe4ce3 617 depends on !SMP && SUPERH32
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618 help
619 This enables support for gUSA (general UserSpace Atomicity).
620 This is the default implementation for both UP and non-ll/sc
621 CPUs, and is used by the libc, amongst others.
622
623 For additional information, design information can be found
624 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
625
626 This should only be disabled for special cases where alternate
627 atomicity implementations exist.
628
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629config GUSA_RB
630 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
631 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
632 help
633 Enabling this option will allow the kernel to implement some
634 atomic operations using a software implemention of load-locked/
635 store-conditional (LLSC). On machines which do not have hardware
636 LLSC, this should be more efficient than the other alternative of
637 disabling insterrupts around the atomic sequence.
638
cad82448 639endmenu
1da177e4 640
cad82448 641menu "Boot options"
1da177e4 642
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643config ZERO_PAGE_OFFSET
644 hex "Zero page offset"
f5f826c6 645 default "0x00004000" if SH_SH03
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646 default "0x00010000" if PAGE_SIZE_64KB
647 default "0x00002000" if PAGE_SIZE_8KB
cad82448 648 default "0x00001000"
1da177e4 649 help
cad82448 650 This sets the default offset of zero page.
1da177e4 651
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652config BOOT_LINK_OFFSET
653 hex "Link address offset for booting"
654 default "0x00800000"
655 help
656 This option allows you to set the link address offset of the zImage.
657 This can be useful if you are on a board which has a small amount of
658 memory.
1da177e4 659
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660config UBC_WAKEUP
661 bool "Wakeup UBC on startup"
0e3a9aab 662 depends on CPU_SH4 && !CPU_SH4A
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663 help
664 Selecting this option will wakeup the User Break Controller (UBC) on
665 startup. Although the UBC is left in an awake state when the processor
666 comes up, some boot loaders misbehave by putting the UBC to sleep in a
667 power saving state, which causes issues with things like ptrace().
1da177e4 668
cad82448 669 If unsure, say N.
1da177e4 670
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671config CMDLINE_BOOL
672 bool "Default bootloader kernel arguments"
1da177e4 673
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674config CMDLINE
675 string "Initial kernel command string"
676 depends on CMDLINE_BOOL
677 default "console=ttySC1,115200"
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678
679endmenu
680
cad82448 681menu "Bus options"
1da177e4 682
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683config SUPERHYWAY
684 tristate "SuperHyway Bus support"
685 depends on CPU_SUBTYPE_SH4_202
1da177e4 686
17be2d2b 687config MAPLE
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688 bool "Maple Bus support"
689 depends on SH_DREAMCAST
690 help
691 The Maple Bus is SEGA's serial communication bus for peripherals
692 on the Dreamcast. Without this bus support you won't be able to
693 get your Dreamcast keyboard etc to work, so most users
694 probably want to say 'Y' here, unless you are only using the
695 Dreamcast with a serial line terminal or a remote network
696 connection.
17be2d2b 697
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698source "arch/sh/drivers/pci/Kconfig"
699
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700source "drivers/pci/pcie/Kconfig"
701
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702source "drivers/pci/Kconfig"
703
704source "drivers/pcmcia/Kconfig"
705
706source "drivers/pci/hotplug/Kconfig"
707
708endmenu
709
710menu "Executable file formats"
711
712source "fs/Kconfig.binfmt"
713
714endmenu
715
3aa770e7 716menu "Power management options (EXPERIMENTAL)"
af998a9a 717depends on EXPERIMENTAL
f4cb5700 718
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719source "kernel/power/Kconfig"
720
721source "drivers/cpuidle/Kconfig"
3aa770e7 722
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723endmenu
724
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SR
725source "net/Kconfig"
726
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727source "drivers/Kconfig"
728
729source "fs/Kconfig"
730
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731source "arch/sh/Kconfig.debug"
732
733source "security/Kconfig"
734
735source "crypto/Kconfig"
736
737source "lib/Kconfig"