Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | config SUPERH |
ea0e1a9a | 3 | def_bool y |
582dc536 | 4 | select ARCH_32BIT_OFF_T |
8690bbcf | 5 | select ARCH_HAS_CPU_CACHE_ALIASING |
91024b3c AK |
6 | select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU |
7 | select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU | |
582dc536 | 8 | select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) |
aef0f78e | 9 | select ARCH_HAS_BINFMT_FLAT if !MMU |
01eb454e | 10 | select ARCH_HAS_CPU_FINALIZE_INIT |
2792d84e | 11 | select ARCH_HAS_CURRENT_STACK_POINTER |
582dc536 CH |
12 | select ARCH_HAS_GIGANTIC_PAGE |
13 | select ARCH_HAS_GCOV_PROFILE_ALL | |
3010a5ea | 14 | select ARCH_HAS_PTE_SPECIAL |
45624ac3 | 15 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
582dc536 | 16 | select ARCH_HIBERNATION_POSSIBLE if MMU |
09d8dd93 | 17 | select ARCH_MIGHT_HAVE_PC_PARPORT |
582dc536 | 18 | select ARCH_WANT_IPC_PARSE_VERSION |
582dc536 | 19 | select CPU_NO_EFFICIENT_FFS |
ff4c25f2 | 20 | select DMA_DECLARE_COHERENT |
582dc536 | 21 | select GENERIC_ATOMIC64 |
582dc536 CH |
22 | select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST |
23 | select GENERIC_IDLE_POLL_SETUP | |
24 | select GENERIC_IRQ_SHOW | |
8bc6666f GU |
25 | select GENERIC_LIB_ASHLDI3 |
26 | select GENERIC_LIB_ASHRDI3 | |
27 | select GENERIC_LIB_LSHRDI3 | |
582dc536 CH |
28 | select GENERIC_PCI_IOMAP if PCI |
29 | select GENERIC_SCHED_CLOCK | |
582dc536 | 30 | select GENERIC_SMP_IDLE_THREAD |
6ca297d4 | 31 | select GUP_GET_PXX_LOW_HIGH if X2TLB |
fcbfe812 | 32 | select HAS_IOPORT if HAS_IOPORT_MAP |
0453c9a7 | 33 | select GENERIC_IOREMAP if MMU |
582dc536 CH |
34 | select HAVE_ARCH_AUDITSYSCALL |
35 | select HAVE_ARCH_KGDB | |
0bb605c2 | 36 | select HAVE_ARCH_SECCOMP_FILTER |
d7b01f78 | 37 | select HAVE_ARCH_TRACEHOOK |
9b2a60c4 | 38 | select HAVE_DEBUG_BUGVERBOSE |
b69ec42b | 39 | select HAVE_DEBUG_KMEMLEAK |
582dc536 CH |
40 | select HAVE_DYNAMIC_FTRACE |
41 | select HAVE_FAST_GUP if MMU | |
42 | select HAVE_FUNCTION_GRAPH_TRACER | |
43 | select HAVE_FUNCTION_TRACER | |
582dc536 CH |
44 | select HAVE_FTRACE_MCOUNT_RECORD |
45 | select HAVE_HW_BREAKPOINT | |
582dc536 | 46 | select HAVE_IOREMAP_PROT if MMU && !X2TLB |
07e88e1b | 47 | select HAVE_KERNEL_BZIP2 |
582dc536 | 48 | select HAVE_KERNEL_GZIP |
07e88e1b | 49 | select HAVE_KERNEL_LZMA |
c7b16efb | 50 | select HAVE_KERNEL_LZO |
582dc536 CH |
51 | select HAVE_KERNEL_XZ |
52 | select HAVE_KPROBES | |
53 | select HAVE_KRETPROBES | |
54 | select HAVE_MIXED_BREAKPOINTS_REGS | |
55 | select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER | |
56 | select HAVE_NMI | |
582dc536 CH |
57 | select HAVE_PATA_PLATFORM |
58 | select HAVE_PERF_EVENTS | |
59 | select HAVE_REGS_AND_STACK_ACCESS_API | |
af1839eb | 60 | select HAVE_UID16 |
cd1a41ce | 61 | select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS |
582dc536 | 62 | select HAVE_STACKPROTECTOR |
a74f7e04 | 63 | select HAVE_SYSCALL_TRACEPOINTS |
ed170924 | 64 | select IRQ_FORCED_THREADING |
a050ba1e | 65 | select LOCK_MM_AND_FIND_VMA |
786d35d4 | 66 | select MODULES_USE_ELF_RELA |
582dc536 | 67 | select NEED_SG_DMA_LENGTH |
cd57d07b | 68 | select NO_DMA if !MMU && !DMA_COHERENT |
eb01d42a | 69 | select NO_GENERIC_PCI_IOPORT_MAP if PCI |
0679a858 | 70 | select OLD_SIGACTION |
582dc536 | 71 | select OLD_SIGSUSPEND |
eb01d42a | 72 | select PCI_DOMAINS if PCI |
e583d6b3 | 73 | select PERF_EVENTS |
582dc536 CH |
74 | select PERF_USE_VMALLOC |
75 | select RTC_LIB | |
57b81330 | 76 | select SPARSE_IRQ |
4aae683f | 77 | select TRACE_IRQFLAGS_SUPPORT |
37744fee AB |
78 | help |
79 | The SuperH is a RISC processor targeted for use in embedded systems | |
80 | and consumer electronics; it was also used in the Sega Dreamcast | |
81 | gaming console. The SuperH port has a home page at | |
82 | <http://www.linux-sh.org/>. | |
39d28a2d | 83 | |
fa691511 PM |
84 | config GENERIC_BUG |
85 | def_bool y | |
37744fee | 86 | depends on BUG |
3767f3f1 | 87 | |
e2268c71 | 88 | config GENERIC_HWEIGHT |
d7ef4fb3 | 89 | def_bool y |
e2268c71 | 90 | |
1da177e4 | 91 | config GENERIC_CALIBRATE_DELAY |
cf204fa7 | 92 | bool |
1da177e4 | 93 | |
bdcab87b PM |
94 | config GENERIC_LOCKBREAK |
95 | def_bool y | |
7be60ccb | 96 | depends on SMP && PREEMPTION |
bdcab87b | 97 | |
af998a9a MD |
98 | config ARCH_SUSPEND_POSSIBLE |
99 | def_bool n | |
100 | ||
101 | config ARCH_HIBERNATION_POSSIBLE | |
102 | def_bool n | |
357d5946 | 103 | |
0a9b0db1 PM |
104 | config SYS_SUPPORTS_APM_EMULATION |
105 | bool | |
af998a9a | 106 | select ARCH_SUSPEND_POSSIBLE |
357d5946 PM |
107 | |
108 | config SYS_SUPPORTS_SMP | |
109 | bool | |
110 | ||
111 | config SYS_SUPPORTS_NUMA | |
112 | bool | |
113 | ||
afbfb52e | 114 | config STACKTRACE_SUPPORT |
d7ef4fb3 | 115 | def_bool y |
afbfb52e PM |
116 | |
117 | config LOCKDEP_SUPPORT | |
d7ef4fb3 | 118 | def_bool y |
afbfb52e | 119 | |
f0d1b0b3 | 120 | config ARCH_HAS_ILOG2_U32 |
d7ef4fb3 | 121 | def_bool n |
f0d1b0b3 DH |
122 | |
123 | config ARCH_HAS_ILOG2_U64 | |
d7ef4fb3 | 124 | def_bool n |
f0d1b0b3 | 125 | |
ce816fa8 | 126 | config NO_IOPORT_MAP |
37b7a978 | 127 | def_bool !PCI |
3ca64d06 | 128 | depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE |
86e4dd5a | 129 | |
e7cc9a73 MD |
130 | config IO_TRAPPED |
131 | bool | |
132 | ||
b7e68d68 PM |
133 | config SWAP_IO_SPACE |
134 | bool | |
135 | ||
01be5d63 PM |
136 | config DMA_COHERENT |
137 | bool | |
138 | ||
139 | config DMA_NONCOHERENT | |
cd57d07b | 140 | def_bool !NO_DMA && !DMA_COHERENT |
6dfdf673 | 141 | select ARCH_HAS_DMA_PREP_COHERENT |
6fa1d28e | 142 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
6dfdf673 | 143 | select DMA_DIRECT_REMAP |
01be5d63 | 144 | |
69543d63 KS |
145 | config PGTABLE_LEVELS |
146 | default 3 if X2TLB | |
147 | default 2 | |
148 | ||
1da177e4 LT |
149 | menu "System type" |
150 | ||
b5f42db0 PM |
151 | # |
152 | # Processor families | |
153 | # | |
154 | config CPU_SH2 | |
155 | bool | |
049d2804 | 156 | select SH_INTC |
b5f42db0 PM |
157 | |
158 | config CPU_SH2A | |
159 | bool | |
160 | select CPU_SH2 | |
e2fcf74f | 161 | select UNCACHED_MAPPING |
b5f42db0 | 162 | |
5a846aba RF |
163 | config CPU_J2 |
164 | bool | |
165 | select CPU_SH2 | |
166 | select OF | |
167 | select OF_EARLY_FLATTREE | |
168 | ||
b5f42db0 PM |
169 | config CPU_SH3 |
170 | bool | |
171 | select CPU_HAS_INTEVT | |
172 | select CPU_HAS_SR_RB | |
049d2804 | 173 | select SH_INTC |
fbfa8934 | 174 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
175 | |
176 | config CPU_SH4 | |
177 | bool | |
855f9a8e | 178 | select ARCH_SUPPORTS_HUGETLBFS if MMU |
b5f42db0 PM |
179 | select CPU_HAS_INTEVT |
180 | select CPU_HAS_SR_RB | |
b5f42db0 | 181 | select CPU_HAS_FPU if !CPU_SH4AL_DSP |
049d2804 | 182 | select SH_INTC |
fbfa8934 | 183 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
184 | |
185 | config CPU_SH4A | |
186 | bool | |
187 | select CPU_SH4 | |
188 | ||
189 | config CPU_SH4AL_DSP | |
190 | bool | |
191 | select CPU_SH4A | |
192 | select CPU_HAS_DSP | |
193 | ||
194 | config CPU_SHX2 | |
195 | bool | |
196 | ||
197 | config CPU_SHX3 | |
198 | bool | |
01be5d63 | 199 | select DMA_COHERENT |
4b478ee2 PM |
200 | select SYS_SUPPORTS_SMP |
201 | select SYS_SUPPORTS_NUMA | |
b5f42db0 | 202 | |
dc65a977 PM |
203 | config ARCH_SHMOBILE |
204 | bool | |
77594912 | 205 | select ARCH_SUSPEND_POSSIBLE |
464ed18e | 206 | select PM |
dc65a977 | 207 | |
86c8c047 MF |
208 | config CPU_HAS_PMU |
209 | depends on CPU_SH4 || CPU_SH4A | |
210 | default y | |
211 | bool | |
212 | ||
b5f42db0 PM |
213 | choice |
214 | prompt "Processor sub-type selection" | |
215 | ||
216 | # | |
217 | # Processor subtypes | |
218 | # | |
219 | ||
220 | # SH-2 Processor Support | |
221 | ||
222 | config CPU_SUBTYPE_SH7619 | |
223 | bool "Support SH7619 processor" | |
224 | select CPU_SH2 | |
fbfa8934 | 225 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 226 | |
5a846aba RF |
227 | config CPU_SUBTYPE_J2 |
228 | bool "Support J2 processor" | |
229 | select CPU_J2 | |
b4214e41 RF |
230 | select SYS_SUPPORTS_SMP |
231 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP | |
5a846aba | 232 | |
b5f42db0 PM |
233 | # SH-2A Processor Support |
234 | ||
2825999e PG |
235 | config CPU_SUBTYPE_SH7201 |
236 | bool "Support SH7201 processor" | |
237 | select CPU_SH2A | |
238 | select CPU_HAS_FPU | |
fbfa8934 | 239 | select SYS_SUPPORTS_SH_MTU2 |
2825999e | 240 | |
6d01f510 PM |
241 | config CPU_SUBTYPE_SH7203 |
242 | bool "Support SH7203 processor" | |
243 | select CPU_SH2A | |
74d99a5e | 244 | select CPU_HAS_FPU |
fbfa8934 MD |
245 | select SYS_SUPPORTS_SH_CMT |
246 | select SYS_SUPPORTS_SH_MTU2 | |
b768ecbc | 247 | select PINCTRL |
6d01f510 | 248 | |
b5f42db0 PM |
249 | config CPU_SUBTYPE_SH7206 |
250 | bool "Support SH7206 processor" | |
251 | select CPU_SH2A | |
fbfa8934 MD |
252 | select SYS_SUPPORTS_SH_CMT |
253 | select SYS_SUPPORTS_SH_MTU2 | |
b5f42db0 | 254 | |
a8f67f4b PM |
255 | config CPU_SUBTYPE_SH7263 |
256 | bool "Support SH7263 processor" | |
257 | select CPU_SH2A | |
74d99a5e | 258 | select CPU_HAS_FPU |
fbfa8934 MD |
259 | select SYS_SUPPORTS_SH_CMT |
260 | select SYS_SUPPORTS_SH_MTU2 | |
a8f67f4b | 261 | |
51ce3068 PE |
262 | config CPU_SUBTYPE_SH7264 |
263 | bool "Support SH7264 processor" | |
264 | select CPU_SH2A | |
265 | select CPU_HAS_FPU | |
fbfa8934 MD |
266 | select SYS_SUPPORTS_SH_CMT |
267 | select SYS_SUPPORTS_SH_MTU2 | |
5946e7bb | 268 | select PINCTRL |
51ce3068 | 269 | |
0b25b7c8 PE |
270 | config CPU_SUBTYPE_SH7269 |
271 | bool "Support SH7269 processor" | |
272 | select CPU_SH2A | |
273 | select CPU_HAS_FPU | |
fbfa8934 MD |
274 | select SYS_SUPPORTS_SH_CMT |
275 | select SYS_SUPPORTS_SH_MTU2 | |
fb872fcc | 276 | select PINCTRL |
0b25b7c8 | 277 | |
2ad69908 PM |
278 | config CPU_SUBTYPE_MXG |
279 | bool "Support MX-G processor" | |
280 | select CPU_SH2A | |
fbfa8934 | 281 | select SYS_SUPPORTS_SH_MTU2 |
2ad69908 PM |
282 | help |
283 | Select MX-G if running on an R8A03022BG part. | |
284 | ||
b5f42db0 PM |
285 | # SH-3 Processor Support |
286 | ||
287 | config CPU_SUBTYPE_SH7705 | |
288 | bool "Support SH7705 processor" | |
289 | select CPU_SH3 | |
290 | ||
291 | config CPU_SUBTYPE_SH7706 | |
292 | bool "Support SH7706 processor" | |
293 | select CPU_SH3 | |
294 | help | |
295 | Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. | |
296 | ||
297 | config CPU_SUBTYPE_SH7707 | |
298 | bool "Support SH7707 processor" | |
299 | select CPU_SH3 | |
300 | help | |
301 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. | |
302 | ||
303 | config CPU_SUBTYPE_SH7708 | |
304 | bool "Support SH7708 processor" | |
305 | select CPU_SH3 | |
306 | help | |
307 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or | |
308 | if you have a 100 Mhz SH-3 HD6417708R CPU. | |
309 | ||
310 | config CPU_SUBTYPE_SH7709 | |
311 | bool "Support SH7709 processor" | |
312 | select CPU_SH3 | |
313 | help | |
314 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. | |
315 | ||
316 | config CPU_SUBTYPE_SH7710 | |
317 | bool "Support SH7710 processor" | |
318 | select CPU_SH3 | |
319 | select CPU_HAS_DSP | |
320 | help | |
321 | Select SH7710 if you have a SH3-DSP SH7710 CPU. | |
322 | ||
323 | config CPU_SUBTYPE_SH7712 | |
324 | bool "Support SH7712 processor" | |
325 | select CPU_SH3 | |
326 | select CPU_HAS_DSP | |
327 | help | |
328 | Select SH7712 if you have a SH3-DSP SH7712 CPU. | |
329 | ||
330 | config CPU_SUBTYPE_SH7720 | |
331 | bool "Support SH7720 processor" | |
332 | select CPU_SH3 | |
333 | select CPU_HAS_DSP | |
fbfa8934 | 334 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 335 | select USB_OHCI_SH if USB_OHCI_HCD |
85db6bff | 336 | select PINCTRL |
b5f42db0 PM |
337 | help |
338 | Select SH7720 if you have a SH3-DSP SH7720 CPU. | |
339 | ||
31a49c4b YS |
340 | config CPU_SUBTYPE_SH7721 |
341 | bool "Support SH7721 processor" | |
342 | select CPU_SH3 | |
343 | select CPU_HAS_DSP | |
fbfa8934 | 344 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 345 | select USB_OHCI_SH if USB_OHCI_HCD |
31a49c4b YS |
346 | help |
347 | Select SH7721 if you have a SH3-DSP SH7721 CPU. | |
348 | ||
b5f42db0 PM |
349 | # SH-4 Processor Support |
350 | ||
351 | config CPU_SUBTYPE_SH7750 | |
352 | bool "Support SH7750 processor" | |
353 | select CPU_SH4 | |
354 | help | |
355 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. | |
356 | ||
357 | config CPU_SUBTYPE_SH7091 | |
358 | bool "Support SH7091 processor" | |
359 | select CPU_SH4 | |
360 | help | |
361 | Select SH7091 if you have an SH-4 based Sega device (such as | |
362 | the Dreamcast, Naomi, and Naomi 2). | |
363 | ||
364 | config CPU_SUBTYPE_SH7750R | |
365 | bool "Support SH7750R processor" | |
366 | select CPU_SH4 | |
367 | ||
368 | config CPU_SUBTYPE_SH7750S | |
369 | bool "Support SH7750S processor" | |
370 | select CPU_SH4 | |
371 | ||
372 | config CPU_SUBTYPE_SH7751 | |
373 | bool "Support SH7751 processor" | |
374 | select CPU_SH4 | |
375 | help | |
376 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, | |
377 | or if you have a HD6417751R CPU. | |
378 | ||
379 | config CPU_SUBTYPE_SH7751R | |
380 | bool "Support SH7751R processor" | |
381 | select CPU_SH4 | |
382 | ||
383 | config CPU_SUBTYPE_SH7760 | |
384 | bool "Support SH7760 processor" | |
385 | select CPU_SH4 | |
386 | ||
b5f42db0 PM |
387 | # SH-4A Processor Support |
388 | ||
178dd0cd PM |
389 | config CPU_SUBTYPE_SH7723 |
390 | bool "Support SH7723 processor" | |
391 | select CPU_SH4A | |
392 | select CPU_SHX2 | |
dc65a977 | 393 | select ARCH_SHMOBILE |
178dd0cd | 394 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 395 | select SYS_SUPPORTS_SH_CMT |
16941a89 | 396 | select PINCTRL |
178dd0cd PM |
397 | help |
398 | Select SH7723 if you have an SH-MobileR2 CPU. | |
399 | ||
0207a2ef KM |
400 | config CPU_SUBTYPE_SH7724 |
401 | bool "Support SH7724 processor" | |
402 | select CPU_SH4A | |
403 | select CPU_SHX2 | |
59fe700d | 404 | select ARCH_SHMOBILE |
0207a2ef | 405 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 406 | select SYS_SUPPORTS_SH_CMT |
18ebd228 | 407 | select PINCTRL |
0207a2ef KM |
408 | help |
409 | Select SH7724 if you have an SH-MobileR2R CPU. | |
410 | ||
fea88a0c NI |
411 | config CPU_SUBTYPE_SH7734 |
412 | bool "Support SH7734 processor" | |
413 | select CPU_SH4A | |
414 | select CPU_SHX2 | |
2c172182 | 415 | select PINCTRL |
fea88a0c NI |
416 | help |
417 | Select SH7734 if you have a SH4A SH7734 CPU. | |
418 | ||
c01f0f1a YS |
419 | config CPU_SUBTYPE_SH7757 |
420 | bool "Support SH7757 processor" | |
421 | select CPU_SH4A | |
422 | select CPU_SHX2 | |
eb61b772 | 423 | select PINCTRL |
c01f0f1a YS |
424 | help |
425 | Select SH7757 if you have a SH4A SH7757 CPU. | |
426 | ||
7d740a06 YS |
427 | config CPU_SUBTYPE_SH7763 |
428 | bool "Support SH7763 processor" | |
429 | select CPU_SH4A | |
7b61ca5d | 430 | select USB_OHCI_SH if USB_OHCI_HCD |
7d740a06 YS |
431 | help |
432 | Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. | |
433 | ||
b5f42db0 PM |
434 | config CPU_SUBTYPE_SH7770 |
435 | bool "Support SH7770 processor" | |
436 | select CPU_SH4A | |
437 | ||
438 | config CPU_SUBTYPE_SH7780 | |
439 | bool "Support SH7780 processor" | |
440 | select CPU_SH4A | |
441 | ||
442 | config CPU_SUBTYPE_SH7785 | |
443 | bool "Support SH7785 processor" | |
444 | select CPU_SH4A | |
445 | select CPU_SHX2 | |
55ba99eb KM |
446 | select ARCH_SPARSEMEM_ENABLE |
447 | select SYS_SUPPORTS_NUMA | |
77bd27b2 | 448 | select PINCTRL |
55ba99eb KM |
449 | |
450 | config CPU_SUBTYPE_SH7786 | |
451 | bool "Support SH7786 processor" | |
452 | select CPU_SH4A | |
37042fbd | 453 | select CPU_SHX3 |
8263a67e | 454 | select CPU_HAS_PTEAEX |
2eb2a436 | 455 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
7b61ca5d | 456 | select USB_OHCI_SH if USB_OHCI_HCD |
7b61ca5d | 457 | select USB_EHCI_SH if USB_EHCI_HCD |
c0fdbff9 | 458 | select PINCTRL |
b5f42db0 PM |
459 | |
460 | config CPU_SUBTYPE_SHX3 | |
461 | bool "Support SH-X3 processor" | |
462 | select CPU_SH4A | |
463 | select CPU_SHX3 | |
5840263e | 464 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
fdcfdfa1 | 465 | select GPIOLIB |
3e347f08 | 466 | select PINCTRL |
b5f42db0 PM |
467 | |
468 | # SH4AL-DSP Processor Support | |
469 | ||
470 | config CPU_SUBTYPE_SH7343 | |
471 | bool "Support SH7343 processor" | |
472 | select CPU_SH4AL_DSP | |
dc65a977 | 473 | select ARCH_SHMOBILE |
fbfa8934 | 474 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 PM |
475 | |
476 | config CPU_SUBTYPE_SH7722 | |
477 | bool "Support SH7722 processor" | |
478 | select CPU_SH4AL_DSP | |
479 | select CPU_SHX2 | |
dc65a977 | 480 | select ARCH_SHMOBILE |
b5f42db0 PM |
481 | select ARCH_SPARSEMEM_ENABLE |
482 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 483 | select SYS_SUPPORTS_SH_CMT |
ef97c3c1 | 484 | select PINCTRL |
9109a30e MD |
485 | |
486 | config CPU_SUBTYPE_SH7366 | |
487 | bool "Support SH7366 processor" | |
488 | select CPU_SH4AL_DSP | |
489 | select CPU_SHX2 | |
dc65a977 | 490 | select ARCH_SHMOBILE |
9109a30e MD |
491 | select ARCH_SPARSEMEM_ENABLE |
492 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 493 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 494 | |
3cc000b5 PM |
495 | endchoice |
496 | ||
f3d22298 | 497 | source "arch/sh/mm/Kconfig" |
939a24a6 | 498 | |
4690bdc7 | 499 | source "arch/sh/Kconfig.cpu" |
f3d22298 | 500 | |
939a24a6 | 501 | source "arch/sh/boards/Kconfig" |
32351a28 | 502 | |
32351a28 PM |
503 | menu "Timer and clock configuration" |
504 | ||
cad82448 PM |
505 | config SH_PCLK_FREQ |
506 | int "Peripheral clock frequency (in Hz)" | |
8152a74b | 507 | depends on SH_CLK_CPG_LEGACY |
9d4436a6 | 508 | default "31250000" if CPU_SUBTYPE_SH7619 |
8152a74b PM |
509 | default "33333333" if CPU_SUBTYPE_SH7770 || \ |
510 | CPU_SUBTYPE_SH7760 || \ | |
511 | CPU_SUBTYPE_SH7705 || \ | |
512 | CPU_SUBTYPE_SH7203 || \ | |
513 | CPU_SUBTYPE_SH7206 || \ | |
514 | CPU_SUBTYPE_SH7263 || \ | |
43a1839c | 515 | CPU_SUBTYPE_MXG |
05627486 | 516 | default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R |
05627486 | 517 | default "50000000" |
1da177e4 | 518 | help |
cad82448 PM |
519 | This option is used to specify the peripheral clock frequency. |
520 | This is necessary for determining the reference clock value on | |
521 | platforms lacking an RTC. | |
1da177e4 | 522 | |
36aa1e32 PM |
523 | config SH_CLK_CPG |
524 | def_bool y | |
525 | ||
253b0887 | 526 | config SH_CLK_CPG_LEGACY |
36aa1e32 | 527 | depends on SH_CLK_CPG |
43a1839c | 528 | def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ |
51ce3068 | 529 | !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ |
bcb86e0a PM |
530 | !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ |
531 | !CPU_SUBTYPE_SH7269 | |
253b0887 | 532 | |
32351a28 PM |
533 | endmenu |
534 | ||
cad82448 | 535 | menu "CPU Frequency scaling" |
cad82448 | 536 | source "drivers/cpufreq/Kconfig" |
cad82448 PM |
537 | endmenu |
538 | ||
9f5e8eee PM |
539 | source "arch/sh/drivers/Kconfig" |
540 | ||
cad82448 | 541 | endmenu |
1da177e4 | 542 | |
cad82448 PM |
543 | menu "Kernel features" |
544 | ||
8636a1f9 | 545 | source "kernel/Kconfig.hz" |
91b91d01 | 546 | |
40445d06 ED |
547 | config ARCH_SUPPORTS_KEXEC |
548 | def_bool MMU | |
549 | ||
550 | config ARCH_SUPPORTS_CRASH_DUMP | |
551 | def_bool BROKEN_ON_SMP | |
552 | ||
553 | config ARCH_SUPPORTS_KEXEC_JUMP | |
554 | def_bool y | |
b7cf6ddc | 555 | |
e66ac3f2 SH |
556 | config PHYSICAL_START |
557 | hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) | |
558 | default MEMORY_START | |
a7f7f624 | 559 | help |
e66ac3f2 SH |
560 | This gives the physical address where the kernel is loaded |
561 | and is ordinarily the same as MEMORY_START. | |
562 | ||
563 | Different values are primarily used in the case of kexec on panic | |
564 | where the fail safe kernel needs to run at a different address | |
565 | than the panic-ed kernel. | |
566 | ||
1da177e4 LT |
567 | config SMP |
568 | bool "Symmetric multi-processing support" | |
357d5946 | 569 | depends on SYS_SUPPORTS_SMP |
a7f7f624 | 570 | help |
1da177e4 | 571 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
572 | a system with only one CPU, say N. If you have a system with more |
573 | than one CPU, say Y. | |
1da177e4 | 574 | |
4a474157 | 575 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
576 | machines, but will use only one CPU of a multiprocessor machine. If |
577 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 578 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
579 | will run faster if you say N here. |
580 | ||
581 | People using multiprocessor machines who say Y here should also say | |
582 | Y to "Enhanced Real Time Clock Support", below. | |
583 | ||
4f4cfa6c | 584 | See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO |
91194e9b | 585 | available at <https://www.tldp.org/docs.html#howto>. |
1da177e4 LT |
586 | |
587 | If you don't know what to do here, say N. | |
588 | ||
589 | config NR_CPUS | |
590 | int "Maximum number of CPUs (2-32)" | |
591 | range 2 32 | |
592 | depends on SMP | |
2eb2a436 | 593 | default "4" if CPU_SUBTYPE_SHX3 |
1da177e4 LT |
594 | default "2" |
595 | help | |
596 | This allows you to specify the maximum number of CPUs which this | |
597 | kernel will support. The maximum supported value is 32 and the | |
598 | minimum value which makes sense is 2. | |
599 | ||
600 | This is purely to save memory - each supported CPU adds | |
601 | approximately eight kilobytes to the kernel image. | |
602 | ||
763142d1 PM |
603 | config HOTPLUG_CPU |
604 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
40b31360 | 605 | depends on SMP |
763142d1 PM |
606 | help |
607 | Say Y here to experiment with turning CPUs off and on. CPUs | |
608 | can be controlled through /sys/devices/system/cpu. | |
609 | ||
83662461 PM |
610 | config GUSA |
611 | def_bool y | |
37744fee | 612 | depends on !SMP |
83662461 PM |
613 | help |
614 | This enables support for gUSA (general UserSpace Atomicity). | |
615 | This is the default implementation for both UP and non-ll/sc | |
616 | CPUs, and is used by the libc, amongst others. | |
617 | ||
618 | For additional information, design information can be found | |
619 | in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. | |
620 | ||
621 | This should only be disabled for special cases where alternate | |
622 | atomicity implementations exist. | |
623 | ||
1efe4ce3 SM |
624 | config GUSA_RB |
625 | bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" | |
626 | depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) | |
627 | help | |
628 | Enabling this option will allow the kernel to implement some | |
692105b8 | 629 | atomic operations using a software implementation of load-locked/ |
1efe4ce3 SM |
630 | store-conditional (LLSC). On machines which do not have hardware |
631 | LLSC, this should be more efficient than the other alternative of | |
692105b8 | 632 | disabling interrupts around the atomic sequence. |
1efe4ce3 | 633 | |
86c8c047 MF |
634 | config HW_PERF_EVENTS |
635 | bool "Enable hardware performance counter support for perf events" | |
636 | depends on PERF_EVENTS && CPU_HAS_PMU | |
637 | default y | |
638 | help | |
639 | Enable hardware performance counter support for perf events. If | |
640 | disabled, perf events will use software events only. | |
641 | ||
43b8774d PM |
642 | source "drivers/sh/Kconfig" |
643 | ||
cad82448 | 644 | endmenu |
1da177e4 | 645 | |
cad82448 | 646 | menu "Boot options" |
1da177e4 | 647 | |
190fe191 RF |
648 | config USE_BUILTIN_DTB |
649 | bool "Use builtin DTB" | |
650 | default n | |
651 | depends on SH_DEVICE_TREE | |
652 | help | |
653 | Link a device tree blob for particular hardware into the kernel, | |
654 | suppressing use of the DTB pointer provided by the bootloader. | |
655 | This option should only be used with legacy bootloaders that are | |
656 | not capable of providing a DTB to the kernel, or for experimental | |
657 | hardware without stable device tree bindings. | |
658 | ||
659 | config BUILTIN_DTB_SOURCE | |
660 | string "Source file for builtin DTB" | |
661 | default "" | |
662 | depends on USE_BUILTIN_DTB | |
663 | help | |
664 | Base name (without suffix, relative to arch/sh/boot/dts) for the | |
665 | a DTS file that will be used to produce the DTB linked into the | |
666 | kernel. | |
667 | ||
cad82448 | 668 | config ZERO_PAGE_OFFSET |
b412a49a PM |
669 | hex |
670 | default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ | |
671 | SH_7751_SOLUTION_ENGINE | |
672 | default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 | |
7a847f81 | 673 | default "0x00002000" if PAGE_SIZE_8KB |
cad82448 | 674 | default "0x00001000" |
1da177e4 | 675 | help |
cad82448 | 676 | This sets the default offset of zero page. |
1da177e4 | 677 | |
cad82448 | 678 | config BOOT_LINK_OFFSET |
b412a49a PM |
679 | hex |
680 | default "0x00210000" if SH_SHMIN | |
b412a49a PM |
681 | default "0x00810000" if SH_7780_SOLUTION_ENGINE |
682 | default "0x009e0000" if SH_TITAN | |
683 | default "0x01800000" if SH_SDK7780 | |
684 | default "0x02000000" if SH_EDOSK7760 | |
cad82448 PM |
685 | default "0x00800000" |
686 | help | |
687 | This option allows you to set the link address offset of the zImage. | |
688 | This can be useful if you are on a board which has a small amount of | |
689 | memory. | |
1da177e4 | 690 | |
b412a49a PM |
691 | config ENTRY_OFFSET |
692 | hex | |
693 | default "0x00001000" if PAGE_SIZE_4KB | |
694 | default "0x00002000" if PAGE_SIZE_8KB | |
695 | default "0x00004000" if PAGE_SIZE_16KB | |
696 | default "0x00010000" if PAGE_SIZE_64KB | |
697 | default "0x00000000" | |
698 | ||
4705b2e8 MD |
699 | config ROMIMAGE_MMCIF |
700 | bool "Include MMCIF loader in romImage (EXPERIMENTAL)" | |
0d57af1e | 701 | depends on CPU_SUBTYPE_SH7724 |
4705b2e8 MD |
702 | help |
703 | Say Y here to include experimental MMCIF loading code in | |
704 | romImage. With this enabled it is possible to write the romImage | |
705 | kernel image to an MMC card and boot the kernel straight from | |
706 | the reset vector. At reset the processor Mask ROM will load the | |
707 | first part of the romImage which in turn loads the rest the kernel | |
708 | image to RAM using the MMCIF hardware block. | |
709 | ||
d724a9c9 PM |
710 | choice |
711 | prompt "Kernel command line" | |
712 | optional | |
713 | default CMDLINE_OVERWRITE | |
714 | help | |
715 | Setting this option allows the kernel command line arguments | |
716 | to be set. | |
717 | ||
718 | config CMDLINE_OVERWRITE | |
719 | bool "Overwrite bootloader kernel arguments" | |
720 | help | |
721 | Given string will overwrite any arguments passed in by | |
722 | a bootloader. | |
723 | ||
724 | config CMDLINE_EXTEND | |
725 | bool "Extend bootloader kernel arguments" | |
726 | help | |
727 | Given string will be concatenated with arguments passed in | |
728 | by a bootloader. | |
729 | ||
730 | endchoice | |
1da177e4 | 731 | |
cad82448 | 732 | config CMDLINE |
d724a9c9 PM |
733 | string "Kernel command line arguments string" |
734 | depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND | |
cad82448 | 735 | default "console=ttySC1,115200" |
1da177e4 LT |
736 | |
737 | endmenu | |
738 | ||
cad82448 | 739 | menu "Bus options" |
1da177e4 | 740 | |
17be2d2b | 741 | config MAPLE |
e16038ab PM |
742 | bool "Maple Bus support" |
743 | depends on SH_DREAMCAST | |
744 | help | |
745 | The Maple Bus is SEGA's serial communication bus for peripherals | |
746 | on the Dreamcast. Without this bus support you won't be able to | |
747 | get your Dreamcast keyboard etc to work, so most users | |
748 | probably want to say 'Y' here, unless you are only using the | |
749 | Dreamcast with a serial line terminal or a remote network | |
750 | connection. | |
17be2d2b | 751 | |
1da177e4 LT |
752 | endmenu |
753 | ||
3aa770e7 | 754 | menu "Power management options (EXPERIMENTAL)" |
f4cb5700 | 755 | |
c6f17cb2 MD |
756 | source "kernel/power/Kconfig" |
757 | ||
758 | source "drivers/cpuidle/Kconfig" | |
3aa770e7 | 759 | |
3aa770e7 | 760 | endmenu |