Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | config SUPERH |
ea0e1a9a | 3 | def_bool y |
582dc536 | 4 | select ARCH_32BIT_OFF_T |
91024b3c AK |
5 | select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU |
6 | select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU | |
582dc536 CH |
7 | select ARCH_HAVE_CUSTOM_GPIO_H |
8 | select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A) | |
aef0f78e | 9 | select ARCH_HAS_BINFMT_FLAT if !MMU |
2792d84e | 10 | select ARCH_HAS_CURRENT_STACK_POINTER |
582dc536 CH |
11 | select ARCH_HAS_GIGANTIC_PAGE |
12 | select ARCH_HAS_GCOV_PROFILE_ALL | |
3010a5ea | 13 | select ARCH_HAS_PTE_SPECIAL |
45624ac3 | 14 | select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST |
582dc536 | 15 | select ARCH_HIBERNATION_POSSIBLE if MMU |
09d8dd93 | 16 | select ARCH_MIGHT_HAVE_PC_PARPORT |
582dc536 | 17 | select ARCH_WANT_IPC_PARSE_VERSION |
582dc536 | 18 | select CPU_NO_EFFICIENT_FFS |
ff4c25f2 | 19 | select DMA_DECLARE_COHERENT |
582dc536 | 20 | select GENERIC_ATOMIC64 |
582dc536 CH |
21 | select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST |
22 | select GENERIC_IDLE_POLL_SETUP | |
23 | select GENERIC_IRQ_SHOW | |
24 | select GENERIC_PCI_IOMAP if PCI | |
25 | select GENERIC_SCHED_CLOCK | |
582dc536 | 26 | select GENERIC_SMP_IDLE_THREAD |
6ca297d4 | 27 | select GUP_GET_PXX_LOW_HIGH if X2TLB |
582dc536 CH |
28 | select HAVE_ARCH_AUDITSYSCALL |
29 | select HAVE_ARCH_KGDB | |
0bb605c2 | 30 | select HAVE_ARCH_SECCOMP_FILTER |
d7b01f78 | 31 | select HAVE_ARCH_TRACEHOOK |
9b2a60c4 | 32 | select HAVE_DEBUG_BUGVERBOSE |
b69ec42b | 33 | select HAVE_DEBUG_KMEMLEAK |
582dc536 CH |
34 | select HAVE_DYNAMIC_FTRACE |
35 | select HAVE_FAST_GUP if MMU | |
36 | select HAVE_FUNCTION_GRAPH_TRACER | |
37 | select HAVE_FUNCTION_TRACER | |
582dc536 CH |
38 | select HAVE_FTRACE_MCOUNT_RECORD |
39 | select HAVE_HW_BREAKPOINT | |
582dc536 | 40 | select HAVE_IOREMAP_PROT if MMU && !X2TLB |
07e88e1b | 41 | select HAVE_KERNEL_BZIP2 |
582dc536 | 42 | select HAVE_KERNEL_GZIP |
07e88e1b | 43 | select HAVE_KERNEL_LZMA |
c7b16efb | 44 | select HAVE_KERNEL_LZO |
582dc536 CH |
45 | select HAVE_KERNEL_XZ |
46 | select HAVE_KPROBES | |
47 | select HAVE_KRETPROBES | |
48 | select HAVE_MIXED_BREAKPOINTS_REGS | |
49 | select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER | |
50 | select HAVE_NMI | |
582dc536 CH |
51 | select HAVE_PATA_PLATFORM |
52 | select HAVE_PERF_EVENTS | |
53 | select HAVE_REGS_AND_STACK_ACCESS_API | |
af1839eb | 54 | select HAVE_UID16 |
cd1a41ce | 55 | select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS |
582dc536 | 56 | select HAVE_STACKPROTECTOR |
a74f7e04 | 57 | select HAVE_SYSCALL_TRACEPOINTS |
ed170924 | 58 | select IRQ_FORCED_THREADING |
786d35d4 | 59 | select MODULES_USE_ELF_RELA |
582dc536 | 60 | select NEED_SG_DMA_LENGTH |
cd57d07b | 61 | select NO_DMA if !MMU && !DMA_COHERENT |
eb01d42a | 62 | select NO_GENERIC_PCI_IOPORT_MAP if PCI |
0679a858 | 63 | select OLD_SIGACTION |
582dc536 | 64 | select OLD_SIGSUSPEND |
eb01d42a | 65 | select PCI_DOMAINS if PCI |
e583d6b3 | 66 | select PERF_EVENTS |
582dc536 CH |
67 | select PERF_USE_VMALLOC |
68 | select RTC_LIB | |
57b81330 | 69 | select SPARSE_IRQ |
4aae683f | 70 | select TRACE_IRQFLAGS_SUPPORT |
37744fee AB |
71 | help |
72 | The SuperH is a RISC processor targeted for use in embedded systems | |
73 | and consumer electronics; it was also used in the Sega Dreamcast | |
74 | gaming console. The SuperH port has a home page at | |
75 | <http://www.linux-sh.org/>. | |
39d28a2d | 76 | |
fa691511 PM |
77 | config GENERIC_BUG |
78 | def_bool y | |
37744fee | 79 | depends on BUG |
3767f3f1 | 80 | |
e2268c71 | 81 | config GENERIC_HWEIGHT |
d7ef4fb3 | 82 | def_bool y |
e2268c71 | 83 | |
1da177e4 | 84 | config GENERIC_CALIBRATE_DELAY |
cf204fa7 | 85 | bool |
1da177e4 | 86 | |
bdcab87b PM |
87 | config GENERIC_LOCKBREAK |
88 | def_bool y | |
7be60ccb | 89 | depends on SMP && PREEMPTION |
bdcab87b | 90 | |
af998a9a MD |
91 | config ARCH_SUSPEND_POSSIBLE |
92 | def_bool n | |
93 | ||
94 | config ARCH_HIBERNATION_POSSIBLE | |
95 | def_bool n | |
357d5946 | 96 | |
0a9b0db1 PM |
97 | config SYS_SUPPORTS_APM_EMULATION |
98 | bool | |
af998a9a | 99 | select ARCH_SUSPEND_POSSIBLE |
357d5946 PM |
100 | |
101 | config SYS_SUPPORTS_SMP | |
102 | bool | |
103 | ||
104 | config SYS_SUPPORTS_NUMA | |
105 | bool | |
106 | ||
afbfb52e | 107 | config STACKTRACE_SUPPORT |
d7ef4fb3 | 108 | def_bool y |
afbfb52e PM |
109 | |
110 | config LOCKDEP_SUPPORT | |
d7ef4fb3 | 111 | def_bool y |
afbfb52e | 112 | |
f0d1b0b3 | 113 | config ARCH_HAS_ILOG2_U32 |
d7ef4fb3 | 114 | def_bool n |
f0d1b0b3 DH |
115 | |
116 | config ARCH_HAS_ILOG2_U64 | |
d7ef4fb3 | 117 | def_bool n |
f0d1b0b3 | 118 | |
ce816fa8 | 119 | config NO_IOPORT_MAP |
37b7a978 | 120 | def_bool !PCI |
8a8e5462 GU |
121 | depends on !SH_SH4202_MICRODEV && !SH_SHMIN && !SH_HP6XX && \ |
122 | !SH_SOLUTION_ENGINE | |
86e4dd5a | 123 | |
e7cc9a73 MD |
124 | config IO_TRAPPED |
125 | bool | |
126 | ||
b7e68d68 PM |
127 | config SWAP_IO_SPACE |
128 | bool | |
129 | ||
01be5d63 PM |
130 | config DMA_COHERENT |
131 | bool | |
132 | ||
133 | config DMA_NONCOHERENT | |
cd57d07b | 134 | def_bool !NO_DMA && !DMA_COHERENT |
6dfdf673 | 135 | select ARCH_HAS_DMA_PREP_COHERENT |
6fa1d28e | 136 | select ARCH_HAS_SYNC_DMA_FOR_DEVICE |
6dfdf673 | 137 | select DMA_DIRECT_REMAP |
01be5d63 | 138 | |
69543d63 KS |
139 | config PGTABLE_LEVELS |
140 | default 3 if X2TLB | |
141 | default 2 | |
142 | ||
1da177e4 LT |
143 | menu "System type" |
144 | ||
b5f42db0 PM |
145 | # |
146 | # Processor families | |
147 | # | |
148 | config CPU_SH2 | |
149 | bool | |
049d2804 | 150 | select SH_INTC |
b5f42db0 PM |
151 | |
152 | config CPU_SH2A | |
153 | bool | |
154 | select CPU_SH2 | |
e2fcf74f | 155 | select UNCACHED_MAPPING |
b5f42db0 | 156 | |
5a846aba RF |
157 | config CPU_J2 |
158 | bool | |
159 | select CPU_SH2 | |
160 | select OF | |
161 | select OF_EARLY_FLATTREE | |
162 | ||
b5f42db0 PM |
163 | config CPU_SH3 |
164 | bool | |
165 | select CPU_HAS_INTEVT | |
166 | select CPU_HAS_SR_RB | |
049d2804 | 167 | select SH_INTC |
fbfa8934 | 168 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
169 | |
170 | config CPU_SH4 | |
171 | bool | |
855f9a8e | 172 | select ARCH_SUPPORTS_HUGETLBFS if MMU |
b5f42db0 PM |
173 | select CPU_HAS_INTEVT |
174 | select CPU_HAS_SR_RB | |
b5f42db0 | 175 | select CPU_HAS_FPU if !CPU_SH4AL_DSP |
049d2804 | 176 | select SH_INTC |
fbfa8934 | 177 | select SYS_SUPPORTS_SH_TMU |
b5f42db0 PM |
178 | |
179 | config CPU_SH4A | |
180 | bool | |
181 | select CPU_SH4 | |
182 | ||
183 | config CPU_SH4AL_DSP | |
184 | bool | |
185 | select CPU_SH4A | |
186 | select CPU_HAS_DSP | |
187 | ||
188 | config CPU_SHX2 | |
189 | bool | |
190 | ||
191 | config CPU_SHX3 | |
192 | bool | |
01be5d63 | 193 | select DMA_COHERENT |
4b478ee2 PM |
194 | select SYS_SUPPORTS_SMP |
195 | select SYS_SUPPORTS_NUMA | |
b5f42db0 | 196 | |
dc65a977 PM |
197 | config ARCH_SHMOBILE |
198 | bool | |
77594912 | 199 | select ARCH_SUSPEND_POSSIBLE |
464ed18e | 200 | select PM |
dc65a977 | 201 | |
86c8c047 MF |
202 | config CPU_HAS_PMU |
203 | depends on CPU_SH4 || CPU_SH4A | |
204 | default y | |
205 | bool | |
206 | ||
b5f42db0 PM |
207 | choice |
208 | prompt "Processor sub-type selection" | |
209 | ||
210 | # | |
211 | # Processor subtypes | |
212 | # | |
213 | ||
214 | # SH-2 Processor Support | |
215 | ||
216 | config CPU_SUBTYPE_SH7619 | |
217 | bool "Support SH7619 processor" | |
218 | select CPU_SH2 | |
fbfa8934 | 219 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 220 | |
5a846aba RF |
221 | config CPU_SUBTYPE_J2 |
222 | bool "Support J2 processor" | |
223 | select CPU_J2 | |
b4214e41 RF |
224 | select SYS_SUPPORTS_SMP |
225 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP | |
5a846aba | 226 | |
b5f42db0 PM |
227 | # SH-2A Processor Support |
228 | ||
2825999e PG |
229 | config CPU_SUBTYPE_SH7201 |
230 | bool "Support SH7201 processor" | |
231 | select CPU_SH2A | |
232 | select CPU_HAS_FPU | |
fbfa8934 | 233 | select SYS_SUPPORTS_SH_MTU2 |
2825999e | 234 | |
6d01f510 PM |
235 | config CPU_SUBTYPE_SH7203 |
236 | bool "Support SH7203 processor" | |
237 | select CPU_SH2A | |
74d99a5e | 238 | select CPU_HAS_FPU |
fbfa8934 MD |
239 | select SYS_SUPPORTS_SH_CMT |
240 | select SYS_SUPPORTS_SH_MTU2 | |
b768ecbc | 241 | select PINCTRL |
6d01f510 | 242 | |
b5f42db0 PM |
243 | config CPU_SUBTYPE_SH7206 |
244 | bool "Support SH7206 processor" | |
245 | select CPU_SH2A | |
fbfa8934 MD |
246 | select SYS_SUPPORTS_SH_CMT |
247 | select SYS_SUPPORTS_SH_MTU2 | |
b5f42db0 | 248 | |
a8f67f4b PM |
249 | config CPU_SUBTYPE_SH7263 |
250 | bool "Support SH7263 processor" | |
251 | select CPU_SH2A | |
74d99a5e | 252 | select CPU_HAS_FPU |
fbfa8934 MD |
253 | select SYS_SUPPORTS_SH_CMT |
254 | select SYS_SUPPORTS_SH_MTU2 | |
a8f67f4b | 255 | |
51ce3068 PE |
256 | config CPU_SUBTYPE_SH7264 |
257 | bool "Support SH7264 processor" | |
258 | select CPU_SH2A | |
259 | select CPU_HAS_FPU | |
fbfa8934 MD |
260 | select SYS_SUPPORTS_SH_CMT |
261 | select SYS_SUPPORTS_SH_MTU2 | |
5946e7bb | 262 | select PINCTRL |
51ce3068 | 263 | |
0b25b7c8 PE |
264 | config CPU_SUBTYPE_SH7269 |
265 | bool "Support SH7269 processor" | |
266 | select CPU_SH2A | |
267 | select CPU_HAS_FPU | |
fbfa8934 MD |
268 | select SYS_SUPPORTS_SH_CMT |
269 | select SYS_SUPPORTS_SH_MTU2 | |
fb872fcc | 270 | select PINCTRL |
0b25b7c8 | 271 | |
2ad69908 PM |
272 | config CPU_SUBTYPE_MXG |
273 | bool "Support MX-G processor" | |
274 | select CPU_SH2A | |
fbfa8934 | 275 | select SYS_SUPPORTS_SH_MTU2 |
2ad69908 PM |
276 | help |
277 | Select MX-G if running on an R8A03022BG part. | |
278 | ||
b5f42db0 PM |
279 | # SH-3 Processor Support |
280 | ||
281 | config CPU_SUBTYPE_SH7705 | |
282 | bool "Support SH7705 processor" | |
283 | select CPU_SH3 | |
284 | ||
285 | config CPU_SUBTYPE_SH7706 | |
286 | bool "Support SH7706 processor" | |
287 | select CPU_SH3 | |
288 | help | |
289 | Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU. | |
290 | ||
291 | config CPU_SUBTYPE_SH7707 | |
292 | bool "Support SH7707 processor" | |
293 | select CPU_SH3 | |
294 | help | |
295 | Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU. | |
296 | ||
297 | config CPU_SUBTYPE_SH7708 | |
298 | bool "Support SH7708 processor" | |
299 | select CPU_SH3 | |
300 | help | |
301 | Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or | |
302 | if you have a 100 Mhz SH-3 HD6417708R CPU. | |
303 | ||
304 | config CPU_SUBTYPE_SH7709 | |
305 | bool "Support SH7709 processor" | |
306 | select CPU_SH3 | |
307 | help | |
308 | Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU. | |
309 | ||
310 | config CPU_SUBTYPE_SH7710 | |
311 | bool "Support SH7710 processor" | |
312 | select CPU_SH3 | |
313 | select CPU_HAS_DSP | |
314 | help | |
315 | Select SH7710 if you have a SH3-DSP SH7710 CPU. | |
316 | ||
317 | config CPU_SUBTYPE_SH7712 | |
318 | bool "Support SH7712 processor" | |
319 | select CPU_SH3 | |
320 | select CPU_HAS_DSP | |
321 | help | |
322 | Select SH7712 if you have a SH3-DSP SH7712 CPU. | |
323 | ||
324 | config CPU_SUBTYPE_SH7720 | |
325 | bool "Support SH7720 processor" | |
326 | select CPU_SH3 | |
327 | select CPU_HAS_DSP | |
fbfa8934 | 328 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 329 | select USB_OHCI_SH if USB_OHCI_HCD |
85db6bff | 330 | select PINCTRL |
b5f42db0 PM |
331 | help |
332 | Select SH7720 if you have a SH3-DSP SH7720 CPU. | |
333 | ||
31a49c4b YS |
334 | config CPU_SUBTYPE_SH7721 |
335 | bool "Support SH7721 processor" | |
336 | select CPU_SH3 | |
337 | select CPU_HAS_DSP | |
fbfa8934 | 338 | select SYS_SUPPORTS_SH_CMT |
7b61ca5d | 339 | select USB_OHCI_SH if USB_OHCI_HCD |
31a49c4b YS |
340 | help |
341 | Select SH7721 if you have a SH3-DSP SH7721 CPU. | |
342 | ||
b5f42db0 PM |
343 | # SH-4 Processor Support |
344 | ||
345 | config CPU_SUBTYPE_SH7750 | |
346 | bool "Support SH7750 processor" | |
347 | select CPU_SH4 | |
348 | help | |
349 | Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU. | |
350 | ||
351 | config CPU_SUBTYPE_SH7091 | |
352 | bool "Support SH7091 processor" | |
353 | select CPU_SH4 | |
354 | help | |
355 | Select SH7091 if you have an SH-4 based Sega device (such as | |
356 | the Dreamcast, Naomi, and Naomi 2). | |
357 | ||
358 | config CPU_SUBTYPE_SH7750R | |
359 | bool "Support SH7750R processor" | |
360 | select CPU_SH4 | |
361 | ||
362 | config CPU_SUBTYPE_SH7750S | |
363 | bool "Support SH7750S processor" | |
364 | select CPU_SH4 | |
365 | ||
366 | config CPU_SUBTYPE_SH7751 | |
367 | bool "Support SH7751 processor" | |
368 | select CPU_SH4 | |
369 | help | |
370 | Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU, | |
371 | or if you have a HD6417751R CPU. | |
372 | ||
373 | config CPU_SUBTYPE_SH7751R | |
374 | bool "Support SH7751R processor" | |
375 | select CPU_SH4 | |
376 | ||
377 | config CPU_SUBTYPE_SH7760 | |
378 | bool "Support SH7760 processor" | |
379 | select CPU_SH4 | |
380 | ||
381 | config CPU_SUBTYPE_SH4_202 | |
382 | bool "Support SH4-202 processor" | |
383 | select CPU_SH4 | |
384 | ||
385 | # SH-4A Processor Support | |
386 | ||
178dd0cd PM |
387 | config CPU_SUBTYPE_SH7723 |
388 | bool "Support SH7723 processor" | |
389 | select CPU_SH4A | |
390 | select CPU_SHX2 | |
dc65a977 | 391 | select ARCH_SHMOBILE |
178dd0cd | 392 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 393 | select SYS_SUPPORTS_SH_CMT |
16941a89 | 394 | select PINCTRL |
178dd0cd PM |
395 | help |
396 | Select SH7723 if you have an SH-MobileR2 CPU. | |
397 | ||
0207a2ef KM |
398 | config CPU_SUBTYPE_SH7724 |
399 | bool "Support SH7724 processor" | |
400 | select CPU_SH4A | |
401 | select CPU_SHX2 | |
59fe700d | 402 | select ARCH_SHMOBILE |
0207a2ef | 403 | select ARCH_SPARSEMEM_ENABLE |
fbfa8934 | 404 | select SYS_SUPPORTS_SH_CMT |
18ebd228 | 405 | select PINCTRL |
0207a2ef KM |
406 | help |
407 | Select SH7724 if you have an SH-MobileR2R CPU. | |
408 | ||
fea88a0c NI |
409 | config CPU_SUBTYPE_SH7734 |
410 | bool "Support SH7734 processor" | |
411 | select CPU_SH4A | |
412 | select CPU_SHX2 | |
2c172182 | 413 | select PINCTRL |
fea88a0c NI |
414 | help |
415 | Select SH7734 if you have a SH4A SH7734 CPU. | |
416 | ||
c01f0f1a YS |
417 | config CPU_SUBTYPE_SH7757 |
418 | bool "Support SH7757 processor" | |
419 | select CPU_SH4A | |
420 | select CPU_SHX2 | |
eb61b772 | 421 | select PINCTRL |
c01f0f1a YS |
422 | help |
423 | Select SH7757 if you have a SH4A SH7757 CPU. | |
424 | ||
7d740a06 YS |
425 | config CPU_SUBTYPE_SH7763 |
426 | bool "Support SH7763 processor" | |
427 | select CPU_SH4A | |
7b61ca5d | 428 | select USB_OHCI_SH if USB_OHCI_HCD |
7d740a06 YS |
429 | help |
430 | Select SH7763 if you have a SH4A SH7763(R5S77631) CPU. | |
431 | ||
b5f42db0 PM |
432 | config CPU_SUBTYPE_SH7770 |
433 | bool "Support SH7770 processor" | |
434 | select CPU_SH4A | |
435 | ||
436 | config CPU_SUBTYPE_SH7780 | |
437 | bool "Support SH7780 processor" | |
438 | select CPU_SH4A | |
439 | ||
440 | config CPU_SUBTYPE_SH7785 | |
441 | bool "Support SH7785 processor" | |
442 | select CPU_SH4A | |
443 | select CPU_SHX2 | |
55ba99eb KM |
444 | select ARCH_SPARSEMEM_ENABLE |
445 | select SYS_SUPPORTS_NUMA | |
77bd27b2 | 446 | select PINCTRL |
55ba99eb KM |
447 | |
448 | config CPU_SUBTYPE_SH7786 | |
449 | bool "Support SH7786 processor" | |
450 | select CPU_SH4A | |
37042fbd | 451 | select CPU_SHX3 |
8263a67e | 452 | select CPU_HAS_PTEAEX |
2eb2a436 | 453 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
7b61ca5d | 454 | select USB_OHCI_SH if USB_OHCI_HCD |
7b61ca5d | 455 | select USB_EHCI_SH if USB_EHCI_HCD |
c0fdbff9 | 456 | select PINCTRL |
b5f42db0 PM |
457 | |
458 | config CPU_SUBTYPE_SHX3 | |
459 | bool "Support SH-X3 processor" | |
460 | select CPU_SH4A | |
461 | select CPU_SHX3 | |
5840263e | 462 | select GENERIC_CLOCKEVENTS_BROADCAST if SMP |
fdcfdfa1 | 463 | select GPIOLIB |
3e347f08 | 464 | select PINCTRL |
b5f42db0 PM |
465 | |
466 | # SH4AL-DSP Processor Support | |
467 | ||
468 | config CPU_SUBTYPE_SH7343 | |
469 | bool "Support SH7343 processor" | |
470 | select CPU_SH4AL_DSP | |
dc65a977 | 471 | select ARCH_SHMOBILE |
fbfa8934 | 472 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 PM |
473 | |
474 | config CPU_SUBTYPE_SH7722 | |
475 | bool "Support SH7722 processor" | |
476 | select CPU_SH4AL_DSP | |
477 | select CPU_SHX2 | |
dc65a977 | 478 | select ARCH_SHMOBILE |
b5f42db0 PM |
479 | select ARCH_SPARSEMEM_ENABLE |
480 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 481 | select SYS_SUPPORTS_SH_CMT |
ef97c3c1 | 482 | select PINCTRL |
9109a30e MD |
483 | |
484 | config CPU_SUBTYPE_SH7366 | |
485 | bool "Support SH7366 processor" | |
486 | select CPU_SH4AL_DSP | |
487 | select CPU_SHX2 | |
dc65a977 | 488 | select ARCH_SHMOBILE |
9109a30e MD |
489 | select ARCH_SPARSEMEM_ENABLE |
490 | select SYS_SUPPORTS_NUMA | |
fbfa8934 | 491 | select SYS_SUPPORTS_SH_CMT |
b5f42db0 | 492 | |
3cc000b5 PM |
493 | endchoice |
494 | ||
f3d22298 | 495 | source "arch/sh/mm/Kconfig" |
939a24a6 | 496 | |
4690bdc7 | 497 | source "arch/sh/Kconfig.cpu" |
f3d22298 | 498 | |
939a24a6 | 499 | source "arch/sh/boards/Kconfig" |
32351a28 | 500 | |
32351a28 PM |
501 | menu "Timer and clock configuration" |
502 | ||
cad82448 PM |
503 | config SH_PCLK_FREQ |
504 | int "Peripheral clock frequency (in Hz)" | |
8152a74b | 505 | depends on SH_CLK_CPG_LEGACY |
9d4436a6 | 506 | default "31250000" if CPU_SUBTYPE_SH7619 |
8152a74b PM |
507 | default "33333333" if CPU_SUBTYPE_SH7770 || \ |
508 | CPU_SUBTYPE_SH7760 || \ | |
509 | CPU_SUBTYPE_SH7705 || \ | |
510 | CPU_SUBTYPE_SH7203 || \ | |
511 | CPU_SUBTYPE_SH7206 || \ | |
512 | CPU_SUBTYPE_SH7263 || \ | |
43a1839c | 513 | CPU_SUBTYPE_MXG |
05627486 | 514 | default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R |
cad82448 | 515 | default "66000000" if CPU_SUBTYPE_SH4_202 |
05627486 | 516 | default "50000000" |
1da177e4 | 517 | help |
cad82448 PM |
518 | This option is used to specify the peripheral clock frequency. |
519 | This is necessary for determining the reference clock value on | |
520 | platforms lacking an RTC. | |
1da177e4 | 521 | |
36aa1e32 PM |
522 | config SH_CLK_CPG |
523 | def_bool y | |
524 | ||
253b0887 | 525 | config SH_CLK_CPG_LEGACY |
36aa1e32 | 526 | depends on SH_CLK_CPG |
43a1839c | 527 | def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \ |
51ce3068 | 528 | !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \ |
bcb86e0a PM |
529 | !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \ |
530 | !CPU_SUBTYPE_SH7269 | |
253b0887 | 531 | |
32351a28 PM |
532 | endmenu |
533 | ||
cad82448 | 534 | menu "CPU Frequency scaling" |
cad82448 | 535 | source "drivers/cpufreq/Kconfig" |
cad82448 PM |
536 | endmenu |
537 | ||
9f5e8eee PM |
538 | source "arch/sh/drivers/Kconfig" |
539 | ||
cad82448 | 540 | endmenu |
1da177e4 | 541 | |
cad82448 PM |
542 | menu "Kernel features" |
543 | ||
8636a1f9 | 544 | source "kernel/Kconfig.hz" |
91b91d01 | 545 | |
cad82448 PM |
546 | config KEXEC |
547 | bool "kexec system call (EXPERIMENTAL)" | |
37744fee | 548 | depends on MMU |
2965faa5 | 549 | select KEXEC_CORE |
1da177e4 | 550 | help |
cad82448 PM |
551 | kexec is a system call that implements the ability to shutdown your |
552 | current kernel, and to start another kernel. It is like a reboot | |
1f1332f7 | 553 | but it is independent of the system firmware. And like a reboot |
cad82448 PM |
554 | you can start any kernel with it, not just Linux. |
555 | ||
1f1332f7 | 556 | The name comes from the similarity to the exec system call. |
cad82448 PM |
557 | |
558 | It is an ongoing process to be certain the hardware in a machine | |
559 | is properly shutdown, so do not be surprised if this code does not | |
bf220695 GU |
560 | initially work for you. As of this writing the exact hardware |
561 | interface is strongly in flux, so no good recommendation can be | |
562 | made. | |
cad82448 | 563 | |
4d5ade5b PM |
564 | config CRASH_DUMP |
565 | bool "kernel crash dumps (EXPERIMENTAL)" | |
37744fee | 566 | depends on BROKEN_ON_SMP |
4d5ade5b PM |
567 | help |
568 | Generate crash dump after being started by kexec. | |
569 | This should be normally only set in special crash dump kernels | |
570 | which are loaded in the main kernel with kexec-tools into | |
571 | a specially reserved region and then later executed after | |
572 | a crash by kdump/kexec. The crash dump kernel must be compiled | |
573 | to a memory address not used by the main kernel using | |
e66ac3f2 | 574 | PHYSICAL_START. |
4d5ade5b | 575 | |
330d4810 | 576 | For more details see Documentation/admin-guide/kdump/kdump.rst |
4d5ade5b | 577 | |
b7cf6ddc MD |
578 | config KEXEC_JUMP |
579 | bool "kexec jump (EXPERIMENTAL)" | |
37744fee | 580 | depends on KEXEC && HIBERNATION |
b7cf6ddc MD |
581 | help |
582 | Jump between original kernel and kexeced kernel and invoke | |
583 | code via KEXEC | |
584 | ||
e66ac3f2 SH |
585 | config PHYSICAL_START |
586 | hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP) | |
587 | default MEMORY_START | |
a7f7f624 | 588 | help |
e66ac3f2 SH |
589 | This gives the physical address where the kernel is loaded |
590 | and is ordinarily the same as MEMORY_START. | |
591 | ||
592 | Different values are primarily used in the case of kexec on panic | |
593 | where the fail safe kernel needs to run at a different address | |
594 | than the panic-ed kernel. | |
595 | ||
1da177e4 LT |
596 | config SMP |
597 | bool "Symmetric multi-processing support" | |
357d5946 | 598 | depends on SYS_SUPPORTS_SMP |
a7f7f624 | 599 | help |
1da177e4 | 600 | This enables support for systems with more than one CPU. If you have |
4a474157 RG |
601 | a system with only one CPU, say N. If you have a system with more |
602 | than one CPU, say Y. | |
1da177e4 | 603 | |
4a474157 | 604 | If you say N here, the kernel will run on uni- and multiprocessor |
1da177e4 LT |
605 | machines, but will use only one CPU of a multiprocessor machine. If |
606 | you say Y here, the kernel will run on many, but not all, | |
4a474157 | 607 | uniprocessor machines. On a uniprocessor machine, the kernel |
1da177e4 LT |
608 | will run faster if you say N here. |
609 | ||
610 | People using multiprocessor machines who say Y here should also say | |
611 | Y to "Enhanced Real Time Clock Support", below. | |
612 | ||
4f4cfa6c | 613 | See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO |
91194e9b | 614 | available at <https://www.tldp.org/docs.html#howto>. |
1da177e4 LT |
615 | |
616 | If you don't know what to do here, say N. | |
617 | ||
618 | config NR_CPUS | |
619 | int "Maximum number of CPUs (2-32)" | |
620 | range 2 32 | |
621 | depends on SMP | |
2eb2a436 | 622 | default "4" if CPU_SUBTYPE_SHX3 |
1da177e4 LT |
623 | default "2" |
624 | help | |
625 | This allows you to specify the maximum number of CPUs which this | |
626 | kernel will support. The maximum supported value is 32 and the | |
627 | minimum value which makes sense is 2. | |
628 | ||
629 | This is purely to save memory - each supported CPU adds | |
630 | approximately eight kilobytes to the kernel image. | |
631 | ||
763142d1 PM |
632 | config HOTPLUG_CPU |
633 | bool "Support for hot-pluggable CPUs (EXPERIMENTAL)" | |
40b31360 | 634 | depends on SMP |
763142d1 PM |
635 | help |
636 | Say Y here to experiment with turning CPUs off and on. CPUs | |
637 | can be controlled through /sys/devices/system/cpu. | |
638 | ||
83662461 PM |
639 | config GUSA |
640 | def_bool y | |
37744fee | 641 | depends on !SMP |
83662461 PM |
642 | help |
643 | This enables support for gUSA (general UserSpace Atomicity). | |
644 | This is the default implementation for both UP and non-ll/sc | |
645 | CPUs, and is used by the libc, amongst others. | |
646 | ||
647 | For additional information, design information can be found | |
648 | in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>. | |
649 | ||
650 | This should only be disabled for special cases where alternate | |
651 | atomicity implementations exist. | |
652 | ||
1efe4ce3 SM |
653 | config GUSA_RB |
654 | bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)" | |
655 | depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A) | |
656 | help | |
657 | Enabling this option will allow the kernel to implement some | |
692105b8 | 658 | atomic operations using a software implementation of load-locked/ |
1efe4ce3 SM |
659 | store-conditional (LLSC). On machines which do not have hardware |
660 | LLSC, this should be more efficient than the other alternative of | |
692105b8 | 661 | disabling interrupts around the atomic sequence. |
1efe4ce3 | 662 | |
86c8c047 MF |
663 | config HW_PERF_EVENTS |
664 | bool "Enable hardware performance counter support for perf events" | |
665 | depends on PERF_EVENTS && CPU_HAS_PMU | |
666 | default y | |
667 | help | |
668 | Enable hardware performance counter support for perf events. If | |
669 | disabled, perf events will use software events only. | |
670 | ||
43b8774d PM |
671 | source "drivers/sh/Kconfig" |
672 | ||
cad82448 | 673 | endmenu |
1da177e4 | 674 | |
cad82448 | 675 | menu "Boot options" |
1da177e4 | 676 | |
190fe191 RF |
677 | config USE_BUILTIN_DTB |
678 | bool "Use builtin DTB" | |
679 | default n | |
680 | depends on SH_DEVICE_TREE | |
681 | help | |
682 | Link a device tree blob for particular hardware into the kernel, | |
683 | suppressing use of the DTB pointer provided by the bootloader. | |
684 | This option should only be used with legacy bootloaders that are | |
685 | not capable of providing a DTB to the kernel, or for experimental | |
686 | hardware without stable device tree bindings. | |
687 | ||
688 | config BUILTIN_DTB_SOURCE | |
689 | string "Source file for builtin DTB" | |
690 | default "" | |
691 | depends on USE_BUILTIN_DTB | |
692 | help | |
693 | Base name (without suffix, relative to arch/sh/boot/dts) for the | |
694 | a DTS file that will be used to produce the DTB linked into the | |
695 | kernel. | |
696 | ||
cad82448 | 697 | config ZERO_PAGE_OFFSET |
b412a49a PM |
698 | hex |
699 | default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \ | |
700 | SH_7751_SOLUTION_ENGINE | |
701 | default "0x00004000" if PAGE_SIZE_16KB || SH_SH03 | |
7a847f81 | 702 | default "0x00002000" if PAGE_SIZE_8KB |
cad82448 | 703 | default "0x00001000" |
1da177e4 | 704 | help |
cad82448 | 705 | This sets the default offset of zero page. |
1da177e4 | 706 | |
cad82448 | 707 | config BOOT_LINK_OFFSET |
b412a49a PM |
708 | hex |
709 | default "0x00210000" if SH_SHMIN | |
b412a49a PM |
710 | default "0x00810000" if SH_7780_SOLUTION_ENGINE |
711 | default "0x009e0000" if SH_TITAN | |
712 | default "0x01800000" if SH_SDK7780 | |
713 | default "0x02000000" if SH_EDOSK7760 | |
cad82448 PM |
714 | default "0x00800000" |
715 | help | |
716 | This option allows you to set the link address offset of the zImage. | |
717 | This can be useful if you are on a board which has a small amount of | |
718 | memory. | |
1da177e4 | 719 | |
b412a49a PM |
720 | config ENTRY_OFFSET |
721 | hex | |
722 | default "0x00001000" if PAGE_SIZE_4KB | |
723 | default "0x00002000" if PAGE_SIZE_8KB | |
724 | default "0x00004000" if PAGE_SIZE_16KB | |
725 | default "0x00010000" if PAGE_SIZE_64KB | |
726 | default "0x00000000" | |
727 | ||
4705b2e8 MD |
728 | config ROMIMAGE_MMCIF |
729 | bool "Include MMCIF loader in romImage (EXPERIMENTAL)" | |
0d57af1e | 730 | depends on CPU_SUBTYPE_SH7724 |
4705b2e8 MD |
731 | help |
732 | Say Y here to include experimental MMCIF loading code in | |
733 | romImage. With this enabled it is possible to write the romImage | |
734 | kernel image to an MMC card and boot the kernel straight from | |
735 | the reset vector. At reset the processor Mask ROM will load the | |
736 | first part of the romImage which in turn loads the rest the kernel | |
737 | image to RAM using the MMCIF hardware block. | |
738 | ||
d724a9c9 PM |
739 | choice |
740 | prompt "Kernel command line" | |
741 | optional | |
742 | default CMDLINE_OVERWRITE | |
743 | help | |
744 | Setting this option allows the kernel command line arguments | |
745 | to be set. | |
746 | ||
747 | config CMDLINE_OVERWRITE | |
748 | bool "Overwrite bootloader kernel arguments" | |
749 | help | |
750 | Given string will overwrite any arguments passed in by | |
751 | a bootloader. | |
752 | ||
753 | config CMDLINE_EXTEND | |
754 | bool "Extend bootloader kernel arguments" | |
755 | help | |
756 | Given string will be concatenated with arguments passed in | |
757 | by a bootloader. | |
758 | ||
759 | endchoice | |
1da177e4 | 760 | |
cad82448 | 761 | config CMDLINE |
d724a9c9 PM |
762 | string "Kernel command line arguments string" |
763 | depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND | |
cad82448 | 764 | default "console=ttySC1,115200" |
1da177e4 LT |
765 | |
766 | endmenu | |
767 | ||
cad82448 | 768 | menu "Bus options" |
1da177e4 | 769 | |
cad82448 PM |
770 | config SUPERHYWAY |
771 | tristate "SuperHyway Bus support" | |
772 | depends on CPU_SUBTYPE_SH4_202 | |
1da177e4 | 773 | |
17be2d2b | 774 | config MAPLE |
e16038ab PM |
775 | bool "Maple Bus support" |
776 | depends on SH_DREAMCAST | |
777 | help | |
778 | The Maple Bus is SEGA's serial communication bus for peripherals | |
779 | on the Dreamcast. Without this bus support you won't be able to | |
780 | get your Dreamcast keyboard etc to work, so most users | |
781 | probably want to say 'Y' here, unless you are only using the | |
782 | Dreamcast with a serial line terminal or a remote network | |
783 | connection. | |
17be2d2b | 784 | |
1da177e4 LT |
785 | endmenu |
786 | ||
3aa770e7 | 787 | menu "Power management options (EXPERIMENTAL)" |
f4cb5700 | 788 | |
c6f17cb2 MD |
789 | source "kernel/power/Kconfig" |
790 | ||
791 | source "drivers/cpuidle/Kconfig" | |
3aa770e7 | 792 | |
3aa770e7 | 793 | endmenu |