[linux-2.6-block.git] / arch / s390 / kvm / sigp.c

// SPDX-License-Identifier: GPL-2.0
/*
 * handling interprocessor communication
 *
 * Copyright IBM Corp. 2008, 2013
 *
 *    Author(s): Carsten Otte <cotte@de.ibm.com>
 *               Christian Borntraeger <borntraeger@de.ibm.com>
 *               Christian Ehrhardt <ehrhardt@de.ibm.com>
 */

#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/slab.h>
#include <asm/sigp.h>
#include "gaccess.h"
#include "kvm-s390.h"
#include "trace.h"

static int __sigp_sense(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu,
			u64 *reg)
{
	const bool stopped = kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_STOPPED);
	int rc;
	int ext_call_pending;

	ext_call_pending = kvm_s390_ext_call_pending(dst_vcpu);
	if (!stopped && !ext_call_pending)
		rc = SIGP_CC_ORDER_CODE_ACCEPTED;
	else {
		*reg &= 0xffffffff00000000UL;
		if (ext_call_pending)
			*reg |= SIGP_STATUS_EXT_CALL_PENDING;
		if (stopped)
			*reg |= SIGP_STATUS_STOPPED;
		rc = SIGP_CC_STATUS_STORED;
	}

	VCPU_EVENT(vcpu, 4, "sensed status of cpu %x rc %x", dst_vcpu->vcpu_id,
		   rc);
	return rc;
}

static int __inject_sigp_emergency(struct kvm_vcpu *vcpu,
				    struct kvm_vcpu *dst_vcpu)
{
	struct kvm_s390_irq irq = {
		.type = KVM_S390_INT_EMERGENCY,
		.u.emerg.code = vcpu->vcpu_id,
	};
	int rc = 0;

	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	if (!rc)
		VCPU_EVENT(vcpu, 4, "sent sigp emerg to cpu %x",
			   dst_vcpu->vcpu_id);

	return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
}

static int __sigp_emergency(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu)
{
	return __inject_sigp_emergency(vcpu, dst_vcpu);
}

static int __sigp_conditional_emergency(struct kvm_vcpu *vcpu,
					struct kvm_vcpu *dst_vcpu,
					u16 asn, u64 *reg)
{
	const u64 psw_int_mask = PSW_MASK_IO | PSW_MASK_EXT;
	u16 p_asn, s_asn;
	psw_t *psw;
	bool idle;

	idle = is_vcpu_idle(vcpu);
	psw = &dst_vcpu->arch.sie_block->gpsw;
	p_asn = dst_vcpu->arch.sie_block->gcr[4] & 0xffff;  /* Primary ASN */
	s_asn = dst_vcpu->arch.sie_block->gcr[3] & 0xffff;  /* Secondary ASN */

	/* Inject the emergency signal? */
	if (!is_vcpu_stopped(vcpu)
	    || (psw->mask & psw_int_mask) != psw_int_mask
	    || (idle && psw->addr != 0)
	    || (!idle && (asn == p_asn || asn == s_asn))) {
		return __inject_sigp_emergency(vcpu, dst_vcpu);
	} else {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_INCORRECT_STATE;
		return SIGP_CC_STATUS_STORED;
	}
}

static int __sigp_external_call(struct kvm_vcpu *vcpu,
				struct kvm_vcpu *dst_vcpu, u64 *reg)
{
	struct kvm_s390_irq irq = {
		.type = KVM_S390_INT_EXTERNAL_CALL,
		.u.extcall.code = vcpu->vcpu_id,
	};
	int rc;

	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	if (rc == -EBUSY) {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_EXT_CALL_PENDING;
		return SIGP_CC_STATUS_STORED;
	} else if (rc == 0) {
		VCPU_EVENT(vcpu, 4, "sent sigp ext call to cpu %x",
			   dst_vcpu->vcpu_id);
	}

	return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
}

static int __sigp_stop(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu)
{
	struct kvm_s390_irq irq = {
		.type = KVM_S390_SIGP_STOP,
	};
	int rc;

	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	if (rc == -EBUSY)
		rc = SIGP_CC_BUSY;
	else if (rc == 0)
		VCPU_EVENT(vcpu, 4, "sent sigp stop to cpu %x",
			   dst_vcpu->vcpu_id);

	return rc;
}

static int __sigp_stop_and_store_status(struct kvm_vcpu *vcpu,
					struct kvm_vcpu *dst_vcpu, u64 *reg)
{
	struct kvm_s390_irq irq = {
		.type = KVM_S390_SIGP_STOP,
		.u.stop.flags = KVM_S390_STOP_FLAG_STORE_STATUS,
	};
	int rc;

	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	if (rc == -EBUSY)
		rc = SIGP_CC_BUSY;
	else if (rc == 0)
		VCPU_EVENT(vcpu, 4, "sent sigp stop and store status to cpu %x",
			   dst_vcpu->vcpu_id);

	return rc;
}

static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter,
			   u64 *status_reg)
{
	*status_reg &= 0xffffffff00000000UL;

	/* Reject set arch order, with czam we're always in z/Arch mode. */
	*status_reg |= SIGP_STATUS_INVALID_PARAMETER;
	return SIGP_CC_STATUS_STORED;
}

static int __sigp_set_prefix(struct kvm_vcpu *vcpu, struct kvm_vcpu *dst_vcpu,
			     u32 address, u64 *reg)
{
	struct kvm_s390_irq irq = {
		.type = KVM_S390_SIGP_SET_PREFIX,
		.u.prefix.address = address & 0x7fffe000u,
	};
	int rc;

	/*
	 * Make sure the new value is valid memory. We only need to check the
	 * first page, since address is 8k aligned and memory pieces are always
	 * at least 1MB aligned and have at least a size of 1MB.
	 */
	if (!kvm_is_gpa_in_memslot(vcpu->kvm, irq.u.prefix.address)) {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_INVALID_PARAMETER;
		return SIGP_CC_STATUS_STORED;
	}

	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	if (rc == -EBUSY) {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_INCORRECT_STATE;
		return SIGP_CC_STATUS_STORED;
	}

	return rc;
}

static int __sigp_store_status_at_addr(struct kvm_vcpu *vcpu,
				       struct kvm_vcpu *dst_vcpu,
				       u32 addr, u64 *reg)
{
	int rc;

	if (!kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_STOPPED)) {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_INCORRECT_STATE;
		return SIGP_CC_STATUS_STORED;
	}

	addr &= 0x7ffffe00;
	rc = kvm_s390_store_status_unloaded(dst_vcpu, addr);
	if (rc == -EFAULT) {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_INVALID_PARAMETER;
		rc = SIGP_CC_STATUS_STORED;
	}
	return rc;
}

static int __sigp_sense_running(struct kvm_vcpu *vcpu,
				struct kvm_vcpu *dst_vcpu, u64 *reg)
{
	int rc;

	if (!test_kvm_facility(vcpu->kvm, 9)) {
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_INVALID_ORDER;
		return SIGP_CC_STATUS_STORED;
	}

	if (kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_RUNNING)) {
		/* running */
		rc = SIGP_CC_ORDER_CODE_ACCEPTED;
	} else {
		/* not running */
		*reg &= 0xffffffff00000000UL;
		*reg |= SIGP_STATUS_NOT_RUNNING;
		rc = SIGP_CC_STATUS_STORED;
	}

	VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x",
		   dst_vcpu->vcpu_id, rc);

	return rc;
}

static int __prepare_sigp_re_start(struct kvm_vcpu *vcpu,
				   struct kvm_vcpu *dst_vcpu, u8 order_code)
{
	struct kvm_s390_local_interrupt *li = &dst_vcpu->arch.local_int;
	/* handle (RE)START in user space */
	int rc = -EOPNOTSUPP;

	/* make sure we don't race with STOP irq injection */
	spin_lock(&li->lock);
	if (kvm_s390_is_stop_irq_pending(dst_vcpu))
		rc = SIGP_CC_BUSY;
	spin_unlock(&li->lock);

	return rc;
}

static int __prepare_sigp_cpu_reset(struct kvm_vcpu *vcpu,
				    struct kvm_vcpu *dst_vcpu, u8 order_code)
{
	/* handle (INITIAL) CPU RESET in user space */
	return -EOPNOTSUPP;
}

static int __prepare_sigp_unknown(struct kvm_vcpu *vcpu,
				  struct kvm_vcpu *dst_vcpu)
{
	/* handle unknown orders in user space */
	return -EOPNOTSUPP;
}

static int handle_sigp_dst(struct kvm_vcpu *vcpu, u8 order_code,
			   u16 cpu_addr, u32 parameter, u64 *status_reg)
{
	int rc;
	struct kvm_vcpu *dst_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);

	if (!dst_vcpu)
		return SIGP_CC_NOT_OPERATIONAL;

	/*
	 * SIGP RESTART, SIGP STOP, and SIGP STOP AND STORE STATUS orders
	 * are processed asynchronously. Until the affected VCPU finishes
	 * its work and calls back into KVM to clear the (RESTART or STOP)
	 * interrupt, we need to return any new non-reset orders "busy".
	 *
	 * This is important because a single VCPU could issue:
	 *  1) SIGP STOP $DESTINATION
	 *  2) SIGP SENSE $DESTINATION
	 *
	 * If the SIGP SENSE would not be rejected as "busy", it could
	 * return an incorrect answer as to whether the VCPU is STOPPED
	 * or OPERATING.
	 */
	if (order_code != SIGP_INITIAL_CPU_RESET &&
	    order_code != SIGP_CPU_RESET) {
		/*
		 * Lockless check. Both SIGP STOP and SIGP (RE)START
		 * properly synchronize everything while processing
		 * their orders, while the guest cannot observe a
		 * difference when issuing other orders from two
		 * different VCPUs.
		 */
		if (kvm_s390_is_stop_irq_pending(dst_vcpu) ||
		    kvm_s390_is_restart_irq_pending(dst_vcpu))
			return SIGP_CC_BUSY;
	}

	switch (order_code) {
	case SIGP_SENSE:
		vcpu->stat.instruction_sigp_sense++;
		rc = __sigp_sense(vcpu, dst_vcpu, status_reg);
		break;
	case SIGP_EXTERNAL_CALL:
		vcpu->stat.instruction_sigp_external_call++;
		rc = __sigp_external_call(vcpu, dst_vcpu, status_reg);
		break;
	case SIGP_EMERGENCY_SIGNAL:
		vcpu->stat.instruction_sigp_emergency++;
		rc = __sigp_emergency(vcpu, dst_vcpu);
		break;
	case SIGP_STOP:
		vcpu->stat.instruction_sigp_stop++;
		rc = __sigp_stop(vcpu, dst_vcpu);
		break;
	case SIGP_STOP_AND_STORE_STATUS:
		vcpu->stat.instruction_sigp_stop_store_status++;
		rc = __sigp_stop_and_store_status(vcpu, dst_vcpu, status_reg);
		break;
	case SIGP_STORE_STATUS_AT_ADDRESS:
		vcpu->stat.instruction_sigp_store_status++;
		rc = __sigp_store_status_at_addr(vcpu, dst_vcpu, parameter,
						 status_reg);
		break;
	case SIGP_SET_PREFIX:
		vcpu->stat.instruction_sigp_prefix++;
		rc = __sigp_set_prefix(vcpu, dst_vcpu, parameter, status_reg);
		break;
	case SIGP_COND_EMERGENCY_SIGNAL:
		vcpu->stat.instruction_sigp_cond_emergency++;
		rc = __sigp_conditional_emergency(vcpu, dst_vcpu, parameter,
						  status_reg);
		break;
	case SIGP_SENSE_RUNNING:
		vcpu->stat.instruction_sigp_sense_running++;
		rc = __sigp_sense_running(vcpu, dst_vcpu, status_reg);
		break;
	case SIGP_START:
		vcpu->stat.instruction_sigp_start++;
		rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
		break;
	case SIGP_RESTART:
		vcpu->stat.instruction_sigp_restart++;
		rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
		break;
	case SIGP_INITIAL_CPU_RESET:
		vcpu->stat.instruction_sigp_init_cpu_reset++;
		rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
		break;
	case SIGP_CPU_RESET:
		vcpu->stat.instruction_sigp_cpu_reset++;
		rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
		break;
	default:
		vcpu->stat.instruction_sigp_unknown++;
		rc = __prepare_sigp_unknown(vcpu, dst_vcpu);
	}

	if (rc == -EOPNOTSUPP)
		VCPU_EVENT(vcpu, 4,
			   "sigp order %u -> cpu %x: handled in user space",
			   order_code, dst_vcpu->vcpu_id);

	return rc;
}

static int handle_sigp_order_in_user_space(struct kvm_vcpu *vcpu, u8 order_code,
					   u16 cpu_addr)
{
	if (!vcpu->kvm->arch.user_sigp)
		return 0;

	switch (order_code) {
	case SIGP_SENSE:
	case SIGP_EXTERNAL_CALL:
	case SIGP_EMERGENCY_SIGNAL:
	case SIGP_COND_EMERGENCY_SIGNAL:
	case SIGP_SENSE_RUNNING:
		return 0;
	/* update counters as we're directly dropping to user space */
	case SIGP_STOP:
		vcpu->stat.instruction_sigp_stop++;
		break;
	case SIGP_STOP_AND_STORE_STATUS:
		vcpu->stat.instruction_sigp_stop_store_status++;
		break;
	case SIGP_STORE_STATUS_AT_ADDRESS:
		vcpu->stat.instruction_sigp_store_status++;
		break;
	case SIGP_STORE_ADDITIONAL_STATUS:
		vcpu->stat.instruction_sigp_store_adtl_status++;
		break;
	case SIGP_SET_PREFIX:
		vcpu->stat.instruction_sigp_prefix++;
		break;
	case SIGP_START:
		vcpu->stat.instruction_sigp_start++;
		break;
	case SIGP_RESTART:
		vcpu->stat.instruction_sigp_restart++;
		break;
	case SIGP_INITIAL_CPU_RESET:
		vcpu->stat.instruction_sigp_init_cpu_reset++;
		break;
	case SIGP_CPU_RESET:
		vcpu->stat.instruction_sigp_cpu_reset++;
		break;
	default:
		vcpu->stat.instruction_sigp_unknown++;
	}
	VCPU_EVENT(vcpu, 3, "SIGP: order %u for CPU %d handled in userspace",
		   order_code, cpu_addr);

	return 1;
}

int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
{
	int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
	int r3 = vcpu->arch.sie_block->ipa & 0x000f;
	u32 parameter;
	u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
	u8 order_code;
	int rc;

	/* sigp in userspace can exit */
	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
		return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);

	order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
	if (handle_sigp_order_in_user_space(vcpu, order_code, cpu_addr))
		return -EOPNOTSUPP;

	if (r1 % 2)
		parameter = vcpu->run->s.regs.gprs[r1];
	else
		parameter = vcpu->run->s.regs.gprs[r1 + 1];

	trace_kvm_s390_handle_sigp(vcpu, order_code, cpu_addr, parameter);
	switch (order_code) {
	case SIGP_SET_ARCHITECTURE:
		vcpu->stat.instruction_sigp_arch++;
		rc = __sigp_set_arch(vcpu, parameter,
				     &vcpu->run->s.regs.gprs[r1]);
		break;
	default:
		rc = handle_sigp_dst(vcpu, order_code, cpu_addr,
				     parameter,
				     &vcpu->run->s.regs.gprs[r1]);
	}

	if (rc < 0)
		return rc;

	kvm_s390_set_psw_cc(vcpu, rc);
	return 0;
}

/*
 * Handle SIGP partial execution interception.
 *
 * This interception will occur at the source cpu when a source cpu sends an
 * external call to a target cpu and the target cpu has the WAIT bit set in
 * its cpuflags. Interception will occur after the interrupt indicator bits at
 * the target cpu have been set. All error cases will lead to instruction
 * interception, therefore nothing is to be checked or prepared.
 */
int kvm_s390_handle_sigp_pei(struct kvm_vcpu *vcpu)
{
	int r3 = vcpu->arch.sie_block->ipa & 0x000f;
	u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
	struct kvm_vcpu *dest_vcpu;
	u8 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);

	if (order_code == SIGP_EXTERNAL_CALL) {
		trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr);

		dest_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
		BUG_ON(dest_vcpu == NULL);

		kvm_s390_vcpu_wakeup(dest_vcpu);
		kvm_s390_set_psw_cc(vcpu, SIGP_CC_ORDER_CODE_ACCEPTED);
		return 0;
	}

	return -EOPNOTSUPP;
}
Commit	Line	Data
d809aa23	1	// SPDX-License-Identifier: GPL-2.0
5288fbf0	2	/*
a53c8fab	3	* handling interprocessor communication
5288fbf0	4	*
b13d3580	5	* Copyright IBM Corp. 2008, 2013
5288fbf0	6	*
5288fbf0 CB	7	* Author(s): Carsten Otte <cotte@de.ibm.com>
5288fbf0 CB	8	* Christian Borntraeger <borntraeger@de.ibm.com>
9ace903d	9	* Christian Ehrhardt <ehrhardt@de.ibm.com>
5288fbf0 CB	10	*/
	11
	12	#include <linux/kvm.h>
	13	#include <linux/kvm_host.h>
5a0e3ad6	14	#include <linux/slab.h>
a9ae32c3	15	#include <asm/sigp.h>
5288fbf0 CB	16	#include "gaccess.h"
5288fbf0 CB	17	#include "kvm-s390.h"
5786fffa	18	#include "trace.h"
5288fbf0	19
3d95c7d2	20	static int __sigp_sense(struct kvm_vcpu vcpu, struct kvm_vcpu dst_vcpu,
5a32c1af	21	u64 *reg)
5288fbf0	22	{
8d5fb0dc	23	const bool stopped = kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_STOPPED);
5288fbf0	24	int rc;
ea5f4969	25	int ext_call_pending;
5288fbf0	26
ea5f4969	27	ext_call_pending = kvm_s390_ext_call_pending(dst_vcpu);
8d5fb0dc	28	if (!stopped && !ext_call_pending)
21b26c08 CH	29	rc = SIGP_CC_ORDER_CODE_ACCEPTED;
21b26c08 CH	30	else {
5288fbf0	31	*reg &= 0xffffffff00000000UL;
ea5f4969	32	if (ext_call_pending)
21b26c08	33	*reg \|= SIGP_STATUS_EXT_CALL_PENDING;
8d5fb0dc	34	if (stopped)
21b26c08	35	*reg \|= SIGP_STATUS_STOPPED;
ea1918dd	36	rc = SIGP_CC_STATUS_STORED;
5288fbf0	37	}
5288fbf0	38
3d95c7d2 DH	39	VCPU_EVENT(vcpu, 4, "sensed status of cpu %x rc %x", dst_vcpu->vcpu_id,
3d95c7d2 DH	40	rc);
5288fbf0 CB	41	return rc;
	42	}
	43
07b03035 DH	44	static int __inject_sigp_emergency(struct kvm_vcpu *vcpu,
07b03035 DH	45	struct kvm_vcpu *dst_vcpu)
5288fbf0	46	{
383d0b05	47	struct kvm_s390_irq irq = {
22ff4a33	48	.type = KVM_S390_INT_EMERGENCY,
383d0b05	49	.u.emerg.code = vcpu->vcpu_id,
22ff4a33	50	};
22ff4a33	51	int rc = 0;
5288fbf0	52
383d0b05	53	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
22ff4a33	54	if (!rc)
3d95c7d2 DH	55	VCPU_EVENT(vcpu, 4, "sent sigp emerg to cpu %x",
3d95c7d2 DH	56	dst_vcpu->vcpu_id);
5288fbf0	57
22ff4a33	58	return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
7697e71f CE	59	}
7697e71f CE	60
07b03035 DH	61	static int __sigp_emergency(struct kvm_vcpu vcpu, struct kvm_vcpu dst_vcpu)
	62	{
	63	return __inject_sigp_emergency(vcpu, dst_vcpu);
	64	}
	65
3d95c7d2 DH	66	static int __sigp_conditional_emergency(struct kvm_vcpu *vcpu,
3d95c7d2 DH	67	struct kvm_vcpu *dst_vcpu,
b13d3580 TH	68	u16 asn, u64 *reg)
b13d3580 TH	69	{
b13d3580 TH	70	const u64 psw_int_mask = PSW_MASK_IO \| PSW_MASK_EXT;
	71	u16 p_asn, s_asn;
	72	psw_t *psw;
94a15de8	73	bool idle;
b13d3580	74
94a15de8	75	idle = is_vcpu_idle(vcpu);
b13d3580 TH	76	psw = &dst_vcpu->arch.sie_block->gpsw;
	77	p_asn = dst_vcpu->arch.sie_block->gcr[4] & 0xffff; /* Primary ASN */
	78	s_asn = dst_vcpu->arch.sie_block->gcr[3] & 0xffff; /* Secondary ASN */
	79
07b03035	80	/* Inject the emergency signal? */
94a15de8	81	if (!is_vcpu_stopped(vcpu)
b13d3580	82	\|\| (psw->mask & psw_int_mask) != psw_int_mask
94a15de8 DH	83	\|\| (idle && psw->addr != 0)
94a15de8 DH	84	\|\| (!idle && (asn == p_asn \|\| asn == s_asn))) {
07b03035	85	return __inject_sigp_emergency(vcpu, dst_vcpu);
b13d3580 TH	86	} else {
	87	*reg &= 0xffffffff00000000UL;
	88	*reg \|= SIGP_STATUS_INCORRECT_STATE;
	89	return SIGP_CC_STATUS_STORED;
	90	}
	91	}
	92
3d95c7d2	93	static int __sigp_external_call(struct kvm_vcpu *vcpu,
ea5f4969	94	struct kvm_vcpu dst_vcpu, u64 reg)
7697e71f	95	{
383d0b05	96	struct kvm_s390_irq irq = {
22ff4a33	97	.type = KVM_S390_INT_EXTERNAL_CALL,
383d0b05	98	.u.extcall.code = vcpu->vcpu_id,
22ff4a33	99	};
22ff4a33	100	int rc;
7697e71f	101
383d0b05	102	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
ea5f4969 DH	103	if (rc == -EBUSY) {
	104	*reg &= 0xffffffff00000000UL;
	105	*reg \|= SIGP_STATUS_EXT_CALL_PENDING;
	106	return SIGP_CC_STATUS_STORED;
	107	} else if (rc == 0) {
3d95c7d2 DH	108	VCPU_EVENT(vcpu, 4, "sent sigp ext call to cpu %x",
3d95c7d2 DH	109	dst_vcpu->vcpu_id);
ea5f4969	110	}
7697e71f	111
22ff4a33	112	return rc ? rc : SIGP_CC_ORDER_CODE_ACCEPTED;
5288fbf0 CB	113	}
5288fbf0 CB	114
a6cc3108	115	static int __sigp_stop(struct kvm_vcpu vcpu, struct kvm_vcpu dst_vcpu)
9ace903d	116	{
6cddd432 DH	117	struct kvm_s390_irq irq = {
	118	.type = KVM_S390_SIGP_STOP,
	119	};
9ace903d CE	120	int rc;
9ace903d CE	121
6cddd432 DH	122	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	123	if (rc == -EBUSY)
	124	rc = SIGP_CC_BUSY;
	125	else if (rc == 0)
	126	VCPU_EVENT(vcpu, 4, "sent sigp stop to cpu %x",
	127	dst_vcpu->vcpu_id);
e879892c	128
a6cc3108 DH	129	return rc;
	130	}
	131
	132	static int __sigp_stop_and_store_status(struct kvm_vcpu *vcpu,
	133	struct kvm_vcpu dst_vcpu, u64 reg)
	134	{
6cddd432 DH	135	struct kvm_s390_irq irq = {
	136	.type = KVM_S390_SIGP_STOP,
	137	.u.stop.flags = KVM_S390_STOP_FLAG_STORE_STATUS,
	138	};
a6cc3108 DH	139	int rc;
a6cc3108 DH	140
6cddd432 DH	141	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
	142	if (rc == -EBUSY)
	143	rc = SIGP_CC_BUSY;
	144	else if (rc == 0)
	145	VCPU_EVENT(vcpu, 4, "sent sigp stop and store status to cpu %x",
	146	dst_vcpu->vcpu_id);
e879892c	147
5288fbf0 CB	148	return rc;
	149	}
	150
b697e435 JH	151	static int __sigp_set_arch(struct kvm_vcpu *vcpu, u32 parameter,
b697e435 JH	152	u64 *status_reg)
5288fbf0	153	{
b697e435 JH	154	*status_reg &= 0xffffffff00000000UL;
	155
	156	/* Reject set arch order, with czam we're always in z/Arch mode. */
8eeba194	157	*status_reg \|= SIGP_STATUS_INVALID_PARAMETER;
b697e435	158	return SIGP_CC_STATUS_STORED;
5288fbf0 CB	159	}
5288fbf0 CB	160
3d95c7d2 DH	161	static int __sigp_set_prefix(struct kvm_vcpu vcpu, struct kvm_vcpu dst_vcpu,
3d95c7d2 DH	162	u32 address, u64 *reg)
5288fbf0	163	{
a3a9c59a DH	164	struct kvm_s390_irq irq = {
	165	.type = KVM_S390_SIGP_SET_PREFIX,
	166	.u.prefix.address = address & 0x7fffe000u,
	167	};
5288fbf0	168	int rc;
5288fbf0	169
665170cb HC	170	/*
	171	* Make sure the new value is valid memory. We only need to check the
	172	* first page, since address is 8k aligned and memory pieces are always
	173	* at least 1MB aligned and have at least a size of 1MB.
	174	*/
9e7325ac	175	if (!kvm_is_gpa_in_memslot(vcpu->kvm, irq.u.prefix.address)) {
0744426e	176	*reg &= 0xffffffff00000000UL;
a9ae32c3	177	*reg \|= SIGP_STATUS_INVALID_PARAMETER;
ea1918dd	178	return SIGP_CC_STATUS_STORED;
5288fbf0 CB	179	}
5288fbf0 CB	180
a3a9c59a DH	181	rc = kvm_s390_inject_vcpu(dst_vcpu, &irq);
a3a9c59a DH	182	if (rc == -EBUSY) {
0744426e HC	183	*reg &= 0xffffffff00000000UL;
0744426e HC	184	*reg \|= SIGP_STATUS_INCORRECT_STATE;
a3a9c59a	185	return SIGP_CC_STATUS_STORED;
5288fbf0 CB	186	}
5288fbf0 CB	187
5288fbf0 CB	188	return rc;
	189	}
	190
3d95c7d2 DH	191	static int __sigp_store_status_at_addr(struct kvm_vcpu *vcpu,
	192	struct kvm_vcpu *dst_vcpu,
	193	u32 addr, u64 *reg)
00e9e435	194	{
00e9e435 TH	195	int rc;
00e9e435 TH	196
8d5fb0dc	197	if (!kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_STOPPED)) {
00e9e435 TH	198	*reg &= 0xffffffff00000000UL;
	199	*reg \|= SIGP_STATUS_INCORRECT_STATE;
	200	return SIGP_CC_STATUS_STORED;
	201	}
	202
	203	addr &= 0x7ffffe00;
	204	rc = kvm_s390_store_status_unloaded(dst_vcpu, addr);
	205	if (rc == -EFAULT) {
	206	*reg &= 0xffffffff00000000UL;
	207	*reg \|= SIGP_STATUS_INVALID_PARAMETER;
	208	rc = SIGP_CC_STATUS_STORED;
	209	}
	210	return rc;
	211	}
	212
3d95c7d2 DH	213	static int __sigp_sense_running(struct kvm_vcpu *vcpu,
3d95c7d2 DH	214	struct kvm_vcpu dst_vcpu, u64 reg)
bd59d3a4 CH	215	{
bd59d3a4 CH	216	int rc;
bd59d3a4	217
bd50e8ec DH	218	if (!test_kvm_facility(vcpu->kvm, 9)) {
	219	*reg &= 0xffffffff00000000UL;
	220	*reg \|= SIGP_STATUS_INVALID_ORDER;
	221	return SIGP_CC_STATUS_STORED;
	222	}
	223
8d5fb0dc	224	if (kvm_s390_test_cpuflags(dst_vcpu, CPUSTAT_RUNNING)) {
1ee0bc55 JF	225	/* running */
	226	rc = SIGP_CC_ORDER_CODE_ACCEPTED;
	227	} else {
	228	/* not running */
	229	*reg &= 0xffffffff00000000UL;
	230	*reg \|= SIGP_STATUS_NOT_RUNNING;
	231	rc = SIGP_CC_STATUS_STORED;
bd59d3a4	232	}
bd59d3a4	233
3d95c7d2 DH	234	VCPU_EVENT(vcpu, 4, "sensed running status of cpu %x rc %x",
3d95c7d2 DH	235	dst_vcpu->vcpu_id, rc);
bd59d3a4 CH	236
	237	return rc;
	238	}
	239
b8983830 DH	240	static int __prepare_sigp_re_start(struct kvm_vcpu *vcpu,
b8983830 DH	241	struct kvm_vcpu *dst_vcpu, u8 order_code)
151104a7	242	{
3d95c7d2	243	struct kvm_s390_local_interrupt *li = &dst_vcpu->arch.local_int;
b8983830 DH	244	/* handle (RE)START in user space */
b8983830 DH	245	int rc = -EOPNOTSUPP;
151104a7	246
6cddd432	247	/* make sure we don't race with STOP irq injection */
4ae3c081	248	spin_lock(&li->lock);
6cddd432	249	if (kvm_s390_is_stop_irq_pending(dst_vcpu))
ea1918dd	250	rc = SIGP_CC_BUSY;
4ae3c081	251	spin_unlock(&li->lock);
1ee0bc55	252
151104a7 JF	253	return rc;
	254	}
	255
b8983830 DH	256	static int __prepare_sigp_cpu_reset(struct kvm_vcpu *vcpu,
	257	struct kvm_vcpu *dst_vcpu, u8 order_code)
	258	{
	259	/* handle (INITIAL) CPU RESET in user space */
	260	return -EOPNOTSUPP;
	261	}
	262
	263	static int __prepare_sigp_unknown(struct kvm_vcpu *vcpu,
	264	struct kvm_vcpu *dst_vcpu)
	265	{
	266	/* handle unknown orders in user space */
	267	return -EOPNOTSUPP;
	268	}
	269
3526a66b DH	270	static int handle_sigp_dst(struct kvm_vcpu *vcpu, u8 order_code,
3526a66b DH	271	u16 cpu_addr, u32 parameter, u64 *status_reg)
5288fbf0	272	{
5288fbf0	273	int rc;
152e9f65	274	struct kvm_vcpu *dst_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
3d95c7d2	275
3d95c7d2 DH	276	if (!dst_vcpu)
3d95c7d2 DH	277	return SIGP_CC_NOT_OPERATIONAL;
5288fbf0	278
812de046 EF	279	/*
	280	* SIGP RESTART, SIGP STOP, and SIGP STOP AND STORE STATUS orders
	281	* are processed asynchronously. Until the affected VCPU finishes
	282	* its work and calls back into KVM to clear the (RESTART or STOP)
	283	* interrupt, we need to return any new non-reset orders "busy".
	284	*
	285	* This is important because a single VCPU could issue:
	286	* 1) SIGP STOP $DESTINATION
	287	* 2) SIGP SENSE $DESTINATION
	288	*
	289	* If the SIGP SENSE would not be rejected as "busy", it could
	290	* return an incorrect answer as to whether the VCPU is STOPPED
	291	* or OPERATING.
	292	*/
	293	if (order_code != SIGP_INITIAL_CPU_RESET &&
	294	order_code != SIGP_CPU_RESET) {
	295	/*
	296	* Lockless check. Both SIGP STOP and SIGP (RE)START
	297	* properly synchronize everything while processing
	298	* their orders, while the guest cannot observe a
	299	* difference when issuing other orders from two
	300	* different VCPUs.
	301	*/
	302	if (kvm_s390_is_stop_irq_pending(dst_vcpu) \|\|
	303	kvm_s390_is_restart_irq_pending(dst_vcpu))
	304	return SIGP_CC_BUSY;
	305	}
	306
5288fbf0 CB	307	switch (order_code) {
	308	case SIGP_SENSE:
	309	vcpu->stat.instruction_sigp_sense++;
3d95c7d2	310	rc = __sigp_sense(vcpu, dst_vcpu, status_reg);
5288fbf0	311	break;
7697e71f CE	312	case SIGP_EXTERNAL_CALL:
7697e71f CE	313	vcpu->stat.instruction_sigp_external_call++;
ea5f4969	314	rc = __sigp_external_call(vcpu, dst_vcpu, status_reg);
7697e71f	315	break;
a9ae32c3	316	case SIGP_EMERGENCY_SIGNAL:
5288fbf0	317	vcpu->stat.instruction_sigp_emergency++;
3d95c7d2	318	rc = __sigp_emergency(vcpu, dst_vcpu);
5288fbf0 CB	319	break;
	320	case SIGP_STOP:
	321	vcpu->stat.instruction_sigp_stop++;
a6cc3108	322	rc = __sigp_stop(vcpu, dst_vcpu);
5288fbf0	323	break;
a9ae32c3	324	case SIGP_STOP_AND_STORE_STATUS:
42cb0c9f	325	vcpu->stat.instruction_sigp_stop_store_status++;
a6cc3108	326	rc = __sigp_stop_and_store_status(vcpu, dst_vcpu, status_reg);
5288fbf0	327	break;
00e9e435	328	case SIGP_STORE_STATUS_AT_ADDRESS:
42cb0c9f	329	vcpu->stat.instruction_sigp_store_status++;
3d95c7d2	330	rc = __sigp_store_status_at_addr(vcpu, dst_vcpu, parameter,
3526a66b	331	status_reg);
5288fbf0 CB	332	break;
	333	case SIGP_SET_PREFIX:
	334	vcpu->stat.instruction_sigp_prefix++;
3d95c7d2	335	rc = __sigp_set_prefix(vcpu, dst_vcpu, parameter, status_reg);
5288fbf0	336	break;
b13d3580	337	case SIGP_COND_EMERGENCY_SIGNAL:
42cb0c9f	338	vcpu->stat.instruction_sigp_cond_emergency++;
3d95c7d2	339	rc = __sigp_conditional_emergency(vcpu, dst_vcpu, parameter,
3526a66b	340	status_reg);
b13d3580	341	break;
bd59d3a4 CH	342	case SIGP_SENSE_RUNNING:
bd59d3a4 CH	343	vcpu->stat.instruction_sigp_sense_running++;
3d95c7d2	344	rc = __sigp_sense_running(vcpu, dst_vcpu, status_reg);
bd59d3a4	345	break;
58bc33b2	346	case SIGP_START:
42cb0c9f	347	vcpu->stat.instruction_sigp_start++;
b8983830	348	rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
58bc33b2	349	break;
5288fbf0 CB	350	case SIGP_RESTART:
5288fbf0 CB	351	vcpu->stat.instruction_sigp_restart++;
b8983830 DH	352	rc = __prepare_sigp_re_start(vcpu, dst_vcpu, order_code);
	353	break;
	354	case SIGP_INITIAL_CPU_RESET:
42cb0c9f	355	vcpu->stat.instruction_sigp_init_cpu_reset++;
b8983830 DH	356	rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
	357	break;
	358	case SIGP_CPU_RESET:
42cb0c9f	359	vcpu->stat.instruction_sigp_cpu_reset++;
b8983830	360	rc = __prepare_sigp_cpu_reset(vcpu, dst_vcpu, order_code);
cc92d6de	361	break;
5288fbf0	362	default:
42cb0c9f	363	vcpu->stat.instruction_sigp_unknown++;
b8983830	364	rc = __prepare_sigp_unknown(vcpu, dst_vcpu);
3526a66b DH	365	}
3526a66b DH	366
b8983830 DH	367	if (rc == -EOPNOTSUPP)
	368	VCPU_EVENT(vcpu, 4,
	369	"sigp order %u -> cpu %x: handled in user space",
	370	order_code, dst_vcpu->vcpu_id);
	371
3526a66b DH	372	return rc;
	373	}
	374
7cbde76b CB	375	static int handle_sigp_order_in_user_space(struct kvm_vcpu *vcpu, u8 order_code,
7cbde76b CB	376	u16 cpu_addr)
2444b352 DH	377	{
	378	if (!vcpu->kvm->arch.user_sigp)
	379	return 0;
	380
	381	switch (order_code) {
	382	case SIGP_SENSE:
	383	case SIGP_EXTERNAL_CALL:
	384	case SIGP_EMERGENCY_SIGNAL:
	385	case SIGP_COND_EMERGENCY_SIGNAL:
	386	case SIGP_SENSE_RUNNING:
	387	return 0;
	388	/* update counters as we're directly dropping to user space */
	389	case SIGP_STOP:
	390	vcpu->stat.instruction_sigp_stop++;
	391	break;
	392	case SIGP_STOP_AND_STORE_STATUS:
	393	vcpu->stat.instruction_sigp_stop_store_status++;
	394	break;
	395	case SIGP_STORE_STATUS_AT_ADDRESS:
	396	vcpu->stat.instruction_sigp_store_status++;
	397	break;
cd7b4b61 EF	398	case SIGP_STORE_ADDITIONAL_STATUS:
	399	vcpu->stat.instruction_sigp_store_adtl_status++;
	400	break;
2444b352 DH	401	case SIGP_SET_PREFIX:
	402	vcpu->stat.instruction_sigp_prefix++;
	403	break;
	404	case SIGP_START:
	405	vcpu->stat.instruction_sigp_start++;
	406	break;
	407	case SIGP_RESTART:
	408	vcpu->stat.instruction_sigp_restart++;
	409	break;
	410	case SIGP_INITIAL_CPU_RESET:
	411	vcpu->stat.instruction_sigp_init_cpu_reset++;
	412	break;
	413	case SIGP_CPU_RESET:
	414	vcpu->stat.instruction_sigp_cpu_reset++;
	415	break;
	416	default:
	417	vcpu->stat.instruction_sigp_unknown++;
	418	}
7cbde76b CB	419	VCPU_EVENT(vcpu, 3, "SIGP: order %u for CPU %d handled in userspace",
7cbde76b CB	420	order_code, cpu_addr);
2444b352 DH	421
	422	return 1;
	423	}
	424
3526a66b DH	425	int kvm_s390_handle_sigp(struct kvm_vcpu *vcpu)
	426	{
	427	int r1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
	428	int r3 = vcpu->arch.sie_block->ipa & 0x000f;
	429	u32 parameter;
	430	u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
	431	u8 order_code;
	432	int rc;
	433
	434	/* sigp in userspace can exit */
	435	if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
	436	return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
	437
8ae04b8f	438	order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
7cbde76b	439	if (handle_sigp_order_in_user_space(vcpu, order_code, cpu_addr))
2444b352	440	return -EOPNOTSUPP;
3526a66b DH	441
	442	if (r1 % 2)
	443	parameter = vcpu->run->s.regs.gprs[r1];
	444	else
	445	parameter = vcpu->run->s.regs.gprs[r1 + 1];
	446
	447	trace_kvm_s390_handle_sigp(vcpu, order_code, cpu_addr, parameter);
	448	switch (order_code) {
	449	case SIGP_SET_ARCHITECTURE:
	450	vcpu->stat.instruction_sigp_arch++;
b697e435 JH	451	rc = __sigp_set_arch(vcpu, parameter,
b697e435 JH	452	&vcpu->run->s.regs.gprs[r1]);
3526a66b DH	453	break;
	454	default:
	455	rc = handle_sigp_dst(vcpu, order_code, cpu_addr,
	456	parameter,
	457	&vcpu->run->s.regs.gprs[r1]);
5288fbf0 CB	458	}
	459
	460	if (rc < 0)
	461	return rc;
	462
949c007a	463	kvm_s390_set_psw_cc(vcpu, rc);
5288fbf0 CB	464	return 0;
5288fbf0 CB	465	}
4953919f DH	466
	467	/*
	468	* Handle SIGP partial execution interception.
	469	*
	470	* This interception will occur at the source cpu when a source cpu sends an
	471	* external call to a target cpu and the target cpu has the WAIT bit set in
cada938a	472	* its cpuflags. Interception will occur after the interrupt indicator bits at
4953919f DH	473	* the target cpu have been set. All error cases will lead to instruction
	474	* interception, therefore nothing is to be checked or prepared.
	475	*/
	476	int kvm_s390_handle_sigp_pei(struct kvm_vcpu *vcpu)
	477	{
	478	int r3 = vcpu->arch.sie_block->ipa & 0x000f;
	479	u16 cpu_addr = vcpu->run->s.regs.gprs[r3];
	480	struct kvm_vcpu *dest_vcpu;
8ae04b8f	481	u8 order_code = kvm_s390_get_base_disp_rs(vcpu, NULL);
4953919f	482
4953919f	483	if (order_code == SIGP_EXTERNAL_CALL) {
c3f0e5fd NB	484	trace_kvm_s390_handle_sigp_pei(vcpu, order_code, cpu_addr);
c3f0e5fd NB	485
152e9f65	486	dest_vcpu = kvm_get_vcpu_by_id(vcpu->kvm, cpu_addr);
4953919f DH	487	BUG_ON(dest_vcpu == NULL);
4953919f DH	488
0e9c85a5	489	kvm_s390_vcpu_wakeup(dest_vcpu);
4953919f DH	490	kvm_s390_set_psw_cc(vcpu, SIGP_CC_ORDER_CODE_ACCEPTED);
	491	return 0;
	492	}
	493
	494	return -EOPNOTSUPP;
	495	}