Commit | Line | Data |
---|---|---|
453423dc | 1 | /* |
a53c8fab | 2 | * handling privileged instructions |
453423dc | 3 | * |
69d0d3a3 | 4 | * Copyright IBM Corp. 2008, 2013 |
453423dc CB |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License (version 2 only) | |
8 | * as published by the Free Software Foundation. | |
9 | * | |
10 | * Author(s): Carsten Otte <cotte@de.ibm.com> | |
11 | * Christian Borntraeger <borntraeger@de.ibm.com> | |
12 | */ | |
13 | ||
14 | #include <linux/kvm.h> | |
5a0e3ad6 | 15 | #include <linux/gfp.h> |
453423dc | 16 | #include <linux/errno.h> |
b13b5dc7 | 17 | #include <linux/compat.h> |
7c959e82 | 18 | #include <asm/asm-offsets.h> |
e769ece3 | 19 | #include <asm/facility.h> |
453423dc CB |
20 | #include <asm/current.h> |
21 | #include <asm/debug.h> | |
22 | #include <asm/ebcdic.h> | |
23 | #include <asm/sysinfo.h> | |
69d0d3a3 CB |
24 | #include <asm/pgtable.h> |
25 | #include <asm/pgalloc.h> | |
26 | #include <asm/io.h> | |
48a3e950 CH |
27 | #include <asm/ptrace.h> |
28 | #include <asm/compat.h> | |
453423dc CB |
29 | #include "gaccess.h" |
30 | #include "kvm-s390.h" | |
5786fffa | 31 | #include "trace.h" |
453423dc | 32 | |
6a3f95a6 TH |
33 | /* Handle SCK (SET CLOCK) interception */ |
34 | static int handle_set_clock(struct kvm_vcpu *vcpu) | |
35 | { | |
25ed1675 | 36 | int rc; |
8ae04b8f | 37 | ar_t ar; |
25ed1675 | 38 | u64 op2, val; |
6a3f95a6 TH |
39 | |
40 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
41 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
42 | ||
8ae04b8f | 43 | op2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
6a3f95a6 TH |
44 | if (op2 & 7) /* Operand must be on a doubleword boundary */ |
45 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
8ae04b8f | 46 | rc = read_guest(vcpu, op2, ar, &val, sizeof(val)); |
0e7a3f94 HC |
47 | if (rc) |
48 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
6a3f95a6 | 49 | |
7cbde76b | 50 | VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", val); |
25ed1675 | 51 | kvm_s390_set_tod_clock(vcpu->kvm, val); |
6a3f95a6 TH |
52 | |
53 | kvm_s390_set_psw_cc(vcpu, 0); | |
54 | return 0; | |
55 | } | |
56 | ||
453423dc CB |
57 | static int handle_set_prefix(struct kvm_vcpu *vcpu) |
58 | { | |
453423dc | 59 | u64 operand2; |
665170cb HC |
60 | u32 address; |
61 | int rc; | |
8ae04b8f | 62 | ar_t ar; |
453423dc CB |
63 | |
64 | vcpu->stat.instruction_spx++; | |
65 | ||
5087dfa6 TH |
66 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
67 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
68 | ||
8ae04b8f | 69 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc CB |
70 | |
71 | /* must be word boundary */ | |
db4a29cb HC |
72 | if (operand2 & 3) |
73 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc CB |
74 | |
75 | /* get the value */ | |
8ae04b8f | 76 | rc = read_guest(vcpu, operand2, ar, &address, sizeof(address)); |
665170cb HC |
77 | if (rc) |
78 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
79 | ||
80 | address &= 0x7fffe000u; | |
81 | ||
82 | /* | |
83 | * Make sure the new value is valid memory. We only need to check the | |
84 | * first page, since address is 8k aligned and memory pieces are always | |
85 | * at least 1MB aligned and have at least a size of 1MB. | |
86 | */ | |
87 | if (kvm_is_error_gpa(vcpu->kvm, address)) | |
db4a29cb | 88 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
453423dc | 89 | |
8d26cf7b | 90 | kvm_s390_set_prefix(vcpu, address); |
5786fffa | 91 | trace_kvm_s390_handle_prefix(vcpu, 1, address); |
453423dc CB |
92 | return 0; |
93 | } | |
94 | ||
95 | static int handle_store_prefix(struct kvm_vcpu *vcpu) | |
96 | { | |
453423dc CB |
97 | u64 operand2; |
98 | u32 address; | |
f748f4a7 | 99 | int rc; |
8ae04b8f | 100 | ar_t ar; |
453423dc CB |
101 | |
102 | vcpu->stat.instruction_stpx++; | |
b1c571a5 | 103 | |
5087dfa6 TH |
104 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
105 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
106 | ||
8ae04b8f | 107 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc CB |
108 | |
109 | /* must be word boundary */ | |
db4a29cb HC |
110 | if (operand2 & 3) |
111 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc | 112 | |
fda902cb | 113 | address = kvm_s390_get_prefix(vcpu); |
453423dc CB |
114 | |
115 | /* get the value */ | |
8ae04b8f | 116 | rc = write_guest(vcpu, operand2, ar, &address, sizeof(address)); |
f748f4a7 HC |
117 | if (rc) |
118 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 119 | |
7cbde76b | 120 | VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2); |
5786fffa | 121 | trace_kvm_s390_handle_prefix(vcpu, 0, address); |
453423dc CB |
122 | return 0; |
123 | } | |
124 | ||
125 | static int handle_store_cpu_address(struct kvm_vcpu *vcpu) | |
126 | { | |
8b96de0e HC |
127 | u16 vcpu_id = vcpu->vcpu_id; |
128 | u64 ga; | |
129 | int rc; | |
8ae04b8f | 130 | ar_t ar; |
453423dc CB |
131 | |
132 | vcpu->stat.instruction_stap++; | |
b1c571a5 | 133 | |
5087dfa6 TH |
134 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
135 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
136 | ||
8ae04b8f | 137 | ga = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc | 138 | |
8b96de0e | 139 | if (ga & 1) |
db4a29cb | 140 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
453423dc | 141 | |
8ae04b8f | 142 | rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id)); |
8b96de0e HC |
143 | if (rc) |
144 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 145 | |
7cbde76b | 146 | VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga); |
8b96de0e | 147 | trace_kvm_s390_handle_stap(vcpu, ga); |
453423dc CB |
148 | return 0; |
149 | } | |
150 | ||
3ac8e380 | 151 | static int __skey_check_enable(struct kvm_vcpu *vcpu) |
693ffc08 | 152 | { |
3ac8e380 | 153 | int rc = 0; |
693ffc08 | 154 | if (!(vcpu->arch.sie_block->ictl & (ICTL_ISKE | ICTL_SSKE | ICTL_RRBE))) |
3ac8e380 | 155 | return rc; |
693ffc08 | 156 | |
3ac8e380 | 157 | rc = s390_enable_skey(); |
7cbde76b | 158 | VCPU_EVENT(vcpu, 3, "%s", "enabling storage keys for guest"); |
693ffc08 DD |
159 | trace_kvm_s390_skey_related_inst(vcpu); |
160 | vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE); | |
3ac8e380 | 161 | return rc; |
693ffc08 DD |
162 | } |
163 | ||
164 | ||
453423dc CB |
165 | static int handle_skey(struct kvm_vcpu *vcpu) |
166 | { | |
3ac8e380 | 167 | int rc = __skey_check_enable(vcpu); |
693ffc08 | 168 | |
3ac8e380 DD |
169 | if (rc) |
170 | return rc; | |
453423dc | 171 | vcpu->stat.instruction_storage_key++; |
5087dfa6 TH |
172 | |
173 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
174 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
175 | ||
0e8bc06a | 176 | kvm_s390_retry_instr(vcpu); |
453423dc CB |
177 | VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation"); |
178 | return 0; | |
179 | } | |
180 | ||
8a242234 HC |
181 | static int handle_ipte_interlock(struct kvm_vcpu *vcpu) |
182 | { | |
8a242234 | 183 | vcpu->stat.instruction_ipte_interlock++; |
04b41acd | 184 | if (psw_bits(vcpu->arch.sie_block->gpsw).p) |
8a242234 HC |
185 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
186 | wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu)); | |
0e8bc06a | 187 | kvm_s390_retry_instr(vcpu); |
8a242234 HC |
188 | VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation"); |
189 | return 0; | |
190 | } | |
191 | ||
aca84241 TH |
192 | static int handle_test_block(struct kvm_vcpu *vcpu) |
193 | { | |
aca84241 TH |
194 | gpa_t addr; |
195 | int reg2; | |
196 | ||
197 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
198 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
199 | ||
200 | kvm_s390_get_regs_rre(vcpu, NULL, ®2); | |
201 | addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
e45efa28 | 202 | addr = kvm_s390_logical_to_effective(vcpu, addr); |
dd9e5b7b | 203 | if (kvm_s390_check_low_addr_prot_real(vcpu, addr)) |
e45efa28 | 204 | return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); |
aca84241 TH |
205 | addr = kvm_s390_real_to_abs(vcpu, addr); |
206 | ||
ef23e779 | 207 | if (kvm_is_error_gpa(vcpu->kvm, addr)) |
aca84241 TH |
208 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
209 | /* | |
210 | * We don't expect errors on modern systems, and do not care | |
211 | * about storage keys (yet), so let's just clear the page. | |
212 | */ | |
ef23e779 | 213 | if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE)) |
aca84241 TH |
214 | return -EFAULT; |
215 | kvm_s390_set_psw_cc(vcpu, 0); | |
216 | vcpu->run->s.regs.gprs[0] = 0; | |
217 | return 0; | |
218 | } | |
219 | ||
fa6b7fe9 | 220 | static int handle_tpi(struct kvm_vcpu *vcpu) |
453423dc | 221 | { |
fa6b7fe9 | 222 | struct kvm_s390_interrupt_info *inti; |
4799b557 HC |
223 | unsigned long len; |
224 | u32 tpi_data[3]; | |
261520dc | 225 | int rc; |
7c959e82 | 226 | u64 addr; |
8ae04b8f | 227 | ar_t ar; |
fa6b7fe9 | 228 | |
8ae04b8f | 229 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
db4a29cb HC |
230 | if (addr & 3) |
231 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
261520dc | 232 | |
f092669e | 233 | inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0); |
261520dc DH |
234 | if (!inti) { |
235 | kvm_s390_set_psw_cc(vcpu, 0); | |
236 | return 0; | |
237 | } | |
238 | ||
4799b557 HC |
239 | tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr; |
240 | tpi_data[1] = inti->io.io_int_parm; | |
241 | tpi_data[2] = inti->io.io_int_word; | |
7c959e82 HC |
242 | if (addr) { |
243 | /* | |
244 | * Store the two-word I/O interruption code into the | |
245 | * provided area. | |
246 | */ | |
4799b557 | 247 | len = sizeof(tpi_data) - 4; |
8ae04b8f | 248 | rc = write_guest(vcpu, addr, ar, &tpi_data, len); |
261520dc DH |
249 | if (rc) { |
250 | rc = kvm_s390_inject_prog_cond(vcpu, rc); | |
251 | goto reinject_interrupt; | |
252 | } | |
7c959e82 HC |
253 | } else { |
254 | /* | |
255 | * Store the three-word I/O interruption code into | |
256 | * the appropriate lowcore area. | |
257 | */ | |
4799b557 | 258 | len = sizeof(tpi_data); |
261520dc DH |
259 | if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) { |
260 | /* failed writes to the low core are not recoverable */ | |
4799b557 | 261 | rc = -EFAULT; |
261520dc DH |
262 | goto reinject_interrupt; |
263 | } | |
7c959e82 | 264 | } |
261520dc DH |
265 | |
266 | /* irq was successfully handed to the guest */ | |
267 | kfree(inti); | |
268 | kvm_s390_set_psw_cc(vcpu, 1); | |
269 | return 0; | |
270 | reinject_interrupt: | |
2f32d4ea CH |
271 | /* |
272 | * If we encounter a problem storing the interruption code, the | |
273 | * instruction is suppressed from the guest's view: reinject the | |
274 | * interrupt. | |
275 | */ | |
15462e37 DH |
276 | if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) { |
277 | kfree(inti); | |
278 | rc = -EFAULT; | |
279 | } | |
261520dc | 280 | /* don't set the cc, a pgm irq was injected or we drop to user space */ |
4799b557 | 281 | return rc ? -EFAULT : 0; |
453423dc CB |
282 | } |
283 | ||
fa6b7fe9 CH |
284 | static int handle_tsch(struct kvm_vcpu *vcpu) |
285 | { | |
6d3da241 JF |
286 | struct kvm_s390_interrupt_info *inti = NULL; |
287 | const u64 isc_mask = 0xffUL << 24; /* all iscs set */ | |
fa6b7fe9 | 288 | |
6d3da241 JF |
289 | /* a valid schid has at least one bit set */ |
290 | if (vcpu->run->s.regs.gprs[1]) | |
291 | inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask, | |
292 | vcpu->run->s.regs.gprs[1]); | |
fa6b7fe9 CH |
293 | |
294 | /* | |
295 | * Prepare exit to userspace. | |
296 | * We indicate whether we dequeued a pending I/O interrupt | |
297 | * so that userspace can re-inject it if the instruction gets | |
298 | * a program check. While this may re-order the pending I/O | |
299 | * interrupts, this is no problem since the priority is kept | |
300 | * intact. | |
301 | */ | |
302 | vcpu->run->exit_reason = KVM_EXIT_S390_TSCH; | |
303 | vcpu->run->s390_tsch.dequeued = !!inti; | |
304 | if (inti) { | |
305 | vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id; | |
306 | vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr; | |
307 | vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm; | |
308 | vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word; | |
309 | } | |
310 | vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb; | |
311 | kfree(inti); | |
312 | return -EREMOTE; | |
313 | } | |
314 | ||
315 | static int handle_io_inst(struct kvm_vcpu *vcpu) | |
316 | { | |
317 | VCPU_EVENT(vcpu, 4, "%s", "I/O instruction"); | |
318 | ||
5087dfa6 TH |
319 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
320 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
321 | ||
fa6b7fe9 CH |
322 | if (vcpu->kvm->arch.css_support) { |
323 | /* | |
324 | * Most I/O instructions will be handled by userspace. | |
325 | * Exceptions are tpi and the interrupt portion of tsch. | |
326 | */ | |
327 | if (vcpu->arch.sie_block->ipa == 0xb236) | |
328 | return handle_tpi(vcpu); | |
329 | if (vcpu->arch.sie_block->ipa == 0xb235) | |
330 | return handle_tsch(vcpu); | |
331 | /* Handle in userspace. */ | |
332 | return -EOPNOTSUPP; | |
333 | } else { | |
334 | /* | |
b4a96015 | 335 | * Set condition code 3 to stop the guest from issuing channel |
fa6b7fe9 CH |
336 | * I/O instructions. |
337 | */ | |
ea828ebf | 338 | kvm_s390_set_psw_cc(vcpu, 3); |
fa6b7fe9 CH |
339 | return 0; |
340 | } | |
341 | } | |
342 | ||
453423dc CB |
343 | static int handle_stfl(struct kvm_vcpu *vcpu) |
344 | { | |
453423dc | 345 | int rc; |
9d8d5786 | 346 | unsigned int fac; |
453423dc CB |
347 | |
348 | vcpu->stat.instruction_stfl++; | |
5087dfa6 TH |
349 | |
350 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
351 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
352 | ||
9d8d5786 MM |
353 | /* |
354 | * We need to shift the lower 32 facility bits (bit 0-31) from a u64 | |
355 | * into a u32 memory representation. They will remain bits 0-31. | |
356 | */ | |
c54f0d6a | 357 | fac = *vcpu->kvm->arch.model.fac_list >> 32; |
c667aeac | 358 | rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list), |
9d8d5786 | 359 | &fac, sizeof(fac)); |
dc5008b9 | 360 | if (rc) |
0f9701c6 | 361 | return rc; |
7cbde76b | 362 | VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac); |
9d8d5786 | 363 | trace_kvm_s390_handle_stfl(vcpu, fac); |
453423dc CB |
364 | return 0; |
365 | } | |
366 | ||
48a3e950 CH |
367 | #define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA) |
368 | #define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL | |
d21683ea | 369 | #define PSW_ADDR_24 0x0000000000ffffffUL |
48a3e950 CH |
370 | #define PSW_ADDR_31 0x000000007fffffffUL |
371 | ||
a3fb577e TH |
372 | int is_valid_psw(psw_t *psw) |
373 | { | |
3736b874 HC |
374 | if (psw->mask & PSW_MASK_UNASSIGNED) |
375 | return 0; | |
376 | if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) { | |
377 | if (psw->addr & ~PSW_ADDR_31) | |
378 | return 0; | |
379 | } | |
380 | if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24)) | |
381 | return 0; | |
382 | if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA) | |
383 | return 0; | |
a3fb577e TH |
384 | if (psw->addr & 1) |
385 | return 0; | |
3736b874 HC |
386 | return 1; |
387 | } | |
388 | ||
48a3e950 CH |
389 | int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu) |
390 | { | |
3736b874 | 391 | psw_t *gpsw = &vcpu->arch.sie_block->gpsw; |
48a3e950 | 392 | psw_compat_t new_psw; |
3736b874 | 393 | u64 addr; |
2d8bcaed | 394 | int rc; |
8ae04b8f | 395 | ar_t ar; |
48a3e950 | 396 | |
3736b874 | 397 | if (gpsw->mask & PSW_MASK_PSTATE) |
208dd756 TH |
398 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
399 | ||
8ae04b8f | 400 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
6fd0fcc9 HC |
401 | if (addr & 7) |
402 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
2d8bcaed | 403 | |
8ae04b8f | 404 | rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); |
2d8bcaed HC |
405 | if (rc) |
406 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
6fd0fcc9 HC |
407 | if (!(new_psw.mask & PSW32_MASK_BASE)) |
408 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
3736b874 HC |
409 | gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32; |
410 | gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE; | |
411 | gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE; | |
412 | if (!is_valid_psw(gpsw)) | |
6fd0fcc9 | 413 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
48a3e950 CH |
414 | return 0; |
415 | } | |
416 | ||
417 | static int handle_lpswe(struct kvm_vcpu *vcpu) | |
418 | { | |
48a3e950 | 419 | psw_t new_psw; |
3736b874 | 420 | u64 addr; |
2d8bcaed | 421 | int rc; |
8ae04b8f | 422 | ar_t ar; |
48a3e950 | 423 | |
5087dfa6 TH |
424 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
425 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
426 | ||
8ae04b8f | 427 | addr = kvm_s390_get_base_disp_s(vcpu, &ar); |
6fd0fcc9 HC |
428 | if (addr & 7) |
429 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
8ae04b8f | 430 | rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw)); |
2d8bcaed HC |
431 | if (rc) |
432 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
3736b874 HC |
433 | vcpu->arch.sie_block->gpsw = new_psw; |
434 | if (!is_valid_psw(&vcpu->arch.sie_block->gpsw)) | |
6fd0fcc9 | 435 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
48a3e950 CH |
436 | return 0; |
437 | } | |
438 | ||
453423dc CB |
439 | static int handle_stidp(struct kvm_vcpu *vcpu) |
440 | { | |
7d777d78 | 441 | u64 stidp_data = vcpu->arch.stidp_data; |
453423dc | 442 | u64 operand2; |
7d777d78 | 443 | int rc; |
8ae04b8f | 444 | ar_t ar; |
453423dc CB |
445 | |
446 | vcpu->stat.instruction_stidp++; | |
b1c571a5 | 447 | |
5087dfa6 TH |
448 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
449 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
450 | ||
8ae04b8f | 451 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
453423dc | 452 | |
db4a29cb HC |
453 | if (operand2 & 7) |
454 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
453423dc | 455 | |
8ae04b8f | 456 | rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data)); |
7d777d78 HC |
457 | if (rc) |
458 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
453423dc | 459 | |
7cbde76b | 460 | VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data); |
453423dc CB |
461 | return 0; |
462 | } | |
463 | ||
464 | static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem) | |
465 | { | |
453423dc CB |
466 | int cpus = 0; |
467 | int n; | |
468 | ||
ff520a63 | 469 | cpus = atomic_read(&vcpu->kvm->online_vcpus); |
453423dc CB |
470 | |
471 | /* deal with other level 3 hypervisors */ | |
caf757c6 | 472 | if (stsi(mem, 3, 2, 2)) |
453423dc CB |
473 | mem->count = 0; |
474 | if (mem->count < 8) | |
475 | mem->count++; | |
476 | for (n = mem->count - 1; n > 0 ; n--) | |
477 | memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0])); | |
478 | ||
b75f4c9a | 479 | memset(&mem->vm[0], 0, sizeof(mem->vm[0])); |
453423dc CB |
480 | mem->vm[0].cpus_total = cpus; |
481 | mem->vm[0].cpus_configured = cpus; | |
482 | mem->vm[0].cpus_standby = 0; | |
483 | mem->vm[0].cpus_reserved = 0; | |
484 | mem->vm[0].caf = 1000; | |
485 | memcpy(mem->vm[0].name, "KVMguest", 8); | |
486 | ASCEBC(mem->vm[0].name, 8); | |
487 | memcpy(mem->vm[0].cpi, "KVM/Linux ", 16); | |
488 | ASCEBC(mem->vm[0].cpi, 16); | |
489 | } | |
490 | ||
e44fc8c9 ET |
491 | static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, ar_t ar, |
492 | u8 fc, u8 sel1, u16 sel2) | |
493 | { | |
494 | vcpu->run->exit_reason = KVM_EXIT_S390_STSI; | |
495 | vcpu->run->s390_stsi.addr = addr; | |
496 | vcpu->run->s390_stsi.ar = ar; | |
497 | vcpu->run->s390_stsi.fc = fc; | |
498 | vcpu->run->s390_stsi.sel1 = sel1; | |
499 | vcpu->run->s390_stsi.sel2 = sel2; | |
500 | } | |
501 | ||
453423dc CB |
502 | static int handle_stsi(struct kvm_vcpu *vcpu) |
503 | { | |
5a32c1af CB |
504 | int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28; |
505 | int sel1 = vcpu->run->s.regs.gprs[0] & 0xff; | |
506 | int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff; | |
c51f068c | 507 | unsigned long mem = 0; |
453423dc | 508 | u64 operand2; |
db4a29cb | 509 | int rc = 0; |
8ae04b8f | 510 | ar_t ar; |
453423dc CB |
511 | |
512 | vcpu->stat.instruction_stsi++; | |
7cbde76b | 513 | VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2); |
453423dc | 514 | |
5087dfa6 TH |
515 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
516 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
517 | ||
87d41fb4 | 518 | if (fc > 3) { |
ea828ebf | 519 | kvm_s390_set_psw_cc(vcpu, 3); |
87d41fb4 TH |
520 | return 0; |
521 | } | |
453423dc | 522 | |
87d41fb4 TH |
523 | if (vcpu->run->s.regs.gprs[0] & 0x0fffff00 |
524 | || vcpu->run->s.regs.gprs[1] & 0xffff0000) | |
453423dc CB |
525 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
526 | ||
87d41fb4 | 527 | if (fc == 0) { |
5a32c1af | 528 | vcpu->run->s.regs.gprs[0] = 3 << 28; |
ea828ebf | 529 | kvm_s390_set_psw_cc(vcpu, 0); |
453423dc | 530 | return 0; |
87d41fb4 TH |
531 | } |
532 | ||
8ae04b8f | 533 | operand2 = kvm_s390_get_base_disp_s(vcpu, &ar); |
87d41fb4 TH |
534 | |
535 | if (operand2 & 0xfff) | |
536 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
537 | ||
538 | switch (fc) { | |
453423dc CB |
539 | case 1: /* same handling for 1 and 2 */ |
540 | case 2: | |
541 | mem = get_zeroed_page(GFP_KERNEL); | |
542 | if (!mem) | |
c51f068c | 543 | goto out_no_data; |
caf757c6 | 544 | if (stsi((void *) mem, fc, sel1, sel2)) |
c51f068c | 545 | goto out_no_data; |
453423dc CB |
546 | break; |
547 | case 3: | |
548 | if (sel1 != 2 || sel2 != 2) | |
c51f068c | 549 | goto out_no_data; |
453423dc CB |
550 | mem = get_zeroed_page(GFP_KERNEL); |
551 | if (!mem) | |
c51f068c | 552 | goto out_no_data; |
453423dc CB |
553 | handle_stsi_3_2_2(vcpu, (void *) mem); |
554 | break; | |
453423dc CB |
555 | } |
556 | ||
8ae04b8f | 557 | rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE); |
645c5bc1 HC |
558 | if (rc) { |
559 | rc = kvm_s390_inject_prog_cond(vcpu, rc); | |
560 | goto out; | |
453423dc | 561 | } |
e44fc8c9 ET |
562 | if (vcpu->kvm->arch.user_stsi) { |
563 | insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2); | |
564 | rc = -EREMOTE; | |
565 | } | |
5786fffa | 566 | trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2); |
453423dc | 567 | free_page(mem); |
ea828ebf | 568 | kvm_s390_set_psw_cc(vcpu, 0); |
5a32c1af | 569 | vcpu->run->s.regs.gprs[0] = 0; |
e44fc8c9 | 570 | return rc; |
c51f068c | 571 | out_no_data: |
ea828ebf | 572 | kvm_s390_set_psw_cc(vcpu, 3); |
645c5bc1 | 573 | out: |
c51f068c | 574 | free_page(mem); |
db4a29cb | 575 | return rc; |
453423dc CB |
576 | } |
577 | ||
f379aae5 | 578 | static const intercept_handler_t b2_handlers[256] = { |
453423dc | 579 | [0x02] = handle_stidp, |
6a3f95a6 | 580 | [0x04] = handle_set_clock, |
453423dc CB |
581 | [0x10] = handle_set_prefix, |
582 | [0x11] = handle_store_prefix, | |
583 | [0x12] = handle_store_cpu_address, | |
8a242234 | 584 | [0x21] = handle_ipte_interlock, |
453423dc CB |
585 | [0x29] = handle_skey, |
586 | [0x2a] = handle_skey, | |
587 | [0x2b] = handle_skey, | |
aca84241 | 588 | [0x2c] = handle_test_block, |
f379aae5 CH |
589 | [0x30] = handle_io_inst, |
590 | [0x31] = handle_io_inst, | |
591 | [0x32] = handle_io_inst, | |
592 | [0x33] = handle_io_inst, | |
593 | [0x34] = handle_io_inst, | |
594 | [0x35] = handle_io_inst, | |
595 | [0x36] = handle_io_inst, | |
596 | [0x37] = handle_io_inst, | |
597 | [0x38] = handle_io_inst, | |
598 | [0x39] = handle_io_inst, | |
599 | [0x3a] = handle_io_inst, | |
600 | [0x3b] = handle_io_inst, | |
601 | [0x3c] = handle_io_inst, | |
8a242234 | 602 | [0x50] = handle_ipte_interlock, |
f379aae5 CH |
603 | [0x5f] = handle_io_inst, |
604 | [0x74] = handle_io_inst, | |
605 | [0x76] = handle_io_inst, | |
453423dc CB |
606 | [0x7d] = handle_stsi, |
607 | [0xb1] = handle_stfl, | |
48a3e950 | 608 | [0xb2] = handle_lpswe, |
453423dc CB |
609 | }; |
610 | ||
70455a36 | 611 | int kvm_s390_handle_b2(struct kvm_vcpu *vcpu) |
453423dc CB |
612 | { |
613 | intercept_handler_t handler; | |
614 | ||
70455a36 | 615 | /* |
5087dfa6 TH |
616 | * A lot of B2 instructions are priviledged. Here we check for |
617 | * the privileged ones, that we can handle in the kernel. | |
618 | * Anything else goes to userspace. | |
619 | */ | |
f379aae5 | 620 | handler = b2_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; |
5087dfa6 TH |
621 | if (handler) |
622 | return handler(vcpu); | |
623 | ||
b8e660b8 | 624 | return -EOPNOTSUPP; |
453423dc | 625 | } |
bb25b9ba | 626 | |
48a3e950 CH |
627 | static int handle_epsw(struct kvm_vcpu *vcpu) |
628 | { | |
629 | int reg1, reg2; | |
630 | ||
aeb87c3c | 631 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); |
48a3e950 CH |
632 | |
633 | /* This basically extracts the mask half of the psw. */ | |
843200e7 | 634 | vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL; |
48a3e950 CH |
635 | vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32; |
636 | if (reg2) { | |
843200e7 | 637 | vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL; |
48a3e950 | 638 | vcpu->run->s.regs.gprs[reg2] |= |
843200e7 | 639 | vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL; |
48a3e950 CH |
640 | } |
641 | return 0; | |
642 | } | |
643 | ||
69d0d3a3 CB |
644 | #define PFMF_RESERVED 0xfffc0101UL |
645 | #define PFMF_SK 0x00020000UL | |
646 | #define PFMF_CF 0x00010000UL | |
647 | #define PFMF_UI 0x00008000UL | |
648 | #define PFMF_FSC 0x00007000UL | |
649 | #define PFMF_NQ 0x00000800UL | |
650 | #define PFMF_MR 0x00000400UL | |
651 | #define PFMF_MC 0x00000200UL | |
652 | #define PFMF_KEY 0x000000feUL | |
653 | ||
654 | static int handle_pfmf(struct kvm_vcpu *vcpu) | |
655 | { | |
656 | int reg1, reg2; | |
657 | unsigned long start, end; | |
658 | ||
659 | vcpu->stat.instruction_pfmf++; | |
660 | ||
661 | kvm_s390_get_regs_rre(vcpu, ®1, ®2); | |
662 | ||
03c02807 | 663 | if (!test_kvm_facility(vcpu->kvm, 8)) |
69d0d3a3 CB |
664 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); |
665 | ||
666 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
208dd756 | 667 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
69d0d3a3 CB |
668 | |
669 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED) | |
670 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
671 | ||
672 | /* Only provide non-quiescing support if the host supports it */ | |
e769ece3 | 673 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ && !test_facility(14)) |
69d0d3a3 CB |
674 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
675 | ||
676 | /* No support for conditional-SSKE */ | |
677 | if (vcpu->run->s.regs.gprs[reg1] & (PFMF_MR | PFMF_MC)) | |
678 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
679 | ||
680 | start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK; | |
a02689fe | 681 | start = kvm_s390_logical_to_effective(vcpu, start); |
fb34c603 | 682 | |
69d0d3a3 CB |
683 | switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) { |
684 | case 0x00000000: | |
685 | end = (start + (1UL << 12)) & ~((1UL << 12) - 1); | |
686 | break; | |
687 | case 0x00001000: | |
688 | end = (start + (1UL << 20)) & ~((1UL << 20) - 1); | |
689 | break; | |
69d0d3a3 | 690 | case 0x00002000: |
53df84f8 GH |
691 | /* only support 2G frame size if EDAT2 is available and we are |
692 | not in 24-bit addressing mode */ | |
693 | if (!test_kvm_facility(vcpu->kvm, 78) || | |
694 | psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_AMODE_24BIT) | |
695 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
69d0d3a3 | 696 | end = (start + (1UL << 31)) & ~((1UL << 31) - 1); |
53df84f8 | 697 | break; |
69d0d3a3 CB |
698 | default: |
699 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
700 | } | |
a02689fe TH |
701 | |
702 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { | |
dd9e5b7b | 703 | if (kvm_s390_check_low_addr_prot_real(vcpu, start)) |
a02689fe TH |
704 | return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm); |
705 | } | |
706 | ||
69d0d3a3 | 707 | while (start < end) { |
fb34c603 TH |
708 | unsigned long useraddr, abs_addr; |
709 | ||
710 | /* Translate guest address to host address */ | |
711 | if ((vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) == 0) | |
712 | abs_addr = kvm_s390_real_to_abs(vcpu, start); | |
713 | else | |
714 | abs_addr = start; | |
715 | useraddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(abs_addr)); | |
716 | if (kvm_is_error_hva(useraddr)) | |
69d0d3a3 CB |
717 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); |
718 | ||
719 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) { | |
720 | if (clear_user((void __user *)useraddr, PAGE_SIZE)) | |
721 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
722 | } | |
723 | ||
724 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) { | |
3ac8e380 DD |
725 | int rc = __skey_check_enable(vcpu); |
726 | ||
727 | if (rc) | |
728 | return rc; | |
69d0d3a3 CB |
729 | if (set_guest_storage_key(current->mm, useraddr, |
730 | vcpu->run->s.regs.gprs[reg1] & PFMF_KEY, | |
731 | vcpu->run->s.regs.gprs[reg1] & PFMF_NQ)) | |
732 | return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
733 | } | |
734 | ||
735 | start += PAGE_SIZE; | |
736 | } | |
737 | if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) | |
738 | vcpu->run->s.regs.gprs[reg2] = end; | |
739 | return 0; | |
740 | } | |
741 | ||
b31288fa KW |
742 | static int handle_essa(struct kvm_vcpu *vcpu) |
743 | { | |
744 | /* entries expected to be 1FF */ | |
745 | int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3; | |
746 | unsigned long *cbrlo, cbrle; | |
747 | struct gmap *gmap; | |
748 | int i; | |
749 | ||
7cbde76b | 750 | VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries); |
b31288fa KW |
751 | gmap = vcpu->arch.gmap; |
752 | vcpu->stat.instruction_essa++; | |
e6db1d61 | 753 | if (!vcpu->kvm->arch.use_cmma) |
b31288fa KW |
754 | return kvm_s390_inject_program_int(vcpu, PGM_OPERATION); |
755 | ||
756 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
757 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
758 | ||
759 | if (((vcpu->arch.sie_block->ipb & 0xf0000000) >> 28) > 6) | |
760 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
761 | ||
0e8bc06a DH |
762 | /* Retry the ESSA instruction */ |
763 | kvm_s390_retry_instr(vcpu); | |
b31288fa KW |
764 | vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */ |
765 | cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo); | |
766 | down_read(&gmap->mm->mmap_sem); | |
767 | for (i = 0; i < entries; ++i) { | |
768 | cbrle = cbrlo[i]; | |
769 | if (unlikely(cbrle & ~PAGE_MASK || cbrle < 2 * PAGE_SIZE)) | |
770 | /* invalid entry */ | |
771 | break; | |
772 | /* try to free backing */ | |
6e0a0431 | 773 | __gmap_zap(gmap, cbrle); |
b31288fa KW |
774 | } |
775 | up_read(&gmap->mm->mmap_sem); | |
776 | if (i < entries) | |
777 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
778 | return 0; | |
779 | } | |
780 | ||
48a3e950 | 781 | static const intercept_handler_t b9_handlers[256] = { |
8a242234 | 782 | [0x8a] = handle_ipte_interlock, |
48a3e950 | 783 | [0x8d] = handle_epsw, |
8a242234 HC |
784 | [0x8e] = handle_ipte_interlock, |
785 | [0x8f] = handle_ipte_interlock, | |
b31288fa | 786 | [0xab] = handle_essa, |
69d0d3a3 | 787 | [0xaf] = handle_pfmf, |
48a3e950 CH |
788 | }; |
789 | ||
790 | int kvm_s390_handle_b9(struct kvm_vcpu *vcpu) | |
791 | { | |
792 | intercept_handler_t handler; | |
793 | ||
794 | /* This is handled just as for the B2 instructions. */ | |
795 | handler = b9_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; | |
5087dfa6 TH |
796 | if (handler) |
797 | return handler(vcpu); | |
798 | ||
48a3e950 CH |
799 | return -EOPNOTSUPP; |
800 | } | |
801 | ||
953ed88d TH |
802 | int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu) |
803 | { | |
804 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
805 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
806 | int reg, rc, nr_regs; |
807 | u32 ctl_array[16]; | |
f987a3ee | 808 | u64 ga; |
8ae04b8f | 809 | ar_t ar; |
953ed88d TH |
810 | |
811 | vcpu->stat.instruction_lctl++; | |
812 | ||
813 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
814 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
815 | ||
8ae04b8f | 816 | ga = kvm_s390_get_base_disp_rs(vcpu, &ar); |
953ed88d | 817 | |
f987a3ee | 818 | if (ga & 3) |
953ed88d TH |
819 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
820 | ||
7cbde76b | 821 | VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
f987a3ee | 822 | trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga); |
953ed88d | 823 | |
fc56eb66 | 824 | nr_regs = ((reg3 - reg1) & 0xf) + 1; |
8ae04b8f | 825 | rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); |
fc56eb66 HC |
826 | if (rc) |
827 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
953ed88d | 828 | reg = reg1; |
fc56eb66 | 829 | nr_regs = 0; |
953ed88d | 830 | do { |
953ed88d | 831 | vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul; |
fc56eb66 | 832 | vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++]; |
953ed88d TH |
833 | if (reg == reg3) |
834 | break; | |
835 | reg = (reg + 1) % 16; | |
836 | } while (1); | |
2dca485f | 837 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
953ed88d TH |
838 | return 0; |
839 | } | |
840 | ||
aba07508 DH |
841 | int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu) |
842 | { | |
843 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
844 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
845 | int reg, rc, nr_regs; |
846 | u32 ctl_array[16]; | |
aba07508 | 847 | u64 ga; |
8ae04b8f | 848 | ar_t ar; |
aba07508 DH |
849 | |
850 | vcpu->stat.instruction_stctl++; | |
851 | ||
852 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
853 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
854 | ||
8ae04b8f | 855 | ga = kvm_s390_get_base_disp_rs(vcpu, &ar); |
aba07508 DH |
856 | |
857 | if (ga & 3) | |
858 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
859 | ||
7cbde76b | 860 | VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
aba07508 DH |
861 | trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga); |
862 | ||
863 | reg = reg1; | |
fc56eb66 | 864 | nr_regs = 0; |
aba07508 | 865 | do { |
fc56eb66 | 866 | ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; |
aba07508 DH |
867 | if (reg == reg3) |
868 | break; | |
869 | reg = (reg + 1) % 16; | |
870 | } while (1); | |
8ae04b8f | 871 | rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32)); |
fc56eb66 | 872 | return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; |
aba07508 DH |
873 | } |
874 | ||
953ed88d TH |
875 | static int handle_lctlg(struct kvm_vcpu *vcpu) |
876 | { | |
877 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
878 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
879 | int reg, rc, nr_regs; |
880 | u64 ctl_array[16]; | |
881 | u64 ga; | |
8ae04b8f | 882 | ar_t ar; |
953ed88d TH |
883 | |
884 | vcpu->stat.instruction_lctlg++; | |
885 | ||
886 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
887 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
888 | ||
8ae04b8f | 889 | ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); |
953ed88d | 890 | |
f987a3ee | 891 | if (ga & 7) |
953ed88d TH |
892 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); |
893 | ||
7cbde76b | 894 | VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
f987a3ee | 895 | trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga); |
953ed88d | 896 | |
fc56eb66 | 897 | nr_regs = ((reg3 - reg1) & 0xf) + 1; |
8ae04b8f | 898 | rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); |
fc56eb66 HC |
899 | if (rc) |
900 | return kvm_s390_inject_prog_cond(vcpu, rc); | |
901 | reg = reg1; | |
902 | nr_regs = 0; | |
953ed88d | 903 | do { |
fc56eb66 | 904 | vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++]; |
953ed88d TH |
905 | if (reg == reg3) |
906 | break; | |
907 | reg = (reg + 1) % 16; | |
908 | } while (1); | |
2dca485f | 909 | kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu); |
953ed88d TH |
910 | return 0; |
911 | } | |
912 | ||
aba07508 DH |
913 | static int handle_stctg(struct kvm_vcpu *vcpu) |
914 | { | |
915 | int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4; | |
916 | int reg3 = vcpu->arch.sie_block->ipa & 0x000f; | |
fc56eb66 HC |
917 | int reg, rc, nr_regs; |
918 | u64 ctl_array[16]; | |
919 | u64 ga; | |
8ae04b8f | 920 | ar_t ar; |
aba07508 DH |
921 | |
922 | vcpu->stat.instruction_stctg++; | |
923 | ||
924 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
925 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
926 | ||
8ae04b8f | 927 | ga = kvm_s390_get_base_disp_rsy(vcpu, &ar); |
aba07508 DH |
928 | |
929 | if (ga & 7) | |
930 | return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION); | |
931 | ||
7cbde76b | 932 | VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga); |
aba07508 DH |
933 | trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga); |
934 | ||
fc56eb66 HC |
935 | reg = reg1; |
936 | nr_regs = 0; | |
aba07508 | 937 | do { |
fc56eb66 | 938 | ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg]; |
aba07508 DH |
939 | if (reg == reg3) |
940 | break; | |
941 | reg = (reg + 1) % 16; | |
942 | } while (1); | |
8ae04b8f | 943 | rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64)); |
fc56eb66 | 944 | return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0; |
aba07508 DH |
945 | } |
946 | ||
f379aae5 | 947 | static const intercept_handler_t eb_handlers[256] = { |
953ed88d | 948 | [0x2f] = handle_lctlg, |
aba07508 | 949 | [0x25] = handle_stctg, |
f379aae5 CH |
950 | }; |
951 | ||
953ed88d | 952 | int kvm_s390_handle_eb(struct kvm_vcpu *vcpu) |
f379aae5 CH |
953 | { |
954 | intercept_handler_t handler; | |
955 | ||
f379aae5 CH |
956 | handler = eb_handlers[vcpu->arch.sie_block->ipb & 0xff]; |
957 | if (handler) | |
958 | return handler(vcpu); | |
959 | return -EOPNOTSUPP; | |
960 | } | |
961 | ||
bb25b9ba CB |
962 | static int handle_tprot(struct kvm_vcpu *vcpu) |
963 | { | |
b1c571a5 | 964 | u64 address1, address2; |
a0465f9a TH |
965 | unsigned long hva, gpa; |
966 | int ret = 0, cc = 0; | |
967 | bool writable; | |
8ae04b8f | 968 | ar_t ar; |
bb25b9ba CB |
969 | |
970 | vcpu->stat.instruction_tprot++; | |
971 | ||
f9f6bbc6 TH |
972 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) |
973 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); | |
974 | ||
8ae04b8f | 975 | kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL); |
b1c571a5 | 976 | |
bb25b9ba CB |
977 | /* we only handle the Linux memory detection case: |
978 | * access key == 0 | |
bb25b9ba CB |
979 | * everything else goes to userspace. */ |
980 | if (address2 & 0xf0) | |
981 | return -EOPNOTSUPP; | |
982 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) | |
a0465f9a | 983 | ipte_lock(vcpu); |
92c96321 | 984 | ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE); |
a0465f9a TH |
985 | if (ret == PGM_PROTECTION) { |
986 | /* Write protected? Try again with read-only... */ | |
987 | cc = 1; | |
92c96321 DH |
988 | ret = guest_translate_address(vcpu, address1, ar, &gpa, |
989 | GACC_FETCH); | |
a0465f9a TH |
990 | } |
991 | if (ret) { | |
992 | if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) { | |
993 | ret = kvm_s390_inject_program_int(vcpu, ret); | |
994 | } else if (ret > 0) { | |
995 | /* Translation not available */ | |
996 | kvm_s390_set_psw_cc(vcpu, 3); | |
997 | ret = 0; | |
998 | } | |
999 | goto out_unlock; | |
1000 | } | |
59a1fa2d | 1001 | |
a0465f9a TH |
1002 | hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable); |
1003 | if (kvm_is_error_hva(hva)) { | |
1004 | ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING); | |
1005 | } else { | |
1006 | if (!writable) | |
1007 | cc = 1; /* Write not permitted ==> read-only */ | |
1008 | kvm_s390_set_psw_cc(vcpu, cc); | |
1009 | /* Note: CC2 only occurs for storage keys (not supported yet) */ | |
1010 | } | |
1011 | out_unlock: | |
1012 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT) | |
1013 | ipte_unlock(vcpu); | |
1014 | return ret; | |
bb25b9ba CB |
1015 | } |
1016 | ||
1017 | int kvm_s390_handle_e5(struct kvm_vcpu *vcpu) | |
1018 | { | |
1019 | /* For e5xx... instructions we only handle TPROT */ | |
1020 | if ((vcpu->arch.sie_block->ipa & 0x00ff) == 0x01) | |
1021 | return handle_tprot(vcpu); | |
1022 | return -EOPNOTSUPP; | |
1023 | } | |
1024 | ||
8c3f61e2 CH |
1025 | static int handle_sckpf(struct kvm_vcpu *vcpu) |
1026 | { | |
1027 | u32 value; | |
1028 | ||
1029 | if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE) | |
208dd756 | 1030 | return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP); |
8c3f61e2 CH |
1031 | |
1032 | if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000) | |
1033 | return kvm_s390_inject_program_int(vcpu, | |
1034 | PGM_SPECIFICATION); | |
1035 | ||
1036 | value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff; | |
1037 | vcpu->arch.sie_block->todpr = value; | |
1038 | ||
1039 | return 0; | |
1040 | } | |
1041 | ||
77975357 | 1042 | static const intercept_handler_t x01_handlers[256] = { |
8c3f61e2 CH |
1043 | [0x07] = handle_sckpf, |
1044 | }; | |
1045 | ||
1046 | int kvm_s390_handle_01(struct kvm_vcpu *vcpu) | |
1047 | { | |
1048 | intercept_handler_t handler; | |
1049 | ||
1050 | handler = x01_handlers[vcpu->arch.sie_block->ipa & 0x00ff]; | |
1051 | if (handler) | |
1052 | return handler(vcpu); | |
1053 | return -EOPNOTSUPP; | |
1054 | } |