Merge tag 'mm-hotfixes-stable-2025-07-11-16-16' of git://git.kernel.org/pub/scm/linux...
[linux-2.6-block.git] / arch / s390 / kernel / topology.c
CommitLineData
a17ae4c3 1// SPDX-License-Identifier: GPL-2.0
dbd70fb4 2/*
a53c8fab 3 * Copyright IBM Corp. 2007, 2011
dbd70fb4
HC
4 */
5
395d31d4
MS
6#define KMSG_COMPONENT "cpu"
7#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
8
5643195f 9#include <linux/cpufeature.h>
83a24e32 10#include <linux/workqueue.h>
57c8a661 11#include <linux/memblock.h>
51dce386
HC
12#include <linux/uaccess.h>
13#include <linux/sysctl.h>
83a24e32
HC
14#include <linux/cpuset.h>
15#include <linux/device.h>
80020fbd 16#include <linux/export.h>
83a24e32 17#include <linux/kernel.h>
dbd70fb4 18#include <linux/sched.h>
105ab3d8 19#include <linux/sched/topology.h>
83a24e32 20#include <linux/delay.h>
d05d15da
HC
21#include <linux/init.h>
22#include <linux/slab.h>
dbd70fb4
HC
23#include <linux/cpu.h>
24#include <linux/smp.h>
83a24e32 25#include <linux/mm.h>
3a368f74
PH
26#include <linux/nodemask.h>
27#include <linux/node.h>
6843d6d9 28#include <asm/hiperdispatch.h>
78609132 29#include <asm/sysinfo.h>
d4e50cfe 30#include <asm/asm.h>
dbd70fb4 31
c10fde0d
HC
32#define PTF_HORIZONTAL (0UL)
33#define PTF_VERTICAL (1UL)
34#define PTF_CHECK (2UL)
dbd70fb4 35
1b25fda0
HC
36enum {
37 TOPOLOGY_MODE_HW,
38 TOPOLOGY_MODE_SINGLE,
39 TOPOLOGY_MODE_PACKAGE,
40 TOPOLOGY_MODE_UNINITIALIZED
41};
42
4cb14bc8
HC
43struct mask_info {
44 struct mask_info *next;
10d38589 45 unsigned char id;
dbd70fb4
HC
46 cpumask_t mask;
47};
48
1b25fda0 49static int topology_mode = TOPOLOGY_MODE_UNINITIALIZED;
d1e57508 50static void set_topology_timer(void);
dbd70fb4 51static void topology_work_fn(struct work_struct *work);
c30f91b6 52static struct sysinfo_15_1_x *tl_info;
6843d6d9 53static int cpu_management;
dbd70fb4 54
d1e57508 55static DECLARE_WORK(topology_work, topology_work_fn);
d00aa4e7 56
3a3814c2 57/*
30fc4ca2 58 * Socket/Book linked lists and cpu_topology updates are
3a3814c2
MH
59 * protected by "sched_domains_mutex".
60 */
d1e57508 61static struct mask_info socket_info;
4cb14bc8 62static struct mask_info book_info;
adac0f1e 63static struct mask_info drawer_info;
d1e57508 64
30fc4ca2
HC
65struct cpu_topology_s390 cpu_topology[NR_CPUS];
66EXPORT_SYMBOL_GPL(cpu_topology);
83a24e32 67
da6d2c28 68static void cpu_group_map(cpumask_t *dst, struct mask_info *info, unsigned int cpu)
dbd70fb4 69{
da6d2c28 70 static cpumask_t mask;
dbd70fb4 71
9e3d62d5 72 cpumask_clear(&mask);
a052096b 73 if (!cpumask_test_cpu(cpu, &cpu_setup_mask))
9e3d62d5
SS
74 goto out;
75 cpumask_set_cpu(cpu, &mask);
1b25fda0
HC
76 switch (topology_mode) {
77 case TOPOLOGY_MODE_HW:
78 while (info) {
79 if (cpumask_test_cpu(cpu, &info->mask)) {
da6d2c28 80 cpumask_copy(&mask, &info->mask);
1b25fda0
HC
81 break;
82 }
83 info = info->next;
84 }
1b25fda0
HC
85 break;
86 case TOPOLOGY_MODE_PACKAGE:
87 cpumask_copy(&mask, cpu_present_mask);
88 break;
89 default:
2c7749b9 90 fallthrough;
1b25fda0 91 case TOPOLOGY_MODE_SINGLE:
1b25fda0 92 break;
0b52783d 93 }
a052096b 94 cpumask_and(&mask, &mask, &cpu_setup_mask);
9e3d62d5 95out:
da6d2c28 96 cpumask_copy(dst, &mask);
dbd70fb4
HC
97}
98
da6d2c28 99static void cpu_thread_map(cpumask_t *dst, unsigned int cpu)
10ad34bc 100{
da6d2c28 101 static cpumask_t mask;
a33239be 102 unsigned int max_cpu;
10ad34bc 103
9e3d62d5 104 cpumask_clear(&mask);
a052096b 105 if (!cpumask_test_cpu(cpu, &cpu_setup_mask))
9e3d62d5
SS
106 goto out;
107 cpumask_set_cpu(cpu, &mask);
1b25fda0 108 if (topology_mode != TOPOLOGY_MODE_HW)
da6d2c28 109 goto out;
10ad34bc 110 cpu -= cpu % (smp_cpu_mtid + 1);
a33239be
AG
111 max_cpu = min(cpu + smp_cpu_mtid, nr_cpu_ids - 1);
112 for (; cpu <= max_cpu; cpu++) {
113 if (cpumask_test_cpu(cpu, &cpu_setup_mask))
114 cpumask_set_cpu(cpu, &mask);
a052096b 115 }
da6d2c28
HC
116out:
117 cpumask_copy(dst, &mask);
10ad34bc
MS
118}
119
251ea0ca
HC
120#define TOPOLOGY_CORE_BITS 64
121
86d18a55
HC
122static void add_cpus_to_mask(struct topology_core *tl_core,
123 struct mask_info *drawer,
124 struct mask_info *book,
125 struct mask_info *socket)
dbd70fb4 126{
439eb131 127 struct cpu_topology_s390 *topo;
10ad34bc 128 unsigned int core;
dbd70fb4 129
251ea0ca 130 for_each_set_bit(core, &tl_core->mask, TOPOLOGY_CORE_BITS) {
a33239be
AG
131 unsigned int max_cpu, rcore;
132 int cpu;
dbd70fb4 133
10ad34bc 134 rcore = TOPOLOGY_CORE_BITS - 1 - core + tl_core->origin;
a33239be
AG
135 cpu = smp_find_processor_id(rcore << smp_cpu_mt_shift);
136 if (cpu < 0)
d1e57508 137 continue;
a33239be
AG
138 max_cpu = min(cpu + smp_cpu_mtid, nr_cpu_ids - 1);
139 for (; cpu <= max_cpu; cpu++) {
140 topo = &cpu_topology[cpu];
adac0f1e 141 topo->drawer_id = drawer->id;
439eb131 142 topo->book_id = book->id;
86d18a55 143 topo->socket_id = socket->id;
439eb131 144 topo->core_id = rcore;
a33239be 145 topo->thread_id = cpu;
1887aa07 146 topo->dedicated = tl_core->d;
a33239be
AG
147 cpumask_set_cpu(cpu, &drawer->mask);
148 cpumask_set_cpu(cpu, &book->mask);
149 cpumask_set_cpu(cpu, &socket->mask);
150 smp_cpu_set_polarization(cpu, tl_core->pp);
6843d6d9 151 smp_cpu_set_capacity(cpu, CPU_CAPACITY_HIGH);
dbd70fb4
HC
152 }
153 }
154}
155
4cb14bc8 156static void clear_masks(void)
dbd70fb4 157{
4cb14bc8 158 struct mask_info *info;
dbd70fb4 159
d1e57508 160 info = &socket_info;
4cb14bc8 161 while (info) {
0f1959f5 162 cpumask_clear(&info->mask);
4cb14bc8
HC
163 info = info->next;
164 }
4cb14bc8
HC
165 info = &book_info;
166 while (info) {
0f1959f5 167 cpumask_clear(&info->mask);
4cb14bc8 168 info = info->next;
dbd70fb4 169 }
adac0f1e
HC
170 info = &drawer_info;
171 while (info) {
172 cpumask_clear(&info->mask);
173 info = info->next;
174 }
dbd70fb4
HC
175}
176
c30f91b6 177static union topology_entry *next_tle(union topology_entry *tle)
dbd70fb4 178{
c30f91b6 179 if (!tle->nl)
10ad34bc 180 return (union topology_entry *)((struct topology_core *)tle + 1);
c30f91b6 181 return (union topology_entry *)((struct topology_container *)tle + 1);
dbd70fb4
HC
182}
183
86d18a55 184static void tl_to_masks(struct sysinfo_15_1_x *info)
dbd70fb4 185{
d1e57508 186 struct mask_info *socket = &socket_info;
83a24e32 187 struct mask_info *book = &book_info;
adac0f1e 188 struct mask_info *drawer = &drawer_info;
c30f91b6 189 union topology_entry *tle, *end;
4cb14bc8 190
86d18a55 191 clear_masks();
c10fde0d 192 tle = info->tle;
c30f91b6 193 end = (union topology_entry *)((unsigned long)info + info->length);
dbd70fb4
HC
194 while (tle < end) {
195 switch (tle->nl) {
adac0f1e
HC
196 case 3:
197 drawer = drawer->next;
198 drawer->id = tle->container.id;
199 break;
dbd70fb4 200 case 2:
4cb14bc8
HC
201 book = book->next;
202 book->id = tle->container.id;
dbd70fb4
HC
203 break;
204 case 1:
d1e57508
HC
205 socket = socket->next;
206 socket->id = tle->container.id;
dbd70fb4
HC
207 break;
208 case 0:
86d18a55 209 add_cpus_to_mask(&tle->cpu, drawer, book, socket);
4baeb964
HC
210 break;
211 default:
212 clear_masks();
213 return;
214 }
215 tle = next_tle(tle);
216 }
217}
218
c10fde0d
HC
219static void topology_update_polarization_simple(void)
220{
221 int cpu;
222
5439050f 223 for_each_possible_cpu(cpu)
50ab9a9a 224 smp_cpu_set_polarization(cpu, POLARIZATION_HRZ);
c10fde0d
HC
225}
226
227static int ptf(unsigned long fc)
dbd70fb4 228{
d4e50cfe 229 int cc;
dbd70fb4
HC
230
231 asm volatile(
d4e50cfe
HC
232 " .insn rre,0xb9a20000,%[fc],%[fc]\n"
233 CC_IPM(cc)
234 : CC_OUT(cc, cc)
235 : [fc] "d" (fc)
236 : CC_CLOBBER);
237 return CC_TRANSFORM(cc);
c10fde0d
HC
238}
239
240int topology_set_cpu_management(int fc)
241{
83a24e32 242 int cpu, rc;
c10fde0d 243
5643195f 244 if (!cpu_has_topology())
c10fde0d
HC
245 return -EOPNOTSUPP;
246 if (fc)
247 rc = ptf(PTF_VERTICAL);
248 else
249 rc = ptf(PTF_HORIZONTAL);
250 if (rc)
251 return -EBUSY;
5439050f 252 for_each_possible_cpu(cpu)
50ab9a9a 253 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
dbd70fb4
HC
254 return rc;
255}
256
52aeda7a 257void update_cpu_masks(void)
d00aa4e7 258{
95968497
AG
259 struct cpu_topology_s390 *topo, *topo_package, *topo_sibling;
260 int cpu, sibling, pkg_first, smt_first, id;
d00aa4e7 261
4cb14bc8 262 for_each_possible_cpu(cpu) {
30fc4ca2 263 topo = &cpu_topology[cpu];
da6d2c28
HC
264 cpu_thread_map(&topo->thread_mask, cpu);
265 cpu_group_map(&topo->core_mask, &socket_info, cpu);
266 cpu_group_map(&topo->book_mask, &book_info, cpu);
267 cpu_group_map(&topo->drawer_mask, &drawer_info, cpu);
95968497 268 topo->booted_cores = 0;
1b25fda0
HC
269 if (topology_mode != TOPOLOGY_MODE_HW) {
270 id = topology_mode == TOPOLOGY_MODE_PACKAGE ? 0 : cpu;
439eb131
HC
271 topo->thread_id = cpu;
272 topo->core_id = cpu;
1b25fda0
HC
273 topo->socket_id = id;
274 topo->book_id = id;
275 topo->drawer_id = id;
d1e57508 276 }
4cb14bc8 277 }
6843d6d9 278 hd_reset_state();
95968497
AG
279 for_each_online_cpu(cpu) {
280 topo = &cpu_topology[cpu];
281 pkg_first = cpumask_first(&topo->core_mask);
282 topo_package = &cpu_topology[pkg_first];
283 if (cpu == pkg_first) {
284 for_each_cpu(sibling, &topo->core_mask) {
285 topo_sibling = &cpu_topology[sibling];
286 smt_first = cpumask_first(&topo_sibling->thread_mask);
6843d6d9 287 if (sibling == smt_first) {
95968497 288 topo_package->booted_cores++;
6843d6d9
MD
289 hd_add_core(sibling);
290 }
95968497
AG
291 }
292 } else {
293 topo->booted_cores = topo_package->booted_cores;
294 }
295 }
4cb14bc8
HC
296}
297
96f4a70d 298void store_topology(struct sysinfo_15_1_x *info)
4cb14bc8 299{
ae5ca67a 300 stsi(info, 15, 1, topology_mnest_limit());
d00aa4e7
HC
301}
302
1887aa07
MS
303static void __arch_update_dedicated_flag(void *arg)
304{
305 if (topology_cpu_dedicated(smp_processor_id()))
306 set_cpu_flag(CIF_DEDICATED_CPU);
307 else
308 clear_cpu_flag(CIF_DEDICATED_CPU);
309}
310
8c910580 311static int __arch_update_cpu_topology(void)
dbd70fb4 312{
c30f91b6 313 struct sysinfo_15_1_x *info = tl_info;
6843d6d9 314 int rc, hd_status;
dbd70fb4 315
6843d6d9
MD
316 hd_status = 0;
317 rc = 0;
51dce386 318 mutex_lock(&smp_cpu_state_mutex);
5643195f 319 if (cpu_has_topology()) {
3a368f74
PH
320 rc = 1;
321 store_topology(info);
322 tl_to_masks(info);
c10fde0d 323 }
d1e57508 324 update_cpu_masks();
5643195f 325 if (!cpu_has_topology())
3a368f74 326 topology_update_polarization_simple();
6843d6d9
MD
327 if (cpu_management == 1)
328 hd_status = hd_enable_hiperdispatch();
51dce386 329 mutex_unlock(&smp_cpu_state_mutex);
6843d6d9
MD
330 if (hd_status == 0)
331 hd_disable_hiperdispatch();
8c910580
HC
332 return rc;
333}
334
335int arch_update_cpu_topology(void)
336{
d6d1aa51 337 int rc;
8c910580
HC
338
339 rc = __arch_update_cpu_topology();
1887aa07 340 on_each_cpu(__arch_update_dedicated_flag, NULL, 0);
3a368f74 341 return rc;
dbd70fb4
HC
342}
343
fd781fa2
HC
344static void topology_work_fn(struct work_struct *work)
345{
f414f5f1 346 rebuild_sched_domains();
dbd70fb4
HC
347}
348
c10fde0d
HC
349void topology_schedule_update(void)
350{
351 schedule_work(&topology_work);
352}
353
51dce386
HC
354static void topology_flush_work(void)
355{
356 flush_work(&topology_work);
357}
358
5cd79d6a 359static void topology_timer_fn(struct timer_list *unused)
dbd70fb4 360{
c10fde0d
HC
361 if (ptf(PTF_CHECK))
362 topology_schedule_update();
dbd70fb4
HC
363 set_topology_timer();
364}
365
5cd79d6a 366static struct timer_list topology_timer;
d68bddb7
HC
367
368static atomic_t topology_poll = ATOMIC_INIT(0);
369
dbd70fb4
HC
370static void set_topology_timer(void)
371{
d68bddb7 372 if (atomic_add_unless(&topology_poll, -1, 0))
0188d08a 373 mod_timer(&topology_timer, jiffies + msecs_to_jiffies(100));
d68bddb7 374 else
5ad2abf9 375 mod_timer(&topology_timer, jiffies + secs_to_jiffies(60));
d68bddb7
HC
376}
377
378void topology_expect_change(void)
379{
5643195f 380 if (!cpu_has_topology())
d68bddb7
HC
381 return;
382 /* This is racy, but it doesn't matter since it is just a heuristic.
383 * Worst case is that we poll in a higher frequency for a bit longer.
384 */
385 if (atomic_read(&topology_poll) > 60)
386 return;
387 atomic_add(60, &topology_poll);
388 set_topology_timer();
dbd70fb4
HC
389}
390
9dd333e7
TH
391static int set_polarization(int polarization)
392{
393 int rc = 0;
394
395 cpus_read_lock();
396 mutex_lock(&smp_cpu_state_mutex);
397 if (cpu_management == polarization)
398 goto out;
399 rc = topology_set_cpu_management(polarization);
400 if (rc)
401 goto out;
402 cpu_management = polarization;
403 topology_expect_change();
404out:
405 mutex_unlock(&smp_cpu_state_mutex);
406 cpus_read_unlock();
407 return rc;
408}
409
72f31889
LT
410static ssize_t dispatching_show(struct device *dev,
411 struct device_attribute *attr,
83a24e32
HC
412 char *buf)
413{
414 ssize_t count;
415
416 mutex_lock(&smp_cpu_state_mutex);
f94de4f1 417 count = sysfs_emit(buf, "%d\n", cpu_management);
83a24e32
HC
418 mutex_unlock(&smp_cpu_state_mutex);
419 return count;
420}
421
72f31889
LT
422static ssize_t dispatching_store(struct device *dev,
423 struct device_attribute *attr,
83a24e32
HC
424 const char *buf,
425 size_t count)
426{
427 int val, rc;
428 char delim;
429
430 if (sscanf(buf, "%d %c", &val, &delim) != 1)
431 return -EINVAL;
432 if (val != 0 && val != 1)
433 return -EINVAL;
9dd333e7 434 rc = set_polarization(val);
83a24e32
HC
435 return rc ? rc : count;
436}
b6b996b6 437static DEVICE_ATTR_RW(dispatching);
83a24e32 438
72f31889
LT
439static ssize_t cpu_polarization_show(struct device *dev,
440 struct device_attribute *attr, char *buf)
83a24e32
HC
441{
442 int cpu = dev->id;
443 ssize_t count;
444
445 mutex_lock(&smp_cpu_state_mutex);
50ab9a9a 446 switch (smp_cpu_get_polarization(cpu)) {
83a24e32 447 case POLARIZATION_HRZ:
f94de4f1 448 count = sysfs_emit(buf, "horizontal\n");
83a24e32
HC
449 break;
450 case POLARIZATION_VL:
f94de4f1 451 count = sysfs_emit(buf, "vertical:low\n");
83a24e32
HC
452 break;
453 case POLARIZATION_VM:
f94de4f1 454 count = sysfs_emit(buf, "vertical:medium\n");
83a24e32
HC
455 break;
456 case POLARIZATION_VH:
f94de4f1 457 count = sysfs_emit(buf, "vertical:high\n");
83a24e32
HC
458 break;
459 default:
f94de4f1 460 count = sysfs_emit(buf, "unknown\n");
83a24e32
HC
461 break;
462 }
463 mutex_unlock(&smp_cpu_state_mutex);
464 return count;
465}
72f31889 466static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL);
83a24e32
HC
467
468static struct attribute *topology_cpu_attrs[] = {
72f31889 469 &dev_attr_polarization.attr,
83a24e32
HC
470 NULL,
471};
472
473static struct attribute_group topology_cpu_attr_group = {
474 .attrs = topology_cpu_attrs,
475};
476
1887aa07
MS
477static ssize_t cpu_dedicated_show(struct device *dev,
478 struct device_attribute *attr, char *buf)
479{
480 int cpu = dev->id;
481 ssize_t count;
482
483 mutex_lock(&smp_cpu_state_mutex);
f94de4f1 484 count = sysfs_emit(buf, "%d\n", topology_cpu_dedicated(cpu));
1887aa07
MS
485 mutex_unlock(&smp_cpu_state_mutex);
486 return count;
487}
488static DEVICE_ATTR(dedicated, 0444, cpu_dedicated_show, NULL);
489
490static struct attribute *topology_extra_cpu_attrs[] = {
491 &dev_attr_dedicated.attr,
492 NULL,
493};
494
495static struct attribute_group topology_extra_cpu_attr_group = {
496 .attrs = topology_extra_cpu_attrs,
497};
498
83a24e32
HC
499int topology_cpu_init(struct cpu *cpu)
500{
1887aa07
MS
501 int rc;
502
503 rc = sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group);
5643195f 504 if (rc || !cpu_has_topology())
1887aa07
MS
505 return rc;
506 rc = sysfs_create_group(&cpu->dev.kobj, &topology_extra_cpu_attr_group);
507 if (rc)
508 sysfs_remove_group(&cpu->dev.kobj, &topology_cpu_attr_group);
509 return rc;
83a24e32
HC
510}
511
3ddb1b75 512static const struct cpumask *cpu_thread_mask(int cpu)
10ad34bc 513{
30fc4ca2 514 return &cpu_topology[cpu].thread_mask;
10ad34bc
MS
515}
516
517
2dfd7476
VG
518const struct cpumask *cpu_coregroup_mask(int cpu)
519{
30fc4ca2 520 return &cpu_topology[cpu].core_mask;
2dfd7476
VG
521}
522
523static const struct cpumask *cpu_book_mask(int cpu)
524{
30fc4ca2 525 return &cpu_topology[cpu].book_mask;
2dfd7476
VG
526}
527
adac0f1e
HC
528static const struct cpumask *cpu_drawer_mask(int cpu)
529{
30fc4ca2 530 return &cpu_topology[cpu].drawer_mask;
adac0f1e
HC
531}
532
2dfd7476 533static struct sched_domain_topology_level s390_topology[] = {
10ad34bc 534 { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
2dfd7476
VG
535 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
536 { cpu_book_mask, SD_INIT_NAME(BOOK) },
adac0f1e 537 { cpu_drawer_mask, SD_INIT_NAME(DRAWER) },
f577cd57 538 { cpu_cpu_mask, SD_INIT_NAME(PKG) },
2dfd7476
VG
539 { NULL, },
540};
541
d05d15da
HC
542static void __init alloc_masks(struct sysinfo_15_1_x *info,
543 struct mask_info *mask, int offset)
544{
545 int i, nr_masks;
546
547 nr_masks = info->mag[TOPOLOGY_NR_MAG - offset];
548 for (i = 0; i < info->mnest - offset; i++)
549 nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i];
550 nr_masks = max(nr_masks, 1);
551 for (i = 0; i < nr_masks; i++) {
c6f23979 552 mask->next = memblock_alloc_or_panic(sizeof(*mask->next), 8);
d05d15da
HC
553 mask = mask->next;
554 }
555}
556
9988df07
MD
557static int __init detect_polarization(union topology_entry *tle)
558{
559 struct topology_core *tl_core;
560
561 while (tle->nl)
562 tle = next_tle(tle);
563 tl_core = (struct topology_core *)tle;
564 return tl_core->pp != POLARIZATION_HRZ;
565}
566
8c910580 567void __init topology_init_early(void)
d05d15da
HC
568{
569 struct sysinfo_15_1_x *info;
d05d15da 570
ebb299a5 571 set_sched_topology(s390_topology);
1b25fda0 572 if (topology_mode == TOPOLOGY_MODE_UNINITIALIZED) {
5643195f 573 if (cpu_has_topology())
1b25fda0
HC
574 topology_mode = TOPOLOGY_MODE_HW;
575 else
576 topology_mode = TOPOLOGY_MODE_SINGLE;
577 }
5643195f 578 if (!cpu_has_topology())
8c910580 579 goto out;
c6f23979 580 tl_info = memblock_alloc_or_panic(PAGE_SIZE, PAGE_SIZE);
d05d15da
HC
581 info = tl_info;
582 store_topology(info);
9988df07 583 cpu_management = detect_polarization(info->tle);
496e59cc
HC
584 pr_info("The CPU configuration topology of the machine is: %d %d %d %d %d %d / %d\n",
585 info->mag[0], info->mag[1], info->mag[2], info->mag[3],
586 info->mag[4], info->mag[5], info->mnest);
d05d15da
HC
587 alloc_masks(info, &socket_info, 1);
588 alloc_masks(info, &book_info, 2);
adac0f1e 589 alloc_masks(info, &drawer_info, 3);
8c910580 590out:
a052096b 591 cpumask_set_cpu(0, &cpu_setup_mask);
8c910580 592 __arch_update_cpu_topology();
1887aa07 593 __arch_update_dedicated_flag(NULL);
d05d15da 594}
d05d15da 595
1b25fda0
HC
596static inline int topology_get_mode(int enabled)
597{
598 if (!enabled)
599 return TOPOLOGY_MODE_SINGLE;
5643195f 600 return cpu_has_topology() ? TOPOLOGY_MODE_HW : TOPOLOGY_MODE_PACKAGE;
1b25fda0
HC
601}
602
51dce386
HC
603static inline int topology_is_enabled(void)
604{
605 return topology_mode != TOPOLOGY_MODE_SINGLE;
606}
607
1b25fda0
HC
608static int __init topology_setup(char *str)
609{
610 bool enabled;
611 int rc;
612
613 rc = kstrtobool(str, &enabled);
614 if (rc)
615 return rc;
616 topology_mode = topology_get_mode(enabled);
617 return 0;
618}
619early_param("topology", topology_setup);
620
78eb4ea2 621static int topology_ctl_handler(const struct ctl_table *ctl, int write,
32927393 622 void *buffer, size_t *lenp, loff_t *ppos)
51dce386 623{
196851be 624 int enabled = topology_is_enabled();
51dce386 625 int new_mode;
196851be
VG
626 int rc;
627 struct ctl_table ctl_entry = {
628 .procname = ctl->procname,
629 .data = &enabled,
630 .maxlen = sizeof(int),
eec4844f
MC
631 .extra1 = SYSCTL_ZERO,
632 .extra2 = SYSCTL_ONE,
196851be
VG
633 };
634
635 rc = proc_douintvec_minmax(&ctl_entry, write, buffer, lenp, ppos);
636 if (rc < 0 || !write)
637 return rc;
51dce386 638
51dce386 639 mutex_lock(&smp_cpu_state_mutex);
196851be 640 new_mode = topology_get_mode(enabled);
51dce386
HC
641 if (topology_mode != new_mode) {
642 topology_mode = new_mode;
643 topology_schedule_update();
644 }
645 mutex_unlock(&smp_cpu_state_mutex);
646 topology_flush_work();
196851be
VG
647
648 return rc;
51dce386
HC
649}
650
9dd333e7
TH
651static int polarization_ctl_handler(const struct ctl_table *ctl, int write,
652 void *buffer, size_t *lenp, loff_t *ppos)
653{
654 int polarization;
655 int rc;
656 struct ctl_table ctl_entry = {
657 .procname = ctl->procname,
658 .data = &polarization,
659 .maxlen = sizeof(int),
660 .extra1 = SYSCTL_ZERO,
661 .extra2 = SYSCTL_ONE,
662 };
663
664 polarization = cpu_management;
665 rc = proc_douintvec_minmax(&ctl_entry, write, buffer, lenp, ppos);
666 if (rc < 0 || !write)
667 return rc;
668 return set_polarization(polarization);
669}
670
1751f872 671static const struct ctl_table topology_ctl_table[] = {
51dce386
HC
672 {
673 .procname = "topology",
674 .mode = 0644,
675 .proc_handler = topology_ctl_handler,
676 },
9dd333e7
TH
677 {
678 .procname = "polarization",
679 .mode = 0644,
680 .proc_handler = polarization_ctl_handler,
681 },
51dce386
HC
682};
683
83a24e32
HC
684static int __init topology_init(void)
685{
9493ed19
GKH
686 struct device *dev_root;
687 int rc = 0;
688
5cd79d6a 689 timer_setup(&topology_timer, topology_timer_fn, TIMER_DEFERRABLE);
5643195f 690 if (cpu_has_topology())
48e9a6c1
MS
691 set_topology_timer();
692 else
83a24e32 693 topology_update_polarization_simple();
7e627f81
TH
694 if (IS_ENABLED(CONFIG_SCHED_TOPOLOGY_VERTICAL))
695 set_polarization(1);
0599331c 696 register_sysctl("s390", topology_ctl_table);
9493ed19
GKH
697
698 dev_root = bus_get_dev_root(&cpu_subsys);
699 if (dev_root) {
700 rc = device_create_file(dev_root, &dev_attr_dispatching);
701 put_device(dev_root);
702 }
703 return rc;
83a24e32
HC
704}
705device_initcall(topology_init);