Commit | Line | Data |
---|---|---|
dbd70fb4 | 1 | /* |
a53c8fab | 2 | * Copyright IBM Corp. 2007, 2011 |
dbd70fb4 HC |
3 | * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> |
4 | */ | |
5 | ||
395d31d4 MS |
6 | #define KMSG_COMPONENT "cpu" |
7 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
8 | ||
83a24e32 | 9 | #include <linux/workqueue.h> |
83a24e32 HC |
10 | #include <linux/cpuset.h> |
11 | #include <linux/device.h> | |
80020fbd | 12 | #include <linux/export.h> |
83a24e32 | 13 | #include <linux/kernel.h> |
dbd70fb4 | 14 | #include <linux/sched.h> |
83a24e32 | 15 | #include <linux/delay.h> |
d05d15da HC |
16 | #include <linux/init.h> |
17 | #include <linux/slab.h> | |
dbd70fb4 HC |
18 | #include <linux/cpu.h> |
19 | #include <linux/smp.h> | |
83a24e32 | 20 | #include <linux/mm.h> |
3a368f74 PH |
21 | #include <linux/nodemask.h> |
22 | #include <linux/node.h> | |
78609132 | 23 | #include <asm/sysinfo.h> |
3a368f74 | 24 | #include <asm/numa.h> |
dbd70fb4 | 25 | |
c10fde0d HC |
26 | #define PTF_HORIZONTAL (0UL) |
27 | #define PTF_VERTICAL (1UL) | |
28 | #define PTF_CHECK (2UL) | |
dbd70fb4 | 29 | |
4cb14bc8 HC |
30 | struct mask_info { |
31 | struct mask_info *next; | |
10d38589 | 32 | unsigned char id; |
dbd70fb4 HC |
33 | cpumask_t mask; |
34 | }; | |
35 | ||
d1e57508 | 36 | static void set_topology_timer(void); |
dbd70fb4 | 37 | static void topology_work_fn(struct work_struct *work); |
c30f91b6 | 38 | static struct sysinfo_15_1_x *tl_info; |
dbd70fb4 | 39 | |
4cc7ecb7 | 40 | static bool topology_enabled = true; |
d1e57508 | 41 | static DECLARE_WORK(topology_work, topology_work_fn); |
d00aa4e7 | 42 | |
3a3814c2 MH |
43 | /* |
44 | * Socket/Book linked lists and per_cpu(cpu_topology) updates are | |
45 | * protected by "sched_domains_mutex". | |
46 | */ | |
d1e57508 | 47 | static struct mask_info socket_info; |
4cb14bc8 | 48 | static struct mask_info book_info; |
adac0f1e | 49 | static struct mask_info drawer_info; |
d1e57508 | 50 | |
da0c636e HC |
51 | DEFINE_PER_CPU(struct cpu_topology_s390, cpu_topology); |
52 | EXPORT_PER_CPU_SYMBOL_GPL(cpu_topology); | |
83a24e32 | 53 | |
4cb14bc8 | 54 | static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) |
dbd70fb4 | 55 | { |
dbd70fb4 HC |
56 | cpumask_t mask; |
57 | ||
d1e57508 HC |
58 | cpumask_copy(&mask, cpumask_of(cpu)); |
59 | if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) | |
0b52783d | 60 | return mask; |
d1e57508 HC |
61 | for (; info; info = info->next) { |
62 | if (cpumask_test_cpu(cpu, &info->mask)) | |
63 | return info->mask; | |
0b52783d | 64 | } |
dbd70fb4 HC |
65 | return mask; |
66 | } | |
67 | ||
10ad34bc MS |
68 | static cpumask_t cpu_thread_map(unsigned int cpu) |
69 | { | |
70 | cpumask_t mask; | |
71 | int i; | |
72 | ||
73 | cpumask_copy(&mask, cpumask_of(cpu)); | |
74 | if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) | |
75 | return mask; | |
76 | cpu -= cpu % (smp_cpu_mtid + 1); | |
77 | for (i = 0; i <= smp_cpu_mtid; i++) | |
78 | if (cpu_present(cpu + i)) | |
79 | cpumask_set_cpu(cpu + i, &mask); | |
80 | return mask; | |
81 | } | |
82 | ||
83 | static struct mask_info *add_cpus_to_mask(struct topology_core *tl_core, | |
adac0f1e | 84 | struct mask_info *drawer, |
f6bf1a8a | 85 | struct mask_info *book, |
d1e57508 HC |
86 | struct mask_info *socket, |
87 | int one_socket_per_cpu) | |
dbd70fb4 | 88 | { |
439eb131 | 89 | struct cpu_topology_s390 *topo; |
10ad34bc | 90 | unsigned int core; |
dbd70fb4 | 91 | |
10ad34bc MS |
92 | for_each_set_bit(core, &tl_core->mask[0], TOPOLOGY_CORE_BITS) { |
93 | unsigned int rcore; | |
94 | int lcpu, i; | |
dbd70fb4 | 95 | |
10ad34bc MS |
96 | rcore = TOPOLOGY_CORE_BITS - 1 - core + tl_core->origin; |
97 | lcpu = smp_find_processor_id(rcore << smp_cpu_mt_shift); | |
d1e57508 HC |
98 | if (lcpu < 0) |
99 | continue; | |
10ad34bc | 100 | for (i = 0; i <= smp_cpu_mtid; i++) { |
439eb131 | 101 | topo = &per_cpu(cpu_topology, lcpu + i); |
adac0f1e | 102 | topo->drawer_id = drawer->id; |
439eb131 HC |
103 | topo->book_id = book->id; |
104 | topo->core_id = rcore; | |
105 | topo->thread_id = lcpu + i; | |
adac0f1e | 106 | cpumask_set_cpu(lcpu + i, &drawer->mask); |
10ad34bc MS |
107 | cpumask_set_cpu(lcpu + i, &book->mask); |
108 | cpumask_set_cpu(lcpu + i, &socket->mask); | |
109 | if (one_socket_per_cpu) | |
439eb131 | 110 | topo->socket_id = rcore; |
10ad34bc | 111 | else |
439eb131 | 112 | topo->socket_id = socket->id; |
10ad34bc | 113 | smp_cpu_set_polarization(lcpu + i, tl_core->pp); |
dbd70fb4 | 114 | } |
10ad34bc MS |
115 | if (one_socket_per_cpu) |
116 | socket = socket->next; | |
dbd70fb4 | 117 | } |
d1e57508 | 118 | return socket; |
dbd70fb4 HC |
119 | } |
120 | ||
4cb14bc8 | 121 | static void clear_masks(void) |
dbd70fb4 | 122 | { |
4cb14bc8 | 123 | struct mask_info *info; |
dbd70fb4 | 124 | |
d1e57508 | 125 | info = &socket_info; |
4cb14bc8 | 126 | while (info) { |
0f1959f5 | 127 | cpumask_clear(&info->mask); |
4cb14bc8 HC |
128 | info = info->next; |
129 | } | |
4cb14bc8 HC |
130 | info = &book_info; |
131 | while (info) { | |
0f1959f5 | 132 | cpumask_clear(&info->mask); |
4cb14bc8 | 133 | info = info->next; |
dbd70fb4 | 134 | } |
adac0f1e HC |
135 | info = &drawer_info; |
136 | while (info) { | |
137 | cpumask_clear(&info->mask); | |
138 | info = info->next; | |
139 | } | |
dbd70fb4 HC |
140 | } |
141 | ||
c30f91b6 | 142 | static union topology_entry *next_tle(union topology_entry *tle) |
dbd70fb4 | 143 | { |
c30f91b6 | 144 | if (!tle->nl) |
10ad34bc | 145 | return (union topology_entry *)((struct topology_core *)tle + 1); |
c30f91b6 | 146 | return (union topology_entry *)((struct topology_container *)tle + 1); |
dbd70fb4 HC |
147 | } |
148 | ||
d1e57508 | 149 | static void __tl_to_masks_generic(struct sysinfo_15_1_x *info) |
dbd70fb4 | 150 | { |
d1e57508 | 151 | struct mask_info *socket = &socket_info; |
83a24e32 | 152 | struct mask_info *book = &book_info; |
adac0f1e | 153 | struct mask_info *drawer = &drawer_info; |
c30f91b6 | 154 | union topology_entry *tle, *end; |
4cb14bc8 | 155 | |
c10fde0d | 156 | tle = info->tle; |
c30f91b6 | 157 | end = (union topology_entry *)((unsigned long)info + info->length); |
dbd70fb4 HC |
158 | while (tle < end) { |
159 | switch (tle->nl) { | |
adac0f1e HC |
160 | case 3: |
161 | drawer = drawer->next; | |
162 | drawer->id = tle->container.id; | |
163 | break; | |
dbd70fb4 | 164 | case 2: |
4cb14bc8 HC |
165 | book = book->next; |
166 | book->id = tle->container.id; | |
dbd70fb4 HC |
167 | break; |
168 | case 1: | |
d1e57508 HC |
169 | socket = socket->next; |
170 | socket->id = tle->container.id; | |
dbd70fb4 HC |
171 | break; |
172 | case 0: | |
adac0f1e | 173 | add_cpus_to_mask(&tle->cpu, drawer, book, socket, 0); |
dbd70fb4 HC |
174 | break; |
175 | default: | |
4cb14bc8 | 176 | clear_masks(); |
4baeb964 | 177 | return; |
dbd70fb4 HC |
178 | } |
179 | tle = next_tle(tle); | |
180 | } | |
4baeb964 HC |
181 | } |
182 | ||
d1e57508 | 183 | static void __tl_to_masks_z10(struct sysinfo_15_1_x *info) |
4baeb964 | 184 | { |
d1e57508 | 185 | struct mask_info *socket = &socket_info; |
4baeb964 | 186 | struct mask_info *book = &book_info; |
adac0f1e | 187 | struct mask_info *drawer = &drawer_info; |
4baeb964 HC |
188 | union topology_entry *tle, *end; |
189 | ||
190 | tle = info->tle; | |
191 | end = (union topology_entry *)((unsigned long)info + info->length); | |
192 | while (tle < end) { | |
193 | switch (tle->nl) { | |
194 | case 1: | |
195 | book = book->next; | |
196 | book->id = tle->container.id; | |
197 | break; | |
198 | case 0: | |
adac0f1e | 199 | socket = add_cpus_to_mask(&tle->cpu, drawer, book, socket, 1); |
4baeb964 HC |
200 | break; |
201 | default: | |
202 | clear_masks(); | |
203 | return; | |
204 | } | |
205 | tle = next_tle(tle); | |
206 | } | |
207 | } | |
208 | ||
d1e57508 | 209 | static void tl_to_masks(struct sysinfo_15_1_x *info) |
4baeb964 HC |
210 | { |
211 | struct cpuid cpu_id; | |
212 | ||
d1e57508 | 213 | get_cpu_id(&cpu_id); |
4baeb964 HC |
214 | clear_masks(); |
215 | switch (cpu_id.machine) { | |
216 | case 0x2097: | |
217 | case 0x2098: | |
d1e57508 | 218 | __tl_to_masks_z10(info); |
4baeb964 HC |
219 | break; |
220 | default: | |
d1e57508 | 221 | __tl_to_masks_generic(info); |
4baeb964 | 222 | } |
dbd70fb4 HC |
223 | } |
224 | ||
c10fde0d HC |
225 | static void topology_update_polarization_simple(void) |
226 | { | |
227 | int cpu; | |
228 | ||
229 | mutex_lock(&smp_cpu_state_mutex); | |
5439050f | 230 | for_each_possible_cpu(cpu) |
50ab9a9a | 231 | smp_cpu_set_polarization(cpu, POLARIZATION_HRZ); |
c10fde0d HC |
232 | mutex_unlock(&smp_cpu_state_mutex); |
233 | } | |
234 | ||
235 | static int ptf(unsigned long fc) | |
dbd70fb4 HC |
236 | { |
237 | int rc; | |
238 | ||
239 | asm volatile( | |
240 | " .insn rre,0xb9a20000,%1,%1\n" | |
241 | " ipm %0\n" | |
242 | " srl %0,28\n" | |
243 | : "=d" (rc) | |
c10fde0d HC |
244 | : "d" (fc) : "cc"); |
245 | return rc; | |
246 | } | |
247 | ||
248 | int topology_set_cpu_management(int fc) | |
249 | { | |
83a24e32 | 250 | int cpu, rc; |
c10fde0d | 251 | |
9186d7a9 | 252 | if (!MACHINE_HAS_TOPOLOGY) |
c10fde0d HC |
253 | return -EOPNOTSUPP; |
254 | if (fc) | |
255 | rc = ptf(PTF_VERTICAL); | |
256 | else | |
257 | rc = ptf(PTF_HORIZONTAL); | |
258 | if (rc) | |
259 | return -EBUSY; | |
5439050f | 260 | for_each_possible_cpu(cpu) |
50ab9a9a | 261 | smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); |
dbd70fb4 HC |
262 | return rc; |
263 | } | |
264 | ||
d1e57508 | 265 | static void update_cpu_masks(void) |
d00aa4e7 | 266 | { |
439eb131 | 267 | struct cpu_topology_s390 *topo; |
d00aa4e7 HC |
268 | int cpu; |
269 | ||
4cb14bc8 | 270 | for_each_possible_cpu(cpu) { |
439eb131 HC |
271 | topo = &per_cpu(cpu_topology, cpu); |
272 | topo->thread_mask = cpu_thread_map(cpu); | |
273 | topo->core_mask = cpu_group_map(&socket_info, cpu); | |
274 | topo->book_mask = cpu_group_map(&book_info, cpu); | |
adac0f1e | 275 | topo->drawer_mask = cpu_group_map(&drawer_info, cpu); |
d1e57508 | 276 | if (!MACHINE_HAS_TOPOLOGY) { |
439eb131 HC |
277 | topo->thread_id = cpu; |
278 | topo->core_id = cpu; | |
279 | topo->socket_id = cpu; | |
280 | topo->book_id = cpu; | |
adac0f1e | 281 | topo->drawer_id = cpu; |
d1e57508 | 282 | } |
4cb14bc8 | 283 | } |
3a368f74 | 284 | numa_update_cpu_topology(); |
4cb14bc8 HC |
285 | } |
286 | ||
96f4a70d | 287 | void store_topology(struct sysinfo_15_1_x *info) |
4cb14bc8 | 288 | { |
adac0f1e | 289 | stsi(info, 15, 1, min(topology_max_mnest, 4)); |
d00aa4e7 HC |
290 | } |
291 | ||
ee79d1bd | 292 | int arch_update_cpu_topology(void) |
dbd70fb4 | 293 | { |
c30f91b6 | 294 | struct sysinfo_15_1_x *info = tl_info; |
8a25a2fd | 295 | struct device *dev; |
3a368f74 | 296 | int cpu, rc = 0; |
dbd70fb4 | 297 | |
3a368f74 PH |
298 | if (MACHINE_HAS_TOPOLOGY) { |
299 | rc = 1; | |
300 | store_topology(info); | |
301 | tl_to_masks(info); | |
c10fde0d | 302 | } |
d1e57508 | 303 | update_cpu_masks(); |
3a368f74 PH |
304 | if (!MACHINE_HAS_TOPOLOGY) |
305 | topology_update_polarization_simple(); | |
dbd70fb4 | 306 | for_each_online_cpu(cpu) { |
8a25a2fd KS |
307 | dev = get_cpu_device(cpu); |
308 | kobject_uevent(&dev->kobj, KOBJ_CHANGE); | |
dbd70fb4 | 309 | } |
3a368f74 | 310 | return rc; |
dbd70fb4 HC |
311 | } |
312 | ||
fd781fa2 HC |
313 | static void topology_work_fn(struct work_struct *work) |
314 | { | |
f414f5f1 | 315 | rebuild_sched_domains(); |
dbd70fb4 HC |
316 | } |
317 | ||
c10fde0d HC |
318 | void topology_schedule_update(void) |
319 | { | |
320 | schedule_work(&topology_work); | |
321 | } | |
322 | ||
dbd70fb4 HC |
323 | static void topology_timer_fn(unsigned long ignored) |
324 | { | |
c10fde0d HC |
325 | if (ptf(PTF_CHECK)) |
326 | topology_schedule_update(); | |
dbd70fb4 HC |
327 | set_topology_timer(); |
328 | } | |
329 | ||
d68bddb7 HC |
330 | static struct timer_list topology_timer = |
331 | TIMER_DEFERRED_INITIALIZER(topology_timer_fn, 0, 0); | |
332 | ||
333 | static atomic_t topology_poll = ATOMIC_INIT(0); | |
334 | ||
dbd70fb4 HC |
335 | static void set_topology_timer(void) |
336 | { | |
d68bddb7 HC |
337 | if (atomic_add_unless(&topology_poll, -1, 0)) |
338 | mod_timer(&topology_timer, jiffies + HZ / 10); | |
339 | else | |
340 | mod_timer(&topology_timer, jiffies + HZ * 60); | |
341 | } | |
342 | ||
343 | void topology_expect_change(void) | |
344 | { | |
345 | if (!MACHINE_HAS_TOPOLOGY) | |
346 | return; | |
347 | /* This is racy, but it doesn't matter since it is just a heuristic. | |
348 | * Worst case is that we poll in a higher frequency for a bit longer. | |
349 | */ | |
350 | if (atomic_read(&topology_poll) > 60) | |
351 | return; | |
352 | atomic_add(60, &topology_poll); | |
353 | set_topology_timer(); | |
dbd70fb4 HC |
354 | } |
355 | ||
83a24e32 HC |
356 | static int cpu_management; |
357 | ||
72f31889 LT |
358 | static ssize_t dispatching_show(struct device *dev, |
359 | struct device_attribute *attr, | |
83a24e32 HC |
360 | char *buf) |
361 | { | |
362 | ssize_t count; | |
363 | ||
364 | mutex_lock(&smp_cpu_state_mutex); | |
365 | count = sprintf(buf, "%d\n", cpu_management); | |
366 | mutex_unlock(&smp_cpu_state_mutex); | |
367 | return count; | |
368 | } | |
369 | ||
72f31889 LT |
370 | static ssize_t dispatching_store(struct device *dev, |
371 | struct device_attribute *attr, | |
83a24e32 HC |
372 | const char *buf, |
373 | size_t count) | |
374 | { | |
375 | int val, rc; | |
376 | char delim; | |
377 | ||
378 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
379 | return -EINVAL; | |
380 | if (val != 0 && val != 1) | |
381 | return -EINVAL; | |
382 | rc = 0; | |
383 | get_online_cpus(); | |
384 | mutex_lock(&smp_cpu_state_mutex); | |
385 | if (cpu_management == val) | |
386 | goto out; | |
387 | rc = topology_set_cpu_management(val); | |
d68bddb7 HC |
388 | if (rc) |
389 | goto out; | |
390 | cpu_management = val; | |
391 | topology_expect_change(); | |
83a24e32 HC |
392 | out: |
393 | mutex_unlock(&smp_cpu_state_mutex); | |
394 | put_online_cpus(); | |
395 | return rc ? rc : count; | |
396 | } | |
72f31889 | 397 | static DEVICE_ATTR(dispatching, 0644, dispatching_show, |
83a24e32 HC |
398 | dispatching_store); |
399 | ||
72f31889 LT |
400 | static ssize_t cpu_polarization_show(struct device *dev, |
401 | struct device_attribute *attr, char *buf) | |
83a24e32 HC |
402 | { |
403 | int cpu = dev->id; | |
404 | ssize_t count; | |
405 | ||
406 | mutex_lock(&smp_cpu_state_mutex); | |
50ab9a9a | 407 | switch (smp_cpu_get_polarization(cpu)) { |
83a24e32 HC |
408 | case POLARIZATION_HRZ: |
409 | count = sprintf(buf, "horizontal\n"); | |
410 | break; | |
411 | case POLARIZATION_VL: | |
412 | count = sprintf(buf, "vertical:low\n"); | |
413 | break; | |
414 | case POLARIZATION_VM: | |
415 | count = sprintf(buf, "vertical:medium\n"); | |
416 | break; | |
417 | case POLARIZATION_VH: | |
418 | count = sprintf(buf, "vertical:high\n"); | |
419 | break; | |
420 | default: | |
421 | count = sprintf(buf, "unknown\n"); | |
422 | break; | |
423 | } | |
424 | mutex_unlock(&smp_cpu_state_mutex); | |
425 | return count; | |
426 | } | |
72f31889 | 427 | static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL); |
83a24e32 HC |
428 | |
429 | static struct attribute *topology_cpu_attrs[] = { | |
72f31889 | 430 | &dev_attr_polarization.attr, |
83a24e32 HC |
431 | NULL, |
432 | }; | |
433 | ||
434 | static struct attribute_group topology_cpu_attr_group = { | |
435 | .attrs = topology_cpu_attrs, | |
436 | }; | |
437 | ||
438 | int topology_cpu_init(struct cpu *cpu) | |
439 | { | |
72f31889 | 440 | return sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group); |
83a24e32 HC |
441 | } |
442 | ||
3ddb1b75 | 443 | static const struct cpumask *cpu_thread_mask(int cpu) |
10ad34bc | 444 | { |
da0c636e | 445 | return &per_cpu(cpu_topology, cpu).thread_mask; |
10ad34bc MS |
446 | } |
447 | ||
448 | ||
2dfd7476 VG |
449 | const struct cpumask *cpu_coregroup_mask(int cpu) |
450 | { | |
da0c636e | 451 | return &per_cpu(cpu_topology, cpu).core_mask; |
2dfd7476 VG |
452 | } |
453 | ||
454 | static const struct cpumask *cpu_book_mask(int cpu) | |
455 | { | |
da0c636e | 456 | return &per_cpu(cpu_topology, cpu).book_mask; |
2dfd7476 VG |
457 | } |
458 | ||
adac0f1e HC |
459 | static const struct cpumask *cpu_drawer_mask(int cpu) |
460 | { | |
461 | return &per_cpu(cpu_topology, cpu).drawer_mask; | |
462 | } | |
463 | ||
d05d15da HC |
464 | static int __init early_parse_topology(char *p) |
465 | { | |
4cc7ecb7 | 466 | return kstrtobool(p, &topology_enabled); |
d05d15da HC |
467 | } |
468 | early_param("topology", early_parse_topology); | |
469 | ||
2dfd7476 | 470 | static struct sched_domain_topology_level s390_topology[] = { |
10ad34bc | 471 | { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, |
2dfd7476 VG |
472 | { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, |
473 | { cpu_book_mask, SD_INIT_NAME(BOOK) }, | |
adac0f1e | 474 | { cpu_drawer_mask, SD_INIT_NAME(DRAWER) }, |
c0e5ddab | 475 | { cpu_cpu_mask, SD_INIT_NAME(DIE) }, |
2dfd7476 VG |
476 | { NULL, }, |
477 | }; | |
478 | ||
d05d15da HC |
479 | static void __init alloc_masks(struct sysinfo_15_1_x *info, |
480 | struct mask_info *mask, int offset) | |
481 | { | |
482 | int i, nr_masks; | |
483 | ||
484 | nr_masks = info->mag[TOPOLOGY_NR_MAG - offset]; | |
485 | for (i = 0; i < info->mnest - offset; i++) | |
486 | nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i]; | |
487 | nr_masks = max(nr_masks, 1); | |
488 | for (i = 0; i < nr_masks; i++) { | |
489 | mask->next = kzalloc(sizeof(*mask->next), GFP_KERNEL); | |
490 | mask = mask->next; | |
491 | } | |
492 | } | |
493 | ||
494 | static int __init s390_topology_init(void) | |
495 | { | |
496 | struct sysinfo_15_1_x *info; | |
497 | int i; | |
498 | ||
499 | if (!MACHINE_HAS_TOPOLOGY) | |
500 | return 0; | |
501 | tl_info = (struct sysinfo_15_1_x *)__get_free_page(GFP_KERNEL); | |
502 | info = tl_info; | |
503 | store_topology(info); | |
504 | pr_info("The CPU configuration topology of the machine is:"); | |
505 | for (i = 0; i < TOPOLOGY_NR_MAG; i++) | |
506 | printk(KERN_CONT " %d", info->mag[i]); | |
507 | printk(KERN_CONT " / %d\n", info->mnest); | |
508 | alloc_masks(info, &socket_info, 1); | |
509 | alloc_masks(info, &book_info, 2); | |
adac0f1e | 510 | alloc_masks(info, &drawer_info, 3); |
d05d15da HC |
511 | set_sched_topology(s390_topology); |
512 | return 0; | |
513 | } | |
514 | early_initcall(s390_topology_init); | |
515 | ||
83a24e32 HC |
516 | static int __init topology_init(void) |
517 | { | |
48e9a6c1 MS |
518 | if (MACHINE_HAS_TOPOLOGY) |
519 | set_topology_timer(); | |
520 | else | |
83a24e32 | 521 | topology_update_polarization_simple(); |
72f31889 | 522 | return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching); |
83a24e32 HC |
523 | } |
524 | device_initcall(topology_init); |