Commit | Line | Data |
---|---|---|
dbd70fb4 | 1 | /* |
a53c8fab | 2 | * Copyright IBM Corp. 2007, 2011 |
dbd70fb4 HC |
3 | * Author(s): Heiko Carstens <heiko.carstens@de.ibm.com> |
4 | */ | |
5 | ||
395d31d4 MS |
6 | #define KMSG_COMPONENT "cpu" |
7 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
8 | ||
83a24e32 | 9 | #include <linux/workqueue.h> |
83a24e32 HC |
10 | #include <linux/cpuset.h> |
11 | #include <linux/device.h> | |
80020fbd | 12 | #include <linux/export.h> |
83a24e32 | 13 | #include <linux/kernel.h> |
dbd70fb4 | 14 | #include <linux/sched.h> |
83a24e32 | 15 | #include <linux/delay.h> |
d05d15da HC |
16 | #include <linux/init.h> |
17 | #include <linux/slab.h> | |
dbd70fb4 HC |
18 | #include <linux/cpu.h> |
19 | #include <linux/smp.h> | |
83a24e32 | 20 | #include <linux/mm.h> |
3a368f74 PH |
21 | #include <linux/nodemask.h> |
22 | #include <linux/node.h> | |
78609132 | 23 | #include <asm/sysinfo.h> |
3a368f74 | 24 | #include <asm/numa.h> |
dbd70fb4 | 25 | |
c10fde0d HC |
26 | #define PTF_HORIZONTAL (0UL) |
27 | #define PTF_VERTICAL (1UL) | |
28 | #define PTF_CHECK (2UL) | |
dbd70fb4 | 29 | |
4cb14bc8 HC |
30 | struct mask_info { |
31 | struct mask_info *next; | |
10d38589 | 32 | unsigned char id; |
dbd70fb4 HC |
33 | cpumask_t mask; |
34 | }; | |
35 | ||
d1e57508 | 36 | static void set_topology_timer(void); |
dbd70fb4 | 37 | static void topology_work_fn(struct work_struct *work); |
c30f91b6 | 38 | static struct sysinfo_15_1_x *tl_info; |
dbd70fb4 | 39 | |
4cc7ecb7 | 40 | static bool topology_enabled = true; |
d1e57508 | 41 | static DECLARE_WORK(topology_work, topology_work_fn); |
d00aa4e7 | 42 | |
3a3814c2 | 43 | /* |
30fc4ca2 | 44 | * Socket/Book linked lists and cpu_topology updates are |
3a3814c2 MH |
45 | * protected by "sched_domains_mutex". |
46 | */ | |
d1e57508 | 47 | static struct mask_info socket_info; |
4cb14bc8 | 48 | static struct mask_info book_info; |
adac0f1e | 49 | static struct mask_info drawer_info; |
d1e57508 | 50 | |
30fc4ca2 HC |
51 | struct cpu_topology_s390 cpu_topology[NR_CPUS]; |
52 | EXPORT_SYMBOL_GPL(cpu_topology); | |
83a24e32 | 53 | |
4cb14bc8 | 54 | static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) |
dbd70fb4 | 55 | { |
dbd70fb4 HC |
56 | cpumask_t mask; |
57 | ||
d1e57508 HC |
58 | cpumask_copy(&mask, cpumask_of(cpu)); |
59 | if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) | |
0b52783d | 60 | return mask; |
d1e57508 HC |
61 | for (; info; info = info->next) { |
62 | if (cpumask_test_cpu(cpu, &info->mask)) | |
63 | return info->mask; | |
0b52783d | 64 | } |
dbd70fb4 HC |
65 | return mask; |
66 | } | |
67 | ||
10ad34bc MS |
68 | static cpumask_t cpu_thread_map(unsigned int cpu) |
69 | { | |
70 | cpumask_t mask; | |
71 | int i; | |
72 | ||
73 | cpumask_copy(&mask, cpumask_of(cpu)); | |
74 | if (!topology_enabled || !MACHINE_HAS_TOPOLOGY) | |
75 | return mask; | |
76 | cpu -= cpu % (smp_cpu_mtid + 1); | |
77 | for (i = 0; i <= smp_cpu_mtid; i++) | |
78 | if (cpu_present(cpu + i)) | |
79 | cpumask_set_cpu(cpu + i, &mask); | |
80 | return mask; | |
81 | } | |
82 | ||
86d18a55 HC |
83 | static void add_cpus_to_mask(struct topology_core *tl_core, |
84 | struct mask_info *drawer, | |
85 | struct mask_info *book, | |
86 | struct mask_info *socket) | |
dbd70fb4 | 87 | { |
439eb131 | 88 | struct cpu_topology_s390 *topo; |
10ad34bc | 89 | unsigned int core; |
dbd70fb4 | 90 | |
10ad34bc MS |
91 | for_each_set_bit(core, &tl_core->mask[0], TOPOLOGY_CORE_BITS) { |
92 | unsigned int rcore; | |
93 | int lcpu, i; | |
dbd70fb4 | 94 | |
10ad34bc MS |
95 | rcore = TOPOLOGY_CORE_BITS - 1 - core + tl_core->origin; |
96 | lcpu = smp_find_processor_id(rcore << smp_cpu_mt_shift); | |
d1e57508 HC |
97 | if (lcpu < 0) |
98 | continue; | |
10ad34bc | 99 | for (i = 0; i <= smp_cpu_mtid; i++) { |
30fc4ca2 | 100 | topo = &cpu_topology[lcpu + i]; |
adac0f1e | 101 | topo->drawer_id = drawer->id; |
439eb131 | 102 | topo->book_id = book->id; |
86d18a55 | 103 | topo->socket_id = socket->id; |
439eb131 HC |
104 | topo->core_id = rcore; |
105 | topo->thread_id = lcpu + i; | |
adac0f1e | 106 | cpumask_set_cpu(lcpu + i, &drawer->mask); |
10ad34bc MS |
107 | cpumask_set_cpu(lcpu + i, &book->mask); |
108 | cpumask_set_cpu(lcpu + i, &socket->mask); | |
10ad34bc | 109 | smp_cpu_set_polarization(lcpu + i, tl_core->pp); |
dbd70fb4 HC |
110 | } |
111 | } | |
112 | } | |
113 | ||
4cb14bc8 | 114 | static void clear_masks(void) |
dbd70fb4 | 115 | { |
4cb14bc8 | 116 | struct mask_info *info; |
dbd70fb4 | 117 | |
d1e57508 | 118 | info = &socket_info; |
4cb14bc8 | 119 | while (info) { |
0f1959f5 | 120 | cpumask_clear(&info->mask); |
4cb14bc8 HC |
121 | info = info->next; |
122 | } | |
4cb14bc8 HC |
123 | info = &book_info; |
124 | while (info) { | |
0f1959f5 | 125 | cpumask_clear(&info->mask); |
4cb14bc8 | 126 | info = info->next; |
dbd70fb4 | 127 | } |
adac0f1e HC |
128 | info = &drawer_info; |
129 | while (info) { | |
130 | cpumask_clear(&info->mask); | |
131 | info = info->next; | |
132 | } | |
dbd70fb4 HC |
133 | } |
134 | ||
c30f91b6 | 135 | static union topology_entry *next_tle(union topology_entry *tle) |
dbd70fb4 | 136 | { |
c30f91b6 | 137 | if (!tle->nl) |
10ad34bc | 138 | return (union topology_entry *)((struct topology_core *)tle + 1); |
c30f91b6 | 139 | return (union topology_entry *)((struct topology_container *)tle + 1); |
dbd70fb4 HC |
140 | } |
141 | ||
86d18a55 | 142 | static void tl_to_masks(struct sysinfo_15_1_x *info) |
dbd70fb4 | 143 | { |
d1e57508 | 144 | struct mask_info *socket = &socket_info; |
83a24e32 | 145 | struct mask_info *book = &book_info; |
adac0f1e | 146 | struct mask_info *drawer = &drawer_info; |
c30f91b6 | 147 | union topology_entry *tle, *end; |
4cb14bc8 | 148 | |
86d18a55 | 149 | clear_masks(); |
c10fde0d | 150 | tle = info->tle; |
c30f91b6 | 151 | end = (union topology_entry *)((unsigned long)info + info->length); |
dbd70fb4 HC |
152 | while (tle < end) { |
153 | switch (tle->nl) { | |
adac0f1e HC |
154 | case 3: |
155 | drawer = drawer->next; | |
156 | drawer->id = tle->container.id; | |
157 | break; | |
dbd70fb4 | 158 | case 2: |
4cb14bc8 HC |
159 | book = book->next; |
160 | book->id = tle->container.id; | |
dbd70fb4 HC |
161 | break; |
162 | case 1: | |
d1e57508 HC |
163 | socket = socket->next; |
164 | socket->id = tle->container.id; | |
dbd70fb4 HC |
165 | break; |
166 | case 0: | |
86d18a55 | 167 | add_cpus_to_mask(&tle->cpu, drawer, book, socket); |
4baeb964 HC |
168 | break; |
169 | default: | |
170 | clear_masks(); | |
171 | return; | |
172 | } | |
173 | tle = next_tle(tle); | |
174 | } | |
175 | } | |
176 | ||
c10fde0d HC |
177 | static void topology_update_polarization_simple(void) |
178 | { | |
179 | int cpu; | |
180 | ||
181 | mutex_lock(&smp_cpu_state_mutex); | |
5439050f | 182 | for_each_possible_cpu(cpu) |
50ab9a9a | 183 | smp_cpu_set_polarization(cpu, POLARIZATION_HRZ); |
c10fde0d HC |
184 | mutex_unlock(&smp_cpu_state_mutex); |
185 | } | |
186 | ||
187 | static int ptf(unsigned long fc) | |
dbd70fb4 HC |
188 | { |
189 | int rc; | |
190 | ||
191 | asm volatile( | |
192 | " .insn rre,0xb9a20000,%1,%1\n" | |
193 | " ipm %0\n" | |
194 | " srl %0,28\n" | |
195 | : "=d" (rc) | |
c10fde0d HC |
196 | : "d" (fc) : "cc"); |
197 | return rc; | |
198 | } | |
199 | ||
200 | int topology_set_cpu_management(int fc) | |
201 | { | |
83a24e32 | 202 | int cpu, rc; |
c10fde0d | 203 | |
9186d7a9 | 204 | if (!MACHINE_HAS_TOPOLOGY) |
c10fde0d HC |
205 | return -EOPNOTSUPP; |
206 | if (fc) | |
207 | rc = ptf(PTF_VERTICAL); | |
208 | else | |
209 | rc = ptf(PTF_HORIZONTAL); | |
210 | if (rc) | |
211 | return -EBUSY; | |
5439050f | 212 | for_each_possible_cpu(cpu) |
50ab9a9a | 213 | smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); |
dbd70fb4 HC |
214 | return rc; |
215 | } | |
216 | ||
d1e57508 | 217 | static void update_cpu_masks(void) |
d00aa4e7 | 218 | { |
439eb131 | 219 | struct cpu_topology_s390 *topo; |
d00aa4e7 HC |
220 | int cpu; |
221 | ||
4cb14bc8 | 222 | for_each_possible_cpu(cpu) { |
30fc4ca2 | 223 | topo = &cpu_topology[cpu]; |
439eb131 HC |
224 | topo->thread_mask = cpu_thread_map(cpu); |
225 | topo->core_mask = cpu_group_map(&socket_info, cpu); | |
226 | topo->book_mask = cpu_group_map(&book_info, cpu); | |
adac0f1e | 227 | topo->drawer_mask = cpu_group_map(&drawer_info, cpu); |
d1e57508 | 228 | if (!MACHINE_HAS_TOPOLOGY) { |
439eb131 HC |
229 | topo->thread_id = cpu; |
230 | topo->core_id = cpu; | |
231 | topo->socket_id = cpu; | |
232 | topo->book_id = cpu; | |
adac0f1e | 233 | topo->drawer_id = cpu; |
d1e57508 | 234 | } |
4cb14bc8 | 235 | } |
3a368f74 | 236 | numa_update_cpu_topology(); |
4cb14bc8 HC |
237 | } |
238 | ||
96f4a70d | 239 | void store_topology(struct sysinfo_15_1_x *info) |
4cb14bc8 | 240 | { |
adac0f1e | 241 | stsi(info, 15, 1, min(topology_max_mnest, 4)); |
d00aa4e7 HC |
242 | } |
243 | ||
ee79d1bd | 244 | int arch_update_cpu_topology(void) |
dbd70fb4 | 245 | { |
c30f91b6 | 246 | struct sysinfo_15_1_x *info = tl_info; |
8a25a2fd | 247 | struct device *dev; |
3a368f74 | 248 | int cpu, rc = 0; |
dbd70fb4 | 249 | |
3a368f74 PH |
250 | if (MACHINE_HAS_TOPOLOGY) { |
251 | rc = 1; | |
252 | store_topology(info); | |
253 | tl_to_masks(info); | |
c10fde0d | 254 | } |
d1e57508 | 255 | update_cpu_masks(); |
3a368f74 PH |
256 | if (!MACHINE_HAS_TOPOLOGY) |
257 | topology_update_polarization_simple(); | |
dbd70fb4 | 258 | for_each_online_cpu(cpu) { |
8a25a2fd KS |
259 | dev = get_cpu_device(cpu); |
260 | kobject_uevent(&dev->kobj, KOBJ_CHANGE); | |
dbd70fb4 | 261 | } |
3a368f74 | 262 | return rc; |
dbd70fb4 HC |
263 | } |
264 | ||
fd781fa2 HC |
265 | static void topology_work_fn(struct work_struct *work) |
266 | { | |
f414f5f1 | 267 | rebuild_sched_domains(); |
dbd70fb4 HC |
268 | } |
269 | ||
c10fde0d HC |
270 | void topology_schedule_update(void) |
271 | { | |
272 | schedule_work(&topology_work); | |
273 | } | |
274 | ||
dbd70fb4 HC |
275 | static void topology_timer_fn(unsigned long ignored) |
276 | { | |
c10fde0d HC |
277 | if (ptf(PTF_CHECK)) |
278 | topology_schedule_update(); | |
dbd70fb4 HC |
279 | set_topology_timer(); |
280 | } | |
281 | ||
d68bddb7 HC |
282 | static struct timer_list topology_timer = |
283 | TIMER_DEFERRED_INITIALIZER(topology_timer_fn, 0, 0); | |
284 | ||
285 | static atomic_t topology_poll = ATOMIC_INIT(0); | |
286 | ||
dbd70fb4 HC |
287 | static void set_topology_timer(void) |
288 | { | |
d68bddb7 HC |
289 | if (atomic_add_unless(&topology_poll, -1, 0)) |
290 | mod_timer(&topology_timer, jiffies + HZ / 10); | |
291 | else | |
292 | mod_timer(&topology_timer, jiffies + HZ * 60); | |
293 | } | |
294 | ||
295 | void topology_expect_change(void) | |
296 | { | |
297 | if (!MACHINE_HAS_TOPOLOGY) | |
298 | return; | |
299 | /* This is racy, but it doesn't matter since it is just a heuristic. | |
300 | * Worst case is that we poll in a higher frequency for a bit longer. | |
301 | */ | |
302 | if (atomic_read(&topology_poll) > 60) | |
303 | return; | |
304 | atomic_add(60, &topology_poll); | |
305 | set_topology_timer(); | |
dbd70fb4 HC |
306 | } |
307 | ||
83a24e32 HC |
308 | static int cpu_management; |
309 | ||
72f31889 LT |
310 | static ssize_t dispatching_show(struct device *dev, |
311 | struct device_attribute *attr, | |
83a24e32 HC |
312 | char *buf) |
313 | { | |
314 | ssize_t count; | |
315 | ||
316 | mutex_lock(&smp_cpu_state_mutex); | |
317 | count = sprintf(buf, "%d\n", cpu_management); | |
318 | mutex_unlock(&smp_cpu_state_mutex); | |
319 | return count; | |
320 | } | |
321 | ||
72f31889 LT |
322 | static ssize_t dispatching_store(struct device *dev, |
323 | struct device_attribute *attr, | |
83a24e32 HC |
324 | const char *buf, |
325 | size_t count) | |
326 | { | |
327 | int val, rc; | |
328 | char delim; | |
329 | ||
330 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
331 | return -EINVAL; | |
332 | if (val != 0 && val != 1) | |
333 | return -EINVAL; | |
334 | rc = 0; | |
335 | get_online_cpus(); | |
336 | mutex_lock(&smp_cpu_state_mutex); | |
337 | if (cpu_management == val) | |
338 | goto out; | |
339 | rc = topology_set_cpu_management(val); | |
d68bddb7 HC |
340 | if (rc) |
341 | goto out; | |
342 | cpu_management = val; | |
343 | topology_expect_change(); | |
83a24e32 HC |
344 | out: |
345 | mutex_unlock(&smp_cpu_state_mutex); | |
346 | put_online_cpus(); | |
347 | return rc ? rc : count; | |
348 | } | |
72f31889 | 349 | static DEVICE_ATTR(dispatching, 0644, dispatching_show, |
83a24e32 HC |
350 | dispatching_store); |
351 | ||
72f31889 LT |
352 | static ssize_t cpu_polarization_show(struct device *dev, |
353 | struct device_attribute *attr, char *buf) | |
83a24e32 HC |
354 | { |
355 | int cpu = dev->id; | |
356 | ssize_t count; | |
357 | ||
358 | mutex_lock(&smp_cpu_state_mutex); | |
50ab9a9a | 359 | switch (smp_cpu_get_polarization(cpu)) { |
83a24e32 HC |
360 | case POLARIZATION_HRZ: |
361 | count = sprintf(buf, "horizontal\n"); | |
362 | break; | |
363 | case POLARIZATION_VL: | |
364 | count = sprintf(buf, "vertical:low\n"); | |
365 | break; | |
366 | case POLARIZATION_VM: | |
367 | count = sprintf(buf, "vertical:medium\n"); | |
368 | break; | |
369 | case POLARIZATION_VH: | |
370 | count = sprintf(buf, "vertical:high\n"); | |
371 | break; | |
372 | default: | |
373 | count = sprintf(buf, "unknown\n"); | |
374 | break; | |
375 | } | |
376 | mutex_unlock(&smp_cpu_state_mutex); | |
377 | return count; | |
378 | } | |
72f31889 | 379 | static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL); |
83a24e32 HC |
380 | |
381 | static struct attribute *topology_cpu_attrs[] = { | |
72f31889 | 382 | &dev_attr_polarization.attr, |
83a24e32 HC |
383 | NULL, |
384 | }; | |
385 | ||
386 | static struct attribute_group topology_cpu_attr_group = { | |
387 | .attrs = topology_cpu_attrs, | |
388 | }; | |
389 | ||
390 | int topology_cpu_init(struct cpu *cpu) | |
391 | { | |
72f31889 | 392 | return sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group); |
83a24e32 HC |
393 | } |
394 | ||
3ddb1b75 | 395 | static const struct cpumask *cpu_thread_mask(int cpu) |
10ad34bc | 396 | { |
30fc4ca2 | 397 | return &cpu_topology[cpu].thread_mask; |
10ad34bc MS |
398 | } |
399 | ||
400 | ||
2dfd7476 VG |
401 | const struct cpumask *cpu_coregroup_mask(int cpu) |
402 | { | |
30fc4ca2 | 403 | return &cpu_topology[cpu].core_mask; |
2dfd7476 VG |
404 | } |
405 | ||
406 | static const struct cpumask *cpu_book_mask(int cpu) | |
407 | { | |
30fc4ca2 | 408 | return &cpu_topology[cpu].book_mask; |
2dfd7476 VG |
409 | } |
410 | ||
adac0f1e HC |
411 | static const struct cpumask *cpu_drawer_mask(int cpu) |
412 | { | |
30fc4ca2 | 413 | return &cpu_topology[cpu].drawer_mask; |
adac0f1e HC |
414 | } |
415 | ||
d05d15da HC |
416 | static int __init early_parse_topology(char *p) |
417 | { | |
4cc7ecb7 | 418 | return kstrtobool(p, &topology_enabled); |
d05d15da HC |
419 | } |
420 | early_param("topology", early_parse_topology); | |
421 | ||
2dfd7476 | 422 | static struct sched_domain_topology_level s390_topology[] = { |
10ad34bc | 423 | { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, |
2dfd7476 VG |
424 | { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, |
425 | { cpu_book_mask, SD_INIT_NAME(BOOK) }, | |
adac0f1e | 426 | { cpu_drawer_mask, SD_INIT_NAME(DRAWER) }, |
c0e5ddab | 427 | { cpu_cpu_mask, SD_INIT_NAME(DIE) }, |
2dfd7476 VG |
428 | { NULL, }, |
429 | }; | |
430 | ||
d05d15da HC |
431 | static void __init alloc_masks(struct sysinfo_15_1_x *info, |
432 | struct mask_info *mask, int offset) | |
433 | { | |
434 | int i, nr_masks; | |
435 | ||
436 | nr_masks = info->mag[TOPOLOGY_NR_MAG - offset]; | |
437 | for (i = 0; i < info->mnest - offset; i++) | |
438 | nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i]; | |
439 | nr_masks = max(nr_masks, 1); | |
440 | for (i = 0; i < nr_masks; i++) { | |
441 | mask->next = kzalloc(sizeof(*mask->next), GFP_KERNEL); | |
442 | mask = mask->next; | |
443 | } | |
444 | } | |
445 | ||
446 | static int __init s390_topology_init(void) | |
447 | { | |
448 | struct sysinfo_15_1_x *info; | |
449 | int i; | |
450 | ||
ebb299a5 | 451 | set_sched_topology(s390_topology); |
d05d15da HC |
452 | if (!MACHINE_HAS_TOPOLOGY) |
453 | return 0; | |
454 | tl_info = (struct sysinfo_15_1_x *)__get_free_page(GFP_KERNEL); | |
455 | info = tl_info; | |
456 | store_topology(info); | |
457 | pr_info("The CPU configuration topology of the machine is:"); | |
458 | for (i = 0; i < TOPOLOGY_NR_MAG; i++) | |
459 | printk(KERN_CONT " %d", info->mag[i]); | |
460 | printk(KERN_CONT " / %d\n", info->mnest); | |
461 | alloc_masks(info, &socket_info, 1); | |
462 | alloc_masks(info, &book_info, 2); | |
adac0f1e | 463 | alloc_masks(info, &drawer_info, 3); |
d05d15da HC |
464 | return 0; |
465 | } | |
466 | early_initcall(s390_topology_init); | |
467 | ||
83a24e32 HC |
468 | static int __init topology_init(void) |
469 | { | |
48e9a6c1 MS |
470 | if (MACHINE_HAS_TOPOLOGY) |
471 | set_topology_timer(); | |
472 | else | |
83a24e32 | 473 | topology_update_polarization_simple(); |
72f31889 | 474 | return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching); |
83a24e32 HC |
475 | } |
476 | device_initcall(topology_init); |