Commit | Line | Data |
---|---|---|
a17ae4c3 | 1 | // SPDX-License-Identifier: GPL-2.0 |
dbd70fb4 | 2 | /* |
a53c8fab | 3 | * Copyright IBM Corp. 2007, 2011 |
dbd70fb4 HC |
4 | */ |
5 | ||
395d31d4 MS |
6 | #define KMSG_COMPONENT "cpu" |
7 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
8 | ||
83a24e32 | 9 | #include <linux/workqueue.h> |
57c8a661 | 10 | #include <linux/memblock.h> |
51dce386 HC |
11 | #include <linux/uaccess.h> |
12 | #include <linux/sysctl.h> | |
83a24e32 HC |
13 | #include <linux/cpuset.h> |
14 | #include <linux/device.h> | |
80020fbd | 15 | #include <linux/export.h> |
83a24e32 | 16 | #include <linux/kernel.h> |
dbd70fb4 | 17 | #include <linux/sched.h> |
105ab3d8 | 18 | #include <linux/sched/topology.h> |
83a24e32 | 19 | #include <linux/delay.h> |
d05d15da HC |
20 | #include <linux/init.h> |
21 | #include <linux/slab.h> | |
dbd70fb4 HC |
22 | #include <linux/cpu.h> |
23 | #include <linux/smp.h> | |
83a24e32 | 24 | #include <linux/mm.h> |
3a368f74 PH |
25 | #include <linux/nodemask.h> |
26 | #include <linux/node.h> | |
78609132 | 27 | #include <asm/sysinfo.h> |
dbd70fb4 | 28 | |
c10fde0d HC |
29 | #define PTF_HORIZONTAL (0UL) |
30 | #define PTF_VERTICAL (1UL) | |
31 | #define PTF_CHECK (2UL) | |
dbd70fb4 | 32 | |
1b25fda0 HC |
33 | enum { |
34 | TOPOLOGY_MODE_HW, | |
35 | TOPOLOGY_MODE_SINGLE, | |
36 | TOPOLOGY_MODE_PACKAGE, | |
37 | TOPOLOGY_MODE_UNINITIALIZED | |
38 | }; | |
39 | ||
4cb14bc8 HC |
40 | struct mask_info { |
41 | struct mask_info *next; | |
10d38589 | 42 | unsigned char id; |
dbd70fb4 HC |
43 | cpumask_t mask; |
44 | }; | |
45 | ||
1b25fda0 | 46 | static int topology_mode = TOPOLOGY_MODE_UNINITIALIZED; |
d1e57508 | 47 | static void set_topology_timer(void); |
dbd70fb4 | 48 | static void topology_work_fn(struct work_struct *work); |
c30f91b6 | 49 | static struct sysinfo_15_1_x *tl_info; |
dbd70fb4 | 50 | |
d1e57508 | 51 | static DECLARE_WORK(topology_work, topology_work_fn); |
d00aa4e7 | 52 | |
3a3814c2 | 53 | /* |
30fc4ca2 | 54 | * Socket/Book linked lists and cpu_topology updates are |
3a3814c2 MH |
55 | * protected by "sched_domains_mutex". |
56 | */ | |
d1e57508 | 57 | static struct mask_info socket_info; |
4cb14bc8 | 58 | static struct mask_info book_info; |
adac0f1e | 59 | static struct mask_info drawer_info; |
d1e57508 | 60 | |
30fc4ca2 HC |
61 | struct cpu_topology_s390 cpu_topology[NR_CPUS]; |
62 | EXPORT_SYMBOL_GPL(cpu_topology); | |
83a24e32 | 63 | |
da6d2c28 | 64 | static void cpu_group_map(cpumask_t *dst, struct mask_info *info, unsigned int cpu) |
dbd70fb4 | 65 | { |
da6d2c28 | 66 | static cpumask_t mask; |
dbd70fb4 | 67 | |
9e3d62d5 | 68 | cpumask_clear(&mask); |
a052096b | 69 | if (!cpumask_test_cpu(cpu, &cpu_setup_mask)) |
9e3d62d5 SS |
70 | goto out; |
71 | cpumask_set_cpu(cpu, &mask); | |
1b25fda0 HC |
72 | switch (topology_mode) { |
73 | case TOPOLOGY_MODE_HW: | |
74 | while (info) { | |
75 | if (cpumask_test_cpu(cpu, &info->mask)) { | |
da6d2c28 | 76 | cpumask_copy(&mask, &info->mask); |
1b25fda0 HC |
77 | break; |
78 | } | |
79 | info = info->next; | |
80 | } | |
1b25fda0 HC |
81 | break; |
82 | case TOPOLOGY_MODE_PACKAGE: | |
83 | cpumask_copy(&mask, cpu_present_mask); | |
84 | break; | |
85 | default: | |
2c7749b9 | 86 | fallthrough; |
1b25fda0 | 87 | case TOPOLOGY_MODE_SINGLE: |
1b25fda0 | 88 | break; |
0b52783d | 89 | } |
a052096b | 90 | cpumask_and(&mask, &mask, &cpu_setup_mask); |
9e3d62d5 | 91 | out: |
da6d2c28 | 92 | cpumask_copy(dst, &mask); |
dbd70fb4 HC |
93 | } |
94 | ||
da6d2c28 | 95 | static void cpu_thread_map(cpumask_t *dst, unsigned int cpu) |
10ad34bc | 96 | { |
da6d2c28 | 97 | static cpumask_t mask; |
a33239be | 98 | unsigned int max_cpu; |
10ad34bc | 99 | |
9e3d62d5 | 100 | cpumask_clear(&mask); |
a052096b | 101 | if (!cpumask_test_cpu(cpu, &cpu_setup_mask)) |
9e3d62d5 SS |
102 | goto out; |
103 | cpumask_set_cpu(cpu, &mask); | |
1b25fda0 | 104 | if (topology_mode != TOPOLOGY_MODE_HW) |
da6d2c28 | 105 | goto out; |
10ad34bc | 106 | cpu -= cpu % (smp_cpu_mtid + 1); |
a33239be AG |
107 | max_cpu = min(cpu + smp_cpu_mtid, nr_cpu_ids - 1); |
108 | for (; cpu <= max_cpu; cpu++) { | |
109 | if (cpumask_test_cpu(cpu, &cpu_setup_mask)) | |
110 | cpumask_set_cpu(cpu, &mask); | |
a052096b | 111 | } |
da6d2c28 HC |
112 | out: |
113 | cpumask_copy(dst, &mask); | |
10ad34bc MS |
114 | } |
115 | ||
251ea0ca HC |
116 | #define TOPOLOGY_CORE_BITS 64 |
117 | ||
86d18a55 HC |
118 | static void add_cpus_to_mask(struct topology_core *tl_core, |
119 | struct mask_info *drawer, | |
120 | struct mask_info *book, | |
121 | struct mask_info *socket) | |
dbd70fb4 | 122 | { |
439eb131 | 123 | struct cpu_topology_s390 *topo; |
10ad34bc | 124 | unsigned int core; |
dbd70fb4 | 125 | |
251ea0ca | 126 | for_each_set_bit(core, &tl_core->mask, TOPOLOGY_CORE_BITS) { |
a33239be AG |
127 | unsigned int max_cpu, rcore; |
128 | int cpu; | |
dbd70fb4 | 129 | |
10ad34bc | 130 | rcore = TOPOLOGY_CORE_BITS - 1 - core + tl_core->origin; |
a33239be AG |
131 | cpu = smp_find_processor_id(rcore << smp_cpu_mt_shift); |
132 | if (cpu < 0) | |
d1e57508 | 133 | continue; |
a33239be AG |
134 | max_cpu = min(cpu + smp_cpu_mtid, nr_cpu_ids - 1); |
135 | for (; cpu <= max_cpu; cpu++) { | |
136 | topo = &cpu_topology[cpu]; | |
adac0f1e | 137 | topo->drawer_id = drawer->id; |
439eb131 | 138 | topo->book_id = book->id; |
86d18a55 | 139 | topo->socket_id = socket->id; |
439eb131 | 140 | topo->core_id = rcore; |
a33239be | 141 | topo->thread_id = cpu; |
1887aa07 | 142 | topo->dedicated = tl_core->d; |
a33239be AG |
143 | cpumask_set_cpu(cpu, &drawer->mask); |
144 | cpumask_set_cpu(cpu, &book->mask); | |
145 | cpumask_set_cpu(cpu, &socket->mask); | |
146 | smp_cpu_set_polarization(cpu, tl_core->pp); | |
dbd70fb4 HC |
147 | } |
148 | } | |
149 | } | |
150 | ||
4cb14bc8 | 151 | static void clear_masks(void) |
dbd70fb4 | 152 | { |
4cb14bc8 | 153 | struct mask_info *info; |
dbd70fb4 | 154 | |
d1e57508 | 155 | info = &socket_info; |
4cb14bc8 | 156 | while (info) { |
0f1959f5 | 157 | cpumask_clear(&info->mask); |
4cb14bc8 HC |
158 | info = info->next; |
159 | } | |
4cb14bc8 HC |
160 | info = &book_info; |
161 | while (info) { | |
0f1959f5 | 162 | cpumask_clear(&info->mask); |
4cb14bc8 | 163 | info = info->next; |
dbd70fb4 | 164 | } |
adac0f1e HC |
165 | info = &drawer_info; |
166 | while (info) { | |
167 | cpumask_clear(&info->mask); | |
168 | info = info->next; | |
169 | } | |
dbd70fb4 HC |
170 | } |
171 | ||
c30f91b6 | 172 | static union topology_entry *next_tle(union topology_entry *tle) |
dbd70fb4 | 173 | { |
c30f91b6 | 174 | if (!tle->nl) |
10ad34bc | 175 | return (union topology_entry *)((struct topology_core *)tle + 1); |
c30f91b6 | 176 | return (union topology_entry *)((struct topology_container *)tle + 1); |
dbd70fb4 HC |
177 | } |
178 | ||
86d18a55 | 179 | static void tl_to_masks(struct sysinfo_15_1_x *info) |
dbd70fb4 | 180 | { |
d1e57508 | 181 | struct mask_info *socket = &socket_info; |
83a24e32 | 182 | struct mask_info *book = &book_info; |
adac0f1e | 183 | struct mask_info *drawer = &drawer_info; |
c30f91b6 | 184 | union topology_entry *tle, *end; |
4cb14bc8 | 185 | |
86d18a55 | 186 | clear_masks(); |
c10fde0d | 187 | tle = info->tle; |
c30f91b6 | 188 | end = (union topology_entry *)((unsigned long)info + info->length); |
dbd70fb4 HC |
189 | while (tle < end) { |
190 | switch (tle->nl) { | |
adac0f1e HC |
191 | case 3: |
192 | drawer = drawer->next; | |
193 | drawer->id = tle->container.id; | |
194 | break; | |
dbd70fb4 | 195 | case 2: |
4cb14bc8 HC |
196 | book = book->next; |
197 | book->id = tle->container.id; | |
dbd70fb4 HC |
198 | break; |
199 | case 1: | |
d1e57508 HC |
200 | socket = socket->next; |
201 | socket->id = tle->container.id; | |
dbd70fb4 HC |
202 | break; |
203 | case 0: | |
86d18a55 | 204 | add_cpus_to_mask(&tle->cpu, drawer, book, socket); |
4baeb964 HC |
205 | break; |
206 | default: | |
207 | clear_masks(); | |
208 | return; | |
209 | } | |
210 | tle = next_tle(tle); | |
211 | } | |
212 | } | |
213 | ||
c10fde0d HC |
214 | static void topology_update_polarization_simple(void) |
215 | { | |
216 | int cpu; | |
217 | ||
5439050f | 218 | for_each_possible_cpu(cpu) |
50ab9a9a | 219 | smp_cpu_set_polarization(cpu, POLARIZATION_HRZ); |
c10fde0d HC |
220 | } |
221 | ||
222 | static int ptf(unsigned long fc) | |
dbd70fb4 HC |
223 | { |
224 | int rc; | |
225 | ||
226 | asm volatile( | |
227 | " .insn rre,0xb9a20000,%1,%1\n" | |
228 | " ipm %0\n" | |
229 | " srl %0,28\n" | |
230 | : "=d" (rc) | |
c10fde0d HC |
231 | : "d" (fc) : "cc"); |
232 | return rc; | |
233 | } | |
234 | ||
235 | int topology_set_cpu_management(int fc) | |
236 | { | |
83a24e32 | 237 | int cpu, rc; |
c10fde0d | 238 | |
9186d7a9 | 239 | if (!MACHINE_HAS_TOPOLOGY) |
c10fde0d HC |
240 | return -EOPNOTSUPP; |
241 | if (fc) | |
242 | rc = ptf(PTF_VERTICAL); | |
243 | else | |
244 | rc = ptf(PTF_HORIZONTAL); | |
245 | if (rc) | |
246 | return -EBUSY; | |
5439050f | 247 | for_each_possible_cpu(cpu) |
50ab9a9a | 248 | smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN); |
dbd70fb4 HC |
249 | return rc; |
250 | } | |
251 | ||
52aeda7a | 252 | void update_cpu_masks(void) |
d00aa4e7 | 253 | { |
95968497 AG |
254 | struct cpu_topology_s390 *topo, *topo_package, *topo_sibling; |
255 | int cpu, sibling, pkg_first, smt_first, id; | |
d00aa4e7 | 256 | |
4cb14bc8 | 257 | for_each_possible_cpu(cpu) { |
30fc4ca2 | 258 | topo = &cpu_topology[cpu]; |
da6d2c28 HC |
259 | cpu_thread_map(&topo->thread_mask, cpu); |
260 | cpu_group_map(&topo->core_mask, &socket_info, cpu); | |
261 | cpu_group_map(&topo->book_mask, &book_info, cpu); | |
262 | cpu_group_map(&topo->drawer_mask, &drawer_info, cpu); | |
95968497 | 263 | topo->booted_cores = 0; |
1b25fda0 HC |
264 | if (topology_mode != TOPOLOGY_MODE_HW) { |
265 | id = topology_mode == TOPOLOGY_MODE_PACKAGE ? 0 : cpu; | |
439eb131 HC |
266 | topo->thread_id = cpu; |
267 | topo->core_id = cpu; | |
1b25fda0 HC |
268 | topo->socket_id = id; |
269 | topo->book_id = id; | |
270 | topo->drawer_id = id; | |
d1e57508 | 271 | } |
4cb14bc8 | 272 | } |
95968497 AG |
273 | for_each_online_cpu(cpu) { |
274 | topo = &cpu_topology[cpu]; | |
275 | pkg_first = cpumask_first(&topo->core_mask); | |
276 | topo_package = &cpu_topology[pkg_first]; | |
277 | if (cpu == pkg_first) { | |
278 | for_each_cpu(sibling, &topo->core_mask) { | |
279 | topo_sibling = &cpu_topology[sibling]; | |
280 | smt_first = cpumask_first(&topo_sibling->thread_mask); | |
281 | if (sibling == smt_first) | |
282 | topo_package->booted_cores++; | |
283 | } | |
284 | } else { | |
285 | topo->booted_cores = topo_package->booted_cores; | |
286 | } | |
287 | } | |
4cb14bc8 HC |
288 | } |
289 | ||
96f4a70d | 290 | void store_topology(struct sysinfo_15_1_x *info) |
4cb14bc8 | 291 | { |
ae5ca67a | 292 | stsi(info, 15, 1, topology_mnest_limit()); |
d00aa4e7 HC |
293 | } |
294 | ||
1887aa07 MS |
295 | static void __arch_update_dedicated_flag(void *arg) |
296 | { | |
297 | if (topology_cpu_dedicated(smp_processor_id())) | |
298 | set_cpu_flag(CIF_DEDICATED_CPU); | |
299 | else | |
300 | clear_cpu_flag(CIF_DEDICATED_CPU); | |
301 | } | |
302 | ||
8c910580 | 303 | static int __arch_update_cpu_topology(void) |
dbd70fb4 | 304 | { |
c30f91b6 | 305 | struct sysinfo_15_1_x *info = tl_info; |
8c910580 | 306 | int rc = 0; |
dbd70fb4 | 307 | |
51dce386 | 308 | mutex_lock(&smp_cpu_state_mutex); |
3a368f74 PH |
309 | if (MACHINE_HAS_TOPOLOGY) { |
310 | rc = 1; | |
311 | store_topology(info); | |
312 | tl_to_masks(info); | |
c10fde0d | 313 | } |
d1e57508 | 314 | update_cpu_masks(); |
3a368f74 PH |
315 | if (!MACHINE_HAS_TOPOLOGY) |
316 | topology_update_polarization_simple(); | |
51dce386 | 317 | mutex_unlock(&smp_cpu_state_mutex); |
8c910580 HC |
318 | return rc; |
319 | } | |
320 | ||
321 | int arch_update_cpu_topology(void) | |
322 | { | |
323 | struct device *dev; | |
324 | int cpu, rc; | |
325 | ||
326 | rc = __arch_update_cpu_topology(); | |
1887aa07 | 327 | on_each_cpu(__arch_update_dedicated_flag, NULL, 0); |
dbd70fb4 | 328 | for_each_online_cpu(cpu) { |
8a25a2fd | 329 | dev = get_cpu_device(cpu); |
f3122a79 VG |
330 | if (dev) |
331 | kobject_uevent(&dev->kobj, KOBJ_CHANGE); | |
dbd70fb4 | 332 | } |
3a368f74 | 333 | return rc; |
dbd70fb4 HC |
334 | } |
335 | ||
fd781fa2 HC |
336 | static void topology_work_fn(struct work_struct *work) |
337 | { | |
f414f5f1 | 338 | rebuild_sched_domains(); |
dbd70fb4 HC |
339 | } |
340 | ||
c10fde0d HC |
341 | void topology_schedule_update(void) |
342 | { | |
343 | schedule_work(&topology_work); | |
344 | } | |
345 | ||
51dce386 HC |
346 | static void topology_flush_work(void) |
347 | { | |
348 | flush_work(&topology_work); | |
349 | } | |
350 | ||
5cd79d6a | 351 | static void topology_timer_fn(struct timer_list *unused) |
dbd70fb4 | 352 | { |
c10fde0d HC |
353 | if (ptf(PTF_CHECK)) |
354 | topology_schedule_update(); | |
dbd70fb4 HC |
355 | set_topology_timer(); |
356 | } | |
357 | ||
5cd79d6a | 358 | static struct timer_list topology_timer; |
d68bddb7 HC |
359 | |
360 | static atomic_t topology_poll = ATOMIC_INIT(0); | |
361 | ||
dbd70fb4 HC |
362 | static void set_topology_timer(void) |
363 | { | |
d68bddb7 | 364 | if (atomic_add_unless(&topology_poll, -1, 0)) |
0188d08a | 365 | mod_timer(&topology_timer, jiffies + msecs_to_jiffies(100)); |
d68bddb7 | 366 | else |
0188d08a | 367 | mod_timer(&topology_timer, jiffies + msecs_to_jiffies(60 * MSEC_PER_SEC)); |
d68bddb7 HC |
368 | } |
369 | ||
370 | void topology_expect_change(void) | |
371 | { | |
372 | if (!MACHINE_HAS_TOPOLOGY) | |
373 | return; | |
374 | /* This is racy, but it doesn't matter since it is just a heuristic. | |
375 | * Worst case is that we poll in a higher frequency for a bit longer. | |
376 | */ | |
377 | if (atomic_read(&topology_poll) > 60) | |
378 | return; | |
379 | atomic_add(60, &topology_poll); | |
380 | set_topology_timer(); | |
dbd70fb4 HC |
381 | } |
382 | ||
83a24e32 HC |
383 | static int cpu_management; |
384 | ||
72f31889 LT |
385 | static ssize_t dispatching_show(struct device *dev, |
386 | struct device_attribute *attr, | |
83a24e32 HC |
387 | char *buf) |
388 | { | |
389 | ssize_t count; | |
390 | ||
391 | mutex_lock(&smp_cpu_state_mutex); | |
392 | count = sprintf(buf, "%d\n", cpu_management); | |
393 | mutex_unlock(&smp_cpu_state_mutex); | |
394 | return count; | |
395 | } | |
396 | ||
72f31889 LT |
397 | static ssize_t dispatching_store(struct device *dev, |
398 | struct device_attribute *attr, | |
83a24e32 HC |
399 | const char *buf, |
400 | size_t count) | |
401 | { | |
402 | int val, rc; | |
403 | char delim; | |
404 | ||
405 | if (sscanf(buf, "%d %c", &val, &delim) != 1) | |
406 | return -EINVAL; | |
407 | if (val != 0 && val != 1) | |
408 | return -EINVAL; | |
409 | rc = 0; | |
a73de293 | 410 | cpus_read_lock(); |
83a24e32 HC |
411 | mutex_lock(&smp_cpu_state_mutex); |
412 | if (cpu_management == val) | |
413 | goto out; | |
414 | rc = topology_set_cpu_management(val); | |
d68bddb7 HC |
415 | if (rc) |
416 | goto out; | |
417 | cpu_management = val; | |
418 | topology_expect_change(); | |
83a24e32 HC |
419 | out: |
420 | mutex_unlock(&smp_cpu_state_mutex); | |
a73de293 | 421 | cpus_read_unlock(); |
83a24e32 HC |
422 | return rc ? rc : count; |
423 | } | |
b6b996b6 | 424 | static DEVICE_ATTR_RW(dispatching); |
83a24e32 | 425 | |
72f31889 LT |
426 | static ssize_t cpu_polarization_show(struct device *dev, |
427 | struct device_attribute *attr, char *buf) | |
83a24e32 HC |
428 | { |
429 | int cpu = dev->id; | |
430 | ssize_t count; | |
431 | ||
432 | mutex_lock(&smp_cpu_state_mutex); | |
50ab9a9a | 433 | switch (smp_cpu_get_polarization(cpu)) { |
83a24e32 HC |
434 | case POLARIZATION_HRZ: |
435 | count = sprintf(buf, "horizontal\n"); | |
436 | break; | |
437 | case POLARIZATION_VL: | |
438 | count = sprintf(buf, "vertical:low\n"); | |
439 | break; | |
440 | case POLARIZATION_VM: | |
441 | count = sprintf(buf, "vertical:medium\n"); | |
442 | break; | |
443 | case POLARIZATION_VH: | |
444 | count = sprintf(buf, "vertical:high\n"); | |
445 | break; | |
446 | default: | |
447 | count = sprintf(buf, "unknown\n"); | |
448 | break; | |
449 | } | |
450 | mutex_unlock(&smp_cpu_state_mutex); | |
451 | return count; | |
452 | } | |
72f31889 | 453 | static DEVICE_ATTR(polarization, 0444, cpu_polarization_show, NULL); |
83a24e32 HC |
454 | |
455 | static struct attribute *topology_cpu_attrs[] = { | |
72f31889 | 456 | &dev_attr_polarization.attr, |
83a24e32 HC |
457 | NULL, |
458 | }; | |
459 | ||
460 | static struct attribute_group topology_cpu_attr_group = { | |
461 | .attrs = topology_cpu_attrs, | |
462 | }; | |
463 | ||
1887aa07 MS |
464 | static ssize_t cpu_dedicated_show(struct device *dev, |
465 | struct device_attribute *attr, char *buf) | |
466 | { | |
467 | int cpu = dev->id; | |
468 | ssize_t count; | |
469 | ||
470 | mutex_lock(&smp_cpu_state_mutex); | |
471 | count = sprintf(buf, "%d\n", topology_cpu_dedicated(cpu)); | |
472 | mutex_unlock(&smp_cpu_state_mutex); | |
473 | return count; | |
474 | } | |
475 | static DEVICE_ATTR(dedicated, 0444, cpu_dedicated_show, NULL); | |
476 | ||
477 | static struct attribute *topology_extra_cpu_attrs[] = { | |
478 | &dev_attr_dedicated.attr, | |
479 | NULL, | |
480 | }; | |
481 | ||
482 | static struct attribute_group topology_extra_cpu_attr_group = { | |
483 | .attrs = topology_extra_cpu_attrs, | |
484 | }; | |
485 | ||
83a24e32 HC |
486 | int topology_cpu_init(struct cpu *cpu) |
487 | { | |
1887aa07 MS |
488 | int rc; |
489 | ||
490 | rc = sysfs_create_group(&cpu->dev.kobj, &topology_cpu_attr_group); | |
491 | if (rc || !MACHINE_HAS_TOPOLOGY) | |
492 | return rc; | |
493 | rc = sysfs_create_group(&cpu->dev.kobj, &topology_extra_cpu_attr_group); | |
494 | if (rc) | |
495 | sysfs_remove_group(&cpu->dev.kobj, &topology_cpu_attr_group); | |
496 | return rc; | |
83a24e32 HC |
497 | } |
498 | ||
3ddb1b75 | 499 | static const struct cpumask *cpu_thread_mask(int cpu) |
10ad34bc | 500 | { |
30fc4ca2 | 501 | return &cpu_topology[cpu].thread_mask; |
10ad34bc MS |
502 | } |
503 | ||
504 | ||
2dfd7476 VG |
505 | const struct cpumask *cpu_coregroup_mask(int cpu) |
506 | { | |
30fc4ca2 | 507 | return &cpu_topology[cpu].core_mask; |
2dfd7476 VG |
508 | } |
509 | ||
510 | static const struct cpumask *cpu_book_mask(int cpu) | |
511 | { | |
30fc4ca2 | 512 | return &cpu_topology[cpu].book_mask; |
2dfd7476 VG |
513 | } |
514 | ||
adac0f1e HC |
515 | static const struct cpumask *cpu_drawer_mask(int cpu) |
516 | { | |
30fc4ca2 | 517 | return &cpu_topology[cpu].drawer_mask; |
adac0f1e HC |
518 | } |
519 | ||
2dfd7476 | 520 | static struct sched_domain_topology_level s390_topology[] = { |
10ad34bc | 521 | { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, |
2dfd7476 VG |
522 | { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, |
523 | { cpu_book_mask, SD_INIT_NAME(BOOK) }, | |
adac0f1e | 524 | { cpu_drawer_mask, SD_INIT_NAME(DRAWER) }, |
c0e5ddab | 525 | { cpu_cpu_mask, SD_INIT_NAME(DIE) }, |
2dfd7476 VG |
526 | { NULL, }, |
527 | }; | |
528 | ||
d05d15da HC |
529 | static void __init alloc_masks(struct sysinfo_15_1_x *info, |
530 | struct mask_info *mask, int offset) | |
531 | { | |
532 | int i, nr_masks; | |
533 | ||
534 | nr_masks = info->mag[TOPOLOGY_NR_MAG - offset]; | |
535 | for (i = 0; i < info->mnest - offset; i++) | |
536 | nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i]; | |
537 | nr_masks = max(nr_masks, 1); | |
538 | for (i = 0; i < nr_masks; i++) { | |
eb31d559 | 539 | mask->next = memblock_alloc(sizeof(*mask->next), 8); |
8a7f97b9 MR |
540 | if (!mask->next) |
541 | panic("%s: Failed to allocate %zu bytes align=0x%x\n", | |
542 | __func__, sizeof(*mask->next), 8); | |
d05d15da HC |
543 | mask = mask->next; |
544 | } | |
545 | } | |
546 | ||
8c910580 | 547 | void __init topology_init_early(void) |
d05d15da HC |
548 | { |
549 | struct sysinfo_15_1_x *info; | |
d05d15da | 550 | |
ebb299a5 | 551 | set_sched_topology(s390_topology); |
1b25fda0 HC |
552 | if (topology_mode == TOPOLOGY_MODE_UNINITIALIZED) { |
553 | if (MACHINE_HAS_TOPOLOGY) | |
554 | topology_mode = TOPOLOGY_MODE_HW; | |
555 | else | |
556 | topology_mode = TOPOLOGY_MODE_SINGLE; | |
557 | } | |
d05d15da | 558 | if (!MACHINE_HAS_TOPOLOGY) |
8c910580 | 559 | goto out; |
eb31d559 | 560 | tl_info = memblock_alloc(PAGE_SIZE, PAGE_SIZE); |
8a7f97b9 MR |
561 | if (!tl_info) |
562 | panic("%s: Failed to allocate %lu bytes align=0x%lx\n", | |
563 | __func__, PAGE_SIZE, PAGE_SIZE); | |
d05d15da HC |
564 | info = tl_info; |
565 | store_topology(info); | |
496e59cc HC |
566 | pr_info("The CPU configuration topology of the machine is: %d %d %d %d %d %d / %d\n", |
567 | info->mag[0], info->mag[1], info->mag[2], info->mag[3], | |
568 | info->mag[4], info->mag[5], info->mnest); | |
d05d15da HC |
569 | alloc_masks(info, &socket_info, 1); |
570 | alloc_masks(info, &book_info, 2); | |
adac0f1e | 571 | alloc_masks(info, &drawer_info, 3); |
8c910580 | 572 | out: |
a052096b | 573 | cpumask_set_cpu(0, &cpu_setup_mask); |
8c910580 | 574 | __arch_update_cpu_topology(); |
1887aa07 | 575 | __arch_update_dedicated_flag(NULL); |
d05d15da | 576 | } |
d05d15da | 577 | |
1b25fda0 HC |
578 | static inline int topology_get_mode(int enabled) |
579 | { | |
580 | if (!enabled) | |
581 | return TOPOLOGY_MODE_SINGLE; | |
582 | return MACHINE_HAS_TOPOLOGY ? TOPOLOGY_MODE_HW : TOPOLOGY_MODE_PACKAGE; | |
583 | } | |
584 | ||
51dce386 HC |
585 | static inline int topology_is_enabled(void) |
586 | { | |
587 | return topology_mode != TOPOLOGY_MODE_SINGLE; | |
588 | } | |
589 | ||
1b25fda0 HC |
590 | static int __init topology_setup(char *str) |
591 | { | |
592 | bool enabled; | |
593 | int rc; | |
594 | ||
595 | rc = kstrtobool(str, &enabled); | |
596 | if (rc) | |
597 | return rc; | |
598 | topology_mode = topology_get_mode(enabled); | |
599 | return 0; | |
600 | } | |
601 | early_param("topology", topology_setup); | |
602 | ||
51dce386 | 603 | static int topology_ctl_handler(struct ctl_table *ctl, int write, |
32927393 | 604 | void *buffer, size_t *lenp, loff_t *ppos) |
51dce386 | 605 | { |
196851be | 606 | int enabled = topology_is_enabled(); |
51dce386 | 607 | int new_mode; |
196851be VG |
608 | int rc; |
609 | struct ctl_table ctl_entry = { | |
610 | .procname = ctl->procname, | |
611 | .data = &enabled, | |
612 | .maxlen = sizeof(int), | |
eec4844f MC |
613 | .extra1 = SYSCTL_ZERO, |
614 | .extra2 = SYSCTL_ONE, | |
196851be VG |
615 | }; |
616 | ||
617 | rc = proc_douintvec_minmax(&ctl_entry, write, buffer, lenp, ppos); | |
618 | if (rc < 0 || !write) | |
619 | return rc; | |
51dce386 | 620 | |
51dce386 | 621 | mutex_lock(&smp_cpu_state_mutex); |
196851be | 622 | new_mode = topology_get_mode(enabled); |
51dce386 HC |
623 | if (topology_mode != new_mode) { |
624 | topology_mode = new_mode; | |
625 | topology_schedule_update(); | |
626 | } | |
627 | mutex_unlock(&smp_cpu_state_mutex); | |
628 | topology_flush_work(); | |
196851be VG |
629 | |
630 | return rc; | |
51dce386 HC |
631 | } |
632 | ||
633 | static struct ctl_table topology_ctl_table[] = { | |
634 | { | |
635 | .procname = "topology", | |
636 | .mode = 0644, | |
637 | .proc_handler = topology_ctl_handler, | |
638 | }, | |
639 | { }, | |
640 | }; | |
641 | ||
83a24e32 HC |
642 | static int __init topology_init(void) |
643 | { | |
9493ed19 GKH |
644 | struct device *dev_root; |
645 | int rc = 0; | |
646 | ||
5cd79d6a | 647 | timer_setup(&topology_timer, topology_timer_fn, TIMER_DEFERRABLE); |
48e9a6c1 MS |
648 | if (MACHINE_HAS_TOPOLOGY) |
649 | set_topology_timer(); | |
650 | else | |
83a24e32 | 651 | topology_update_polarization_simple(); |
0599331c | 652 | register_sysctl("s390", topology_ctl_table); |
9493ed19 GKH |
653 | |
654 | dev_root = bus_get_dev_root(&cpu_subsys); | |
655 | if (dev_root) { | |
656 | rc = device_create_file(dev_root, &dev_attr_dispatching); | |
657 | put_device(dev_root); | |
658 | } | |
659 | return rc; | |
83a24e32 HC |
660 | } |
661 | device_initcall(topology_init); |