[linux-block.git] / arch / s390 / kernel / swsusp.S

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * S390 64-bit swsusp implementation
 *
 * Copyright IBM Corp. 2009
 *
 * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
 *	      Michael Holzheu <holzheu@linux.vnet.ibm.com>
 */

#include <linux/linkage.h>
#include <asm/page.h>
#include <asm/ptrace.h>
#include <asm/thread_info.h>
#include <asm/asm-offsets.h>
#include <asm/sigp.h>

/*
 * Save register context in absolute 0 lowcore and call swsusp_save() to
 * create in-memory kernel image. The context is saved in the designated
 * "store status" memory locations (see POP).
 * We return from this function twice. The first time during the suspend to
 * disk process. The second time via the swsusp_arch_resume() function
 * (see below) in the resume process.
 * This function runs with disabled interrupts.
 */
	.section .text
ENTRY(swsusp_arch_suspend)
	stmg	%r6,%r15,__SF_GPRS(%r15)
	lgr	%r1,%r15
	aghi	%r15,-STACK_FRAME_OVERHEAD
	stg	%r1,__SF_BACKCHAIN(%r15)

	/* Store FPU registers */
	brasl	%r14,save_fpu_regs

	/* Deactivate DAT */
	stnsm	__SF_EMPTY(%r15),0xfb

	/* Store prefix register on stack */
	stpx	__SF_EMPTY(%r15)

	/* Save prefix register contents for lowcore copy */
	llgf	%r10,__SF_EMPTY(%r15)

	/* Get pointer to save area */
	lghi	%r1,0x1000

	/* Save CPU address */
	stap	__LC_EXT_CPU_ADDR(%r0)

	/* Store registers */
	mvc	0x318(4,%r1),__SF_EMPTY(%r15)	/* move prefix to lowcore */
	stam	%a0,%a15,0x340(%r1)		/* store access registers */
	stctg	%c0,%c15,0x380(%r1)		/* store control registers */
	stmg	%r0,%r15,0x280(%r1)		/* store general registers */

	stpt	0x328(%r1)			/* store timer */
	stck	__SF_EMPTY(%r15)		/* store clock */
	stckc	0x330(%r1)			/* store clock comparator */

	/* Update cputime accounting before going to sleep */
	lg	%r0,__LC_LAST_UPDATE_TIMER
	slg	%r0,0x328(%r1)
	alg	%r0,__LC_SYSTEM_TIMER
	stg	%r0,__LC_SYSTEM_TIMER
	mvc	__LC_LAST_UPDATE_TIMER(8),0x328(%r1)
	lg	%r0,__LC_LAST_UPDATE_CLOCK
	slg	%r0,__SF_EMPTY(%r15)
	alg	%r0,__LC_STEAL_TIMER
	stg	%r0,__LC_STEAL_TIMER
	mvc	__LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15)

	/* Activate DAT */
	stosm	__SF_EMPTY(%r15),0x04

	/* Set prefix page to zero */
	xc	__SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	spx	__SF_EMPTY(%r15)

	/* Save absolute zero pages */
	larl	%r2,suspend_zero_pages
	lg	%r2,0(%r2)
	lghi	%r4,0
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Copy lowcore to absolute zero lowcore */
	lghi	%r2,0
	lgr	%r4,%r10
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Save image */
	brasl	%r14,swsusp_save

	/* Restore prefix register and return */
	lghi	%r1,0x1000
	spx	0x318(%r1)
	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	lghi	%r2,0
	br	%r14

/*
 * Restore saved memory image to correct place and restore register context.
 * Then we return to the function that called swsusp_arch_suspend().
 * swsusp_arch_resume() runs with disabled interrupts.
 */
ENTRY(swsusp_arch_resume)
	stmg	%r6,%r15,__SF_GPRS(%r15)
	lgr	%r1,%r15
	aghi	%r15,-STACK_FRAME_OVERHEAD
	stg	%r1,__SF_BACKCHAIN(%r15)

	/* Make all free pages stable */
	lghi	%r2,1
	brasl	%r14,arch_set_page_states

	/* Deactivate DAT */
	stnsm	__SF_EMPTY(%r15),0xfb

	/* Set prefix page to zero */
	xc	__SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	spx	__SF_EMPTY(%r15)

	/* Restore saved image */
	larl	%r1,restore_pblist
	lg	%r1,0(%r1)
	ltgr	%r1,%r1
	jz	2f
0:
	lg	%r2,8(%r1)
	lg	%r4,0(%r1)
	iske	%r0,%r4
	lghi	%r3,PAGE_SIZE
	lghi	%r5,PAGE_SIZE
1:
	mvcle	%r2,%r4,0
	jo	1b
	lg	%r2,8(%r1)
	sske	%r0,%r2
	lg	%r1,16(%r1)
	ltgr	%r1,%r1
	jnz	0b
2:
	ptlb				/* flush tlb */

	/* Reset System */
	larl	%r1,restart_entry
	larl	%r2,.Lrestart_diag308_psw
	og	%r1,0(%r2)
	stg	%r1,0(%r0)
	larl	%r1,.Lnew_pgm_check_psw
	epsw	%r2,%r3
	stm	%r2,%r3,0(%r1)
	mvc	__LC_PGM_NEW_PSW(16,%r0),0(%r1)
	lghi	%r0,0
	diag	%r0,%r0,0x308
restart_entry:
	lhi	%r1,1
	sigp	%r1,%r0,SIGP_SET_ARCHITECTURE
	sam64
#ifdef CONFIG_SMP
	larl	%r1,smp_cpu_mt_shift
	icm	%r1,15,0(%r1)
	jz	smt_done
	llgfr	%r1,%r1
smt_loop:
	sigp	%r1,%r0,SIGP_SET_MULTI_THREADING
	brc	8,smt_done			/* accepted */
	brc	2,smt_loop			/* busy, try again */
smt_done:
#endif
	larl	%r1,.Lnew_pgm_check_psw
	lpswe	0(%r1)
pgm_check_entry:

	/* Switch to original suspend CPU */
	larl	%r1,.Lresume_cpu		/* Resume CPU address: r2 */
	stap	0(%r1)
	llgh	%r2,0(%r1)
	llgh	%r1,__LC_EXT_CPU_ADDR(%r0)	/* Suspend CPU address: r1 */
	cgr	%r1,%r2
	je	restore_registers		/* r1 = r2 -> nothing to do */
	larl	%r4,.Lrestart_suspend_psw	/* Set new restart PSW */
	mvc	__LC_RST_NEW_PSW(16,%r0),0(%r4)
3:
	sigp	%r9,%r1,SIGP_INITIAL_CPU_RESET	/* sigp initial cpu reset */
	brc	8,4f				/* accepted */
	brc	2,3b				/* busy, try again */

	/* Suspend CPU not available -> panic */
	larl	%r15,init_thread_union
	ahi	%r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER)
	larl	%r2,.Lpanic_string
	larl	%r3,sclp_early_printk
	lghi	%r1,0
	sam31
	sigp	%r1,%r0,SIGP_SET_ARCHITECTURE
	basr	%r14,%r3
	larl	%r3,.Ldisabled_wait_31
	lpsw	0(%r3)
4:
	/* Switch to suspend CPU */
	sigp	%r9,%r1,SIGP_RESTART	/* sigp restart to suspend CPU */
	brc	2,4b			/* busy, try again */
5:
	sigp	%r9,%r2,SIGP_STOP	/* sigp stop to current resume CPU */
	brc	2,5b			/* busy, try again */
6:	j	6b

restart_suspend:
	larl	%r1,.Lresume_cpu
	llgh	%r2,0(%r1)
7:
	sigp	%r9,%r2,SIGP_SENSE	/* sigp sense, wait for resume CPU */
	brc	8,7b			/* accepted, status 0, still running */
	brc	2,7b			/* busy, try again */
	tmll	%r9,0x40		/* Test if resume CPU is stopped */
	jz	7b

restore_registers:
	/* Restore registers */
	lghi	%r13,0x1000		/* %r1 = pointer to save area */

	/* Ignore time spent in suspended state. */
	llgf	%r1,0x318(%r13)
	stck	__LC_LAST_UPDATE_CLOCK(%r1)
	spt	0x328(%r13)		/* reprogram timer */
	//sckc	0x330(%r13)		/* set clock comparator */

	lctlg	%c0,%c15,0x380(%r13)	/* load control registers */
	lam	%a0,%a15,0x340(%r13)	/* load access registers */

	/* Load old stack */
	lg	%r15,0x2f8(%r13)

	/* Save prefix register */
	mvc __SF_EMPTY(4,%r15),0x318(%r13)

	/* Restore absolute zero pages */
	lghi	%r2,0
	larl	%r4,suspend_zero_pages
	lg	%r4,0(%r4)
	lghi	%r3,2*PAGE_SIZE
	lghi	%r5,2*PAGE_SIZE
1:	mvcle	%r2,%r4,0
	jo	1b

	/* Restore prefix register */
	spx	__SF_EMPTY(%r15)

	/* Activate DAT */
	stosm	__SF_EMPTY(%r15),0x04

	/* Make all free pages unstable */
	lghi	%r2,0
	brasl	%r14,arch_set_page_states

	/* Call arch specific early resume code */
	brasl	%r14,s390_early_resume

	/* Return 0 */
	lmg	%r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	lghi	%r2,0
	br	%r14

	.section .data..nosave,"aw",@progbits
	.align	8
.Ldisabled_wait_31:
	.long  0x000a0000,0x00000000
.Lpanic_string:
	.asciz	"Resume not possible because suspend CPU is no longer available\n"
	.align	8
.Lrestart_diag308_psw:
	.long	0x00080000,0x80000000
.Lrestart_suspend_psw:
	.quad	0x0000000180000000,restart_suspend
.Lnew_pgm_check_psw:
	.quad	0,pgm_check_entry
.Lresume_cpu:
	.byte	0,0
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
155af2f9 HJP	2	/*
	3	* S390 64-bit swsusp implementation
	4	*
	5	* Copyright IBM Corp. 2009
	6	*
	7	* Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
	8	* Michael Holzheu <holzheu@linux.vnet.ibm.com>
	9	*/
	10
144d634a	11	#include <linux/linkage.h>
155af2f9 HJP	12	#include <asm/page.h>
155af2f9 HJP	13	#include <asm/ptrace.h>
1aaf179d	14	#include <asm/thread_info.h>
155af2f9	15	#include <asm/asm-offsets.h>
eb546195	16	#include <asm/sigp.h>
155af2f9 HJP	17
	18	/*
	19	* Save register context in absolute 0 lowcore and call swsusp_save() to
	20	* create in-memory kernel image. The context is saved in the designated
	21	* "store status" memory locations (see POP).
	22	* We return from this function twice. The first time during the suspend to
	23	* disk process. The second time via the swsusp_arch_resume() function
	24	* (see below) in the resume process.
	25	* This function runs with disabled interrupts.
	26	*/
	27	.section .text
144d634a	28	ENTRY(swsusp_arch_suspend)
155af2f9 HJP	29	stmg %r6,%r15,__SF_GPRS(%r15)
	30	lgr %r1,%r15
	31	aghi %r15,-STACK_FRAME_OVERHEAD
	32	stg %r1,__SF_BACKCHAIN(%r15)
	33
88d64253 MS	34	/* Store FPU registers */
	35	brasl %r14,save_fpu_regs
	36
155af2f9 HJP	37	/* Deactivate DAT */
	38	stnsm __SF_EMPTY(%r15),0xfb
	39
155af2f9 HJP	40	/* Store prefix register on stack */
	41	stpx __SF_EMPTY(%r15)
	42
91c15a95 MH	43	/* Save prefix register contents for lowcore copy */
91c15a95 MH	44	llgf %r10,__SF_EMPTY(%r15)
155af2f9 HJP	45
155af2f9 HJP	46	/* Get pointer to save area */
5f954c34	47	lghi %r1,0x1000
155af2f9	48
1aaf179d	49	/* Save CPU address */
7e180bd8	50	stap __LC_EXT_CPU_ADDR(%r0)
1aaf179d	51
155af2f9 HJP	52	/* Store registers */
155af2f9 HJP	53	mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
155af2f9 HJP	54	stam %a0,%a15,0x340(%r1) /* store access registers */
	55	stctg %c0,%c15,0x380(%r1) /* store control registers */
	56	stmg %r0,%r15,0x280(%r1) /* store general registers */
	57
	58	stpt 0x328(%r1) /* store timer */
623c08e4	59	stck __SF_EMPTY(%r15) /* store clock */
155af2f9 HJP	60	stckc 0x330(%r1) /* store clock comparator */
155af2f9 HJP	61
623c08e4 MS	62	/* Update cputime accounting before going to sleep */
	63	lg %r0,__LC_LAST_UPDATE_TIMER
	64	slg %r0,0x328(%r1)
	65	alg %r0,__LC_SYSTEM_TIMER
	66	stg %r0,__LC_SYSTEM_TIMER
	67	mvc __LC_LAST_UPDATE_TIMER(8),0x328(%r1)
	68	lg %r0,__LC_LAST_UPDATE_CLOCK
	69	slg %r0,__SF_EMPTY(%r15)
	70	alg %r0,__LC_STEAL_TIMER
	71	stg %r0,__LC_STEAL_TIMER
	72	mvc __LC_LAST_UPDATE_CLOCK(8),__SF_EMPTY(%r15)
	73
155af2f9 HJP	74	/* Activate DAT */
	75	stosm __SF_EMPTY(%r15),0x04
	76
	77	/* Set prefix page to zero */
	78	xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	79	spx __SF_EMPTY(%r15)
	80
91c15a95 MH	81	/* Save absolute zero pages */
	82	larl %r2,suspend_zero_pages
	83	lg %r2,0(%r2)
	84	lghi %r4,0
	85	lghi %r3,2*PAGE_SIZE
	86	lghi %r5,2*PAGE_SIZE
	87	1: mvcle %r2,%r4,0
	88	jo 1b
	89
	90	/* Copy lowcore to absolute zero lowcore */
5f954c34	91	lghi %r2,0
91c15a95	92	lgr %r4,%r10
5f954c34 HC	93	lghi %r3,2*PAGE_SIZE
	94	lghi %r5,2*PAGE_SIZE
	95	1: mvcle %r2,%r4,0
	96	jo 1b
155af2f9 HJP	97
	98	/* Save image */
	99	brasl %r14,swsusp_save
	100
155af2f9 HJP	101	/* Restore prefix register and return */
	102	lghi %r1,0x1000
	103	spx 0x318(%r1)
	104	lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	105	lghi %r2,0
	106	br %r14
	107
	108	/*
	109	* Restore saved memory image to correct place and restore register context.
	110	* Then we return to the function that called swsusp_arch_suspend().
	111	* swsusp_arch_resume() runs with disabled interrupts.
	112	*/
144d634a	113	ENTRY(swsusp_arch_resume)
155af2f9 HJP	114	stmg %r6,%r15,__SF_GPRS(%r15)
	115	lgr %r1,%r15
	116	aghi %r15,-STACK_FRAME_OVERHEAD
	117	stg %r1,__SF_BACKCHAIN(%r15)
	118
846955c8 HC	119	/* Make all free pages stable */
	120	lghi %r2,1
	121	brasl %r14,arch_set_page_states
1aaf179d	122
155af2f9 HJP	123	/* Deactivate DAT */
	124	stnsm __SF_EMPTY(%r15),0xfb
	125
155af2f9 HJP	126	/* Set prefix page to zero */
	127	xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
	128	spx __SF_EMPTY(%r15)
	129
	130	/* Restore saved image */
	131	larl %r1,restore_pblist
	132	lg %r1,0(%r1)
	133	ltgr %r1,%r1
	134	jz 2f
	135	0:
	136	lg %r2,8(%r1)
	137	lg %r4,0(%r1)
85055dd8	138	iske %r0,%r4
155af2f9 HJP	139	lghi %r3,PAGE_SIZE
	140	lghi %r5,PAGE_SIZE
	141	1:
	142	mvcle %r2,%r4,0
	143	jo 1b
85055dd8 MS	144	lg %r2,8(%r1)
85055dd8 MS	145	sske %r0,%r2
155af2f9 HJP	146	lg %r1,16(%r1)
	147	ltgr %r1,%r1
	148	jnz 0b
	149	2:
	150	ptlb /* flush tlb */
	151
2583d1ef HC	152	/* Reset System */
2583d1ef HC	153	larl %r1,restart_entry
1aaf179d	154	larl %r2,.Lrestart_diag308_psw
2583d1ef HC	155	og %r1,0(%r2)
2583d1ef HC	156	stg %r1,0(%r0)
1aaf179d	157	larl %r1,.Lnew_pgm_check_psw
2583d1ef HC	158	epsw %r2,%r3
	159	stm %r2,%r3,0(%r1)
	160	mvc __LC_PGM_NEW_PSW(16,%r0),0(%r1)
	161	lghi %r0,0
	162	diag %r0,%r0,0x308
	163	restart_entry:
	164	lhi %r1,1
eb546195	165	sigp %r1,%r0,SIGP_SET_ARCHITECTURE
2583d1ef	166	sam64
1833c9f6 HC	167	#ifdef CONFIG_SMP
	168	larl %r1,smp_cpu_mt_shift
	169	icm %r1,15,0(%r1)
	170	jz smt_done
	171	llgfr %r1,%r1
	172	smt_loop:
	173	sigp %r1,%r0,SIGP_SET_MULTI_THREADING
	174	brc 8,smt_done /* accepted */
	175	brc 2,smt_loop /* busy, try again */
	176	smt_done:
	177	#endif
1aaf179d	178	larl %r1,.Lnew_pgm_check_psw
2583d1ef HC	179	lpswe 0(%r1)
2583d1ef HC	180	pgm_check_entry:
2583d1ef	181
1aaf179d MH	182	/* Switch to original suspend CPU */
	183	larl %r1,.Lresume_cpu /* Resume CPU address: r2 */
	184	stap 0(%r1)
	185	llgh %r2,0(%r1)
7e180bd8	186	llgh %r1,__LC_EXT_CPU_ADDR(%r0) /* Suspend CPU address: r1 */
1aaf179d MH	187	cgr %r1,%r2
	188	je restore_registers /* r1 = r2 -> nothing to do */
	189	larl %r4,.Lrestart_suspend_psw /* Set new restart PSW */
abd1ecf2	190	mvc __LC_RST_NEW_PSW(16,%r0),0(%r4)
1aaf179d	191	3:
eb546195	192	sigp %r9,%r1,SIGP_INITIAL_CPU_RESET /* sigp initial cpu reset */
8b646bd7 MS	193	brc 8,4f /* accepted */
8b646bd7 MS	194	brc 2,3b /* busy, try again */
1aaf179d MH	195
	196	/* Suspend CPU not available -> panic */
	197	larl %r15,init_thread_union
3a890380	198	ahi %r15,1<<(PAGE_SHIFT+THREAD_SIZE_ORDER)
1aaf179d	199	larl %r2,.Lpanic_string
d5ab7a34	200	larl %r3,sclp_early_printk
1aaf179d MH	201	lghi %r1,0
1aaf179d MH	202	sam31
eb546195	203	sigp %r1,%r0,SIGP_SET_ARCHITECTURE
1aaf179d MH	204	basr %r14,%r3
	205	larl %r3,.Ldisabled_wait_31
	206	lpsw 0(%r3)
	207	4:
	208	/* Switch to suspend CPU */
eb546195	209	sigp %r9,%r1,SIGP_RESTART /* sigp restart to suspend CPU */
1aaf179d MH	210	brc 2,4b /* busy, try again */
1aaf179d MH	211	5:
eb546195	212	sigp %r9,%r2,SIGP_STOP /* sigp stop to current resume CPU */
f8501ba7	213	brc 2,5b /* busy, try again */
1aaf179d MH	214	6: j 6b
	215
	216	restart_suspend:
	217	larl %r1,.Lresume_cpu
	218	llgh %r2,0(%r1)
	219	7:
eb546195	220	sigp %r9,%r2,SIGP_SENSE /* sigp sense, wait for resume CPU */
b3dcf3de	221	brc 8,7b /* accepted, status 0, still running */
1aaf179d MH	222	brc 2,7b /* busy, try again */
	223	tmll %r9,0x40 /* Test if resume CPU is stopped */
	224	jz 7b
	225
	226	restore_registers:
155af2f9	227	/* Restore registers */
623c08e4	228	lghi %r13,0x1000 /* %r1 = pointer to save area */
155af2f9	229
623c08e4 MS	230	/* Ignore time spent in suspended state. */
	231	llgf %r1,0x318(%r13)
	232	stck __LC_LAST_UPDATE_CLOCK(%r1)
155af2f9 HJP	233	spt 0x328(%r13) /* reprogram timer */
	234	//sckc 0x330(%r13) /* set clock comparator */
	235
	236	lctlg %c0,%c15,0x380(%r13) /* load control registers */
	237	lam %a0,%a15,0x340(%r13) /* load access registers */
	238
155af2f9 HJP	239	/* Load old stack */
	240	lg %r15,0x2f8(%r13)
	241
91c15a95 MH	242	/* Save prefix register */
	243	mvc __SF_EMPTY(4,%r15),0x318(%r13)
	244
	245	/* Restore absolute zero pages */
	246	lghi %r2,0
	247	larl %r4,suspend_zero_pages
	248	lg %r4,0(%r4)
	249	lghi %r3,2*PAGE_SIZE
	250	lghi %r5,2*PAGE_SIZE
	251	1: mvcle %r2,%r4,0
	252	jo 1b
	253
155af2f9	254	/* Restore prefix register */
91c15a95	255	spx __SF_EMPTY(%r15)
155af2f9	256
155af2f9 HJP	257	/* Activate DAT */
	258	stosm __SF_EMPTY(%r15),0x04
	259
846955c8 HC	260	/* Make all free pages unstable */
	261	lghi %r2,0
	262	brasl %r14,arch_set_page_states
	263
77e844b9 SO	264	/* Call arch specific early resume code */
77e844b9 SO	265	brasl %r14,s390_early_resume
889ee955	266
155af2f9 HJP	267	/* Return 0 */
	268	lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
	269	lghi %r2,0
	270	br %r14
2583d1ef	271
07b3bb1e	272	.section .data..nosave,"aw",@progbits
2583d1ef	273	.align 8
1aaf179d MH	274	.Ldisabled_wait_31:
	275	.long 0x000a0000,0x00000000
	276	.Lpanic_string:
02407baa	277	.asciz "Resume not possible because suspend CPU is no longer available\n"
1aaf179d MH	278	.align 8
1aaf179d MH	279	.Lrestart_diag308_psw:
2583d1ef	280	.long 0x00080000,0x80000000
1aaf179d MH	281	.Lrestart_suspend_psw:
	282	.quad 0x0000000180000000,restart_suspend
	283	.Lnew_pgm_check_psw:
2583d1ef	284	.quad 0,pgm_check_entry
1aaf179d MH	285	.Lresume_cpu:
1aaf179d MH	286	.byte 0,0