[S390] smp: rename and add lowcore defines
[linux-2.6-block.git] / arch / s390 / kernel / smp.c
CommitLineData
1da177e4
LT
1/*
2 * arch/s390/kernel/smp.c
3 *
155af2f9 4 * Copyright IBM Corp. 1999, 2009
1da177e4 5 * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
39ce010d
HC
6 * Martin Schwidefsky (schwidefsky@de.ibm.com)
7 * Heiko Carstens (heiko.carstens@de.ibm.com)
1da177e4 8 *
39ce010d 9 * based on other smp stuff by
1da177e4
LT
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * We work with logical cpu numbering everywhere we can. The only
14 * functions using the real cpu address (got from STAP) are the sigp
15 * functions. For all other functions we use the identity mapping.
16 * That means that cpu_number_map[i] == i for every cpu. cpu_number_map is
17 * used e.g. to find the idle task belonging to a logical cpu. Every array
18 * in the kernel is sorted by the logical cpu number and not by the physical
19 * one which is causing all the confusion with __cpu_logical_map and
20 * cpu_number_map in other architectures.
21 */
22
395d31d4
MS
23#define KMSG_COMPONENT "cpu"
24#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
25
1da177e4
LT
26#include <linux/module.h>
27#include <linux/init.h>
1da177e4 28#include <linux/mm.h>
4e950f6f 29#include <linux/err.h>
1da177e4
LT
30#include <linux/spinlock.h>
31#include <linux/kernel_stat.h>
1da177e4
LT
32#include <linux/delay.h>
33#include <linux/cache.h>
34#include <linux/interrupt.h>
3324e60a 35#include <linux/irqflags.h>
1da177e4 36#include <linux/cpu.h>
2b67fc46 37#include <linux/timex.h>
411ed322 38#include <linux/bootmem.h>
46b05d26 39#include <asm/ipl.h>
2b67fc46 40#include <asm/setup.h>
1da177e4
LT
41#include <asm/sigp.h>
42#include <asm/pgalloc.h>
43#include <asm/irq.h>
44#include <asm/s390_ext.h>
45#include <asm/cpcmd.h>
46#include <asm/tlbflush.h>
2b67fc46 47#include <asm/timer.h>
411ed322 48#include <asm/lowcore.h>
08d07968 49#include <asm/sclp.h>
76d4e00a 50#include <asm/cputime.h>
c742b31c 51#include <asm/vdso.h>
4bb5e07b 52#include <asm/cpu.h>
a806170e 53#include "entry.h"
1da177e4 54
fb380aad
HC
55/* logical cpu to cpu address */
56int __cpu_logical_map[NR_CPUS];
57
1da177e4
LT
58static struct task_struct *current_set[NR_CPUS];
59
08d07968
HC
60static u8 smp_cpu_type;
61static int smp_use_sigp_detection;
62
63enum s390_cpu_state {
64 CPU_STATE_STANDBY,
65 CPU_STATE_CONFIGURED,
66};
67
dbd70fb4 68DEFINE_MUTEX(smp_cpu_state_mutex);
c10fde0d 69int smp_cpu_polarization[NR_CPUS];
08d07968 70static int smp_cpu_state[NR_CPUS];
c10fde0d 71static int cpu_management;
08d07968
HC
72
73static DEFINE_PER_CPU(struct cpu, cpu_devices);
08d07968 74
1da177e4 75static void smp_ext_bitcall(int, ec_bit_sig);
1da177e4 76
5c0b912e
HC
77static int cpu_stopped(int cpu)
78{
79 __u32 status;
80
81 switch (signal_processor_ps(&status, 0, cpu, sigp_sense)) {
5c0b912e
HC
82 case sigp_status_stored:
83 /* Check for stopped and check stop state */
84 if (status & 0x50)
85 return 1;
86 break;
87 default:
88 break;
89 }
90 return 0;
91}
92
677d7623 93void smp_send_stop(void)
1da177e4 94{
39ce010d 95 int cpu, rc;
1da177e4 96
677d7623
HC
97 /* Disable all interrupts/machine checks */
98 __load_psw_mask(psw_kernel_bits & ~PSW_MASK_MCHECK);
3324e60a 99 trace_hardirqs_off();
1da177e4 100
677d7623 101 /* stop all processors */
1da177e4
LT
102 for_each_online_cpu(cpu) {
103 if (cpu == smp_processor_id())
104 continue;
105 do {
677d7623 106 rc = signal_processor(cpu, sigp_stop);
39ce010d 107 } while (rc == sigp_busy);
1da177e4 108
5c0b912e 109 while (!cpu_stopped(cpu))
c6b5b847
HC
110 cpu_relax();
111 }
112}
113
1da177e4
LT
114/*
115 * This is the main routine where commands issued by other
116 * cpus are handled.
117 */
118
2b67fc46 119static void do_ext_call_interrupt(__u16 code)
1da177e4 120{
39ce010d 121 unsigned long bits;
1da177e4 122
39ce010d
HC
123 /*
124 * handle bit signal external calls
125 *
126 * For the ec_schedule signal we have to do nothing. All the work
127 * is done automatically when we return from the interrupt.
128 */
1da177e4
LT
129 bits = xchg(&S390_lowcore.ext_call_fast, 0);
130
39ce010d 131 if (test_bit(ec_call_function, &bits))
ca9fc75a
HC
132 generic_smp_call_function_interrupt();
133
134 if (test_bit(ec_call_function_single, &bits))
135 generic_smp_call_function_single_interrupt();
1da177e4
LT
136}
137
138/*
139 * Send an external call sigp to another cpu and return without waiting
140 * for its completion.
141 */
142static void smp_ext_bitcall(int cpu, ec_bit_sig sig)
143{
39ce010d
HC
144 /*
145 * Set signaling bit in lowcore of target cpu and kick it
146 */
1da177e4 147 set_bit(sig, (unsigned long *) &lowcore_ptr[cpu]->ext_call_fast);
39ce010d 148 while (signal_processor(cpu, sigp_emergency_signal) == sigp_busy)
1da177e4
LT
149 udelay(10);
150}
151
630cd046 152void arch_send_call_function_ipi_mask(const struct cpumask *mask)
ca9fc75a
HC
153{
154 int cpu;
155
630cd046 156 for_each_cpu(cpu, mask)
ca9fc75a
HC
157 smp_ext_bitcall(cpu, ec_call_function);
158}
159
160void arch_send_call_function_single_ipi(int cpu)
161{
162 smp_ext_bitcall(cpu, ec_call_function_single);
163}
164
347a8dc3 165#ifndef CONFIG_64BIT
1da177e4
LT
166/*
167 * this function sends a 'purge tlb' signal to another CPU.
168 */
a806170e 169static void smp_ptlb_callback(void *info)
1da177e4 170{
ba8a9229 171 __tlb_flush_local();
1da177e4
LT
172}
173
174void smp_ptlb_all(void)
175{
15c8b6c1 176 on_each_cpu(smp_ptlb_callback, NULL, 1);
1da177e4
LT
177}
178EXPORT_SYMBOL(smp_ptlb_all);
347a8dc3 179#endif /* ! CONFIG_64BIT */
1da177e4
LT
180
181/*
182 * this function sends a 'reschedule' IPI to another CPU.
183 * it goes straight through and wastes no time serializing
184 * anything. Worst case is that we lose a reschedule ...
185 */
186void smp_send_reschedule(int cpu)
187{
39ce010d 188 smp_ext_bitcall(cpu, ec_schedule);
1da177e4
LT
189}
190
191/*
192 * parameter area for the set/clear control bit callbacks
193 */
94c12cc7 194struct ec_creg_mask_parms {
1da177e4
LT
195 unsigned long orvals[16];
196 unsigned long andvals[16];
94c12cc7 197};
1da177e4
LT
198
199/*
200 * callback for setting/clearing control bits
201 */
39ce010d
HC
202static void smp_ctl_bit_callback(void *info)
203{
94c12cc7 204 struct ec_creg_mask_parms *pp = info;
1da177e4
LT
205 unsigned long cregs[16];
206 int i;
39ce010d 207
94c12cc7
MS
208 __ctl_store(cregs, 0, 15);
209 for (i = 0; i <= 15; i++)
1da177e4 210 cregs[i] = (cregs[i] & pp->andvals[i]) | pp->orvals[i];
94c12cc7 211 __ctl_load(cregs, 0, 15);
1da177e4
LT
212}
213
214/*
215 * Set a bit in a control register of all cpus
216 */
94c12cc7
MS
217void smp_ctl_set_bit(int cr, int bit)
218{
219 struct ec_creg_mask_parms parms;
1da177e4 220
94c12cc7
MS
221 memset(&parms.orvals, 0, sizeof(parms.orvals));
222 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 223 parms.orvals[cr] = 1 << bit;
15c8b6c1 224 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 225}
39ce010d 226EXPORT_SYMBOL(smp_ctl_set_bit);
1da177e4
LT
227
228/*
229 * Clear a bit in a control register of all cpus
230 */
94c12cc7
MS
231void smp_ctl_clear_bit(int cr, int bit)
232{
233 struct ec_creg_mask_parms parms;
1da177e4 234
94c12cc7
MS
235 memset(&parms.orvals, 0, sizeof(parms.orvals));
236 memset(&parms.andvals, 0xff, sizeof(parms.andvals));
1da177e4 237 parms.andvals[cr] = ~(1L << bit);
15c8b6c1 238 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
1da177e4 239}
39ce010d 240EXPORT_SYMBOL(smp_ctl_clear_bit);
1da177e4 241
08d07968
HC
242/*
243 * In early ipl state a temp. logically cpu number is needed, so the sigp
244 * functions can be used to sense other cpus. Since NR_CPUS is >= 2 on
245 * CONFIG_SMP and the ipl cpu is logical cpu 0, it must be 1.
246 */
247#define CPU_INIT_NO 1
248
59f2e69d 249#ifdef CONFIG_ZFCPDUMP
411ed322 250
285f6722 251static void __init smp_get_save_area(unsigned int cpu, unsigned int phy_cpu)
411ed322 252{
411ed322
MH
253 if (ipl_info.type != IPL_TYPE_FCP_DUMP)
254 return;
285f6722 255 if (cpu >= NR_CPUS) {
395d31d4
MS
256 pr_warning("CPU %i exceeds the maximum %i and is excluded from "
257 "the dump\n", cpu, NR_CPUS - 1);
285f6722 258 return;
411ed322 259 }
f64ca217 260 zfcpdump_save_areas[cpu] = kmalloc(sizeof(struct save_area), GFP_KERNEL);
08d07968
HC
261 __cpu_logical_map[CPU_INIT_NO] = (__u16) phy_cpu;
262 while (signal_processor(CPU_INIT_NO, sigp_stop_and_store_status) ==
263 sigp_busy)
285f6722
HC
264 cpu_relax();
265 memcpy(zfcpdump_save_areas[cpu],
266 (void *)(unsigned long) store_prefix() + SAVE_AREA_BASE,
f64ca217 267 sizeof(struct save_area));
411ed322
MH
268}
269
f64ca217 270struct save_area *zfcpdump_save_areas[NR_CPUS + 1];
411ed322
MH
271EXPORT_SYMBOL_GPL(zfcpdump_save_areas);
272
273#else
285f6722
HC
274
275static inline void smp_get_save_area(unsigned int cpu, unsigned int phy_cpu) { }
276
59f2e69d 277#endif /* CONFIG_ZFCPDUMP */
411ed322 278
08d07968
HC
279static int cpu_known(int cpu_id)
280{
281 int cpu;
282
283 for_each_present_cpu(cpu) {
284 if (__cpu_logical_map[cpu] == cpu_id)
285 return 1;
286 }
287 return 0;
288}
289
290static int smp_rescan_cpus_sigp(cpumask_t avail)
291{
292 int cpu_id, logical_cpu;
293
93632d1b
RR
294 logical_cpu = cpumask_first(&avail);
295 if (logical_cpu >= nr_cpu_ids)
08d07968 296 return 0;
4bb5e07b 297 for (cpu_id = 0; cpu_id <= MAX_CPU_ADDRESS; cpu_id++) {
08d07968
HC
298 if (cpu_known(cpu_id))
299 continue;
300 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 301 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
302 if (!cpu_stopped(logical_cpu))
303 continue;
304 cpu_set(logical_cpu, cpu_present_map);
305 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
306 logical_cpu = cpumask_next(logical_cpu, &avail);
307 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
308 break;
309 }
310 return 0;
311}
312
48483b32 313static int smp_rescan_cpus_sclp(cpumask_t avail)
08d07968
HC
314{
315 struct sclp_cpu_info *info;
316 int cpu_id, logical_cpu, cpu;
317 int rc;
318
93632d1b
RR
319 logical_cpu = cpumask_first(&avail);
320 if (logical_cpu >= nr_cpu_ids)
08d07968 321 return 0;
48483b32 322 info = kmalloc(sizeof(*info), GFP_KERNEL);
08d07968
HC
323 if (!info)
324 return -ENOMEM;
325 rc = sclp_get_cpu_info(info);
326 if (rc)
327 goto out;
328 for (cpu = 0; cpu < info->combined; cpu++) {
329 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
330 continue;
331 cpu_id = info->cpu[cpu].address;
332 if (cpu_known(cpu_id))
333 continue;
334 __cpu_logical_map[logical_cpu] = cpu_id;
c10fde0d 335 smp_cpu_polarization[logical_cpu] = POLARIZATION_UNKNWN;
08d07968
HC
336 cpu_set(logical_cpu, cpu_present_map);
337 if (cpu >= info->configured)
338 smp_cpu_state[logical_cpu] = CPU_STATE_STANDBY;
339 else
340 smp_cpu_state[logical_cpu] = CPU_STATE_CONFIGURED;
93632d1b
RR
341 logical_cpu = cpumask_next(logical_cpu, &avail);
342 if (logical_cpu >= nr_cpu_ids)
08d07968
HC
343 break;
344 }
345out:
48483b32 346 kfree(info);
08d07968
HC
347 return rc;
348}
349
1e489518 350static int __smp_rescan_cpus(void)
08d07968
HC
351{
352 cpumask_t avail;
353
48483b32 354 cpus_xor(avail, cpu_possible_map, cpu_present_map);
08d07968
HC
355 if (smp_use_sigp_detection)
356 return smp_rescan_cpus_sigp(avail);
357 else
358 return smp_rescan_cpus_sclp(avail);
1da177e4
LT
359}
360
48483b32
HC
361static void __init smp_detect_cpus(void)
362{
363 unsigned int cpu, c_cpus, s_cpus;
364 struct sclp_cpu_info *info;
365 u16 boot_cpu_addr, cpu_addr;
366
367 c_cpus = 1;
368 s_cpus = 0;
7b468488 369 boot_cpu_addr = __cpu_logical_map[0];
48483b32
HC
370 info = kmalloc(sizeof(*info), GFP_KERNEL);
371 if (!info)
372 panic("smp_detect_cpus failed to allocate memory\n");
373 /* Use sigp detection algorithm if sclp doesn't work. */
374 if (sclp_get_cpu_info(info)) {
375 smp_use_sigp_detection = 1;
4bb5e07b 376 for (cpu = 0; cpu <= MAX_CPU_ADDRESS; cpu++) {
48483b32
HC
377 if (cpu == boot_cpu_addr)
378 continue;
379 __cpu_logical_map[CPU_INIT_NO] = cpu;
380 if (!cpu_stopped(CPU_INIT_NO))
381 continue;
382 smp_get_save_area(c_cpus, cpu);
383 c_cpus++;
384 }
385 goto out;
386 }
387
388 if (info->has_cpu_type) {
389 for (cpu = 0; cpu < info->combined; cpu++) {
390 if (info->cpu[cpu].address == boot_cpu_addr) {
391 smp_cpu_type = info->cpu[cpu].type;
392 break;
393 }
394 }
395 }
396
397 for (cpu = 0; cpu < info->combined; cpu++) {
398 if (info->has_cpu_type && info->cpu[cpu].type != smp_cpu_type)
399 continue;
400 cpu_addr = info->cpu[cpu].address;
401 if (cpu_addr == boot_cpu_addr)
402 continue;
403 __cpu_logical_map[CPU_INIT_NO] = cpu_addr;
404 if (!cpu_stopped(CPU_INIT_NO)) {
405 s_cpus++;
406 continue;
407 }
408 smp_get_save_area(c_cpus, cpu_addr);
409 c_cpus++;
410 }
411out:
412 kfree(info);
395d31d4 413 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
9d40d2e3 414 get_online_cpus();
1e489518 415 __smp_rescan_cpus();
9d40d2e3 416 put_online_cpus();
48483b32
HC
417}
418
1da177e4 419/*
39ce010d 420 * Activate a secondary processor.
1da177e4 421 */
ea1f4eec 422int __cpuinit start_secondary(void *cpuvoid)
1da177e4 423{
39ce010d
HC
424 /* Setup the cpu */
425 cpu_init();
5bfb5d69 426 preempt_disable();
d54853ef 427 /* Enable TOD clock interrupts on the secondary cpu. */
39ce010d 428 init_cpu_timer();
d54853ef 429 /* Enable cpu timer interrupts on the secondary cpu. */
39ce010d 430 init_cpu_vtimer();
1da177e4 431 /* Enable pfault pseudo page faults on this cpu. */
29b08d2b
HC
432 pfault_init();
433
e545a614
MS
434 /* call cpu notifiers */
435 notify_cpu_starting(smp_processor_id());
1da177e4 436 /* Mark this cpu as online */
ca9fc75a 437 ipi_call_lock();
1da177e4 438 cpu_set(smp_processor_id(), cpu_online_map);
ca9fc75a 439 ipi_call_unlock();
1da177e4
LT
440 /* Switch on interrupts */
441 local_irq_enable();
39ce010d 442 /* Print info about this processor */
7b468488 443 print_cpu_info();
39ce010d
HC
444 /* cpu_idle will call schedule for us */
445 cpu_idle();
446 return 0;
1da177e4
LT
447}
448
449static void __init smp_create_idle(unsigned int cpu)
450{
451 struct task_struct *p;
452
453 /*
454 * don't care about the psw and regs settings since we'll never
455 * reschedule the forked task.
456 */
457 p = fork_idle(cpu);
458 if (IS_ERR(p))
459 panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
460 current_set[cpu] = p;
461}
462
1cb6bb4b
HC
463static int __cpuinit smp_alloc_lowcore(int cpu)
464{
465 unsigned long async_stack, panic_stack;
466 struct _lowcore *lowcore;
1cb6bb4b 467
3fd26a77 468 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1cb6bb4b
HC
469 if (!lowcore)
470 return -ENOMEM;
471 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
1cb6bb4b 472 panic_stack = __get_free_page(GFP_KERNEL);
591bb4f6
HC
473 if (!panic_stack || !async_stack)
474 goto out;
98c7b388
HC
475 memcpy(lowcore, &S390_lowcore, 512);
476 memset((char *)lowcore + 512, 0, sizeof(*lowcore) - 512);
1cb6bb4b
HC
477 lowcore->async_stack = async_stack + ASYNC_SIZE;
478 lowcore->panic_stack = panic_stack + PAGE_SIZE;
479
480#ifndef CONFIG_64BIT
481 if (MACHINE_HAS_IEEE) {
482 unsigned long save_area;
483
484 save_area = get_zeroed_page(GFP_KERNEL);
485 if (!save_area)
33b1d09e 486 goto out;
1cb6bb4b
HC
487 lowcore->extended_save_area_addr = (u32) save_area;
488 }
c742b31c
MS
489#else
490 if (vdso_alloc_per_cpu(cpu, lowcore))
491 goto out;
1cb6bb4b
HC
492#endif
493 lowcore_ptr[cpu] = lowcore;
494 return 0;
495
591bb4f6 496out:
33b1d09e 497 free_page(panic_stack);
1cb6bb4b 498 free_pages(async_stack, ASYNC_ORDER);
3fd26a77 499 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
500 return -ENOMEM;
501}
502
1cb6bb4b
HC
503static void smp_free_lowcore(int cpu)
504{
505 struct _lowcore *lowcore;
1cb6bb4b 506
1cb6bb4b
HC
507 lowcore = lowcore_ptr[cpu];
508#ifndef CONFIG_64BIT
509 if (MACHINE_HAS_IEEE)
510 free_page((unsigned long) lowcore->extended_save_area_addr);
c742b31c
MS
511#else
512 vdso_free_per_cpu(cpu, lowcore);
1cb6bb4b
HC
513#endif
514 free_page(lowcore->panic_stack - PAGE_SIZE);
515 free_pages(lowcore->async_stack - ASYNC_SIZE, ASYNC_ORDER);
3fd26a77 516 free_pages((unsigned long) lowcore, LC_ORDER);
1cb6bb4b
HC
517 lowcore_ptr[cpu] = NULL;
518}
1cb6bb4b 519
1da177e4 520/* Upping and downing of CPUs */
1cb6bb4b 521int __cpuinit __cpu_up(unsigned int cpu)
1da177e4
LT
522{
523 struct task_struct *idle;
39ce010d 524 struct _lowcore *cpu_lowcore;
1da177e4 525 struct stack_frame *sf;
39ce010d 526 sigp_ccode ccode;
d0d3cdf4 527 u32 lowcore;
1da177e4 528
08d07968
HC
529 if (smp_cpu_state[cpu] != CPU_STATE_CONFIGURED)
530 return -EIO;
1cb6bb4b
HC
531 if (smp_alloc_lowcore(cpu))
532 return -ENOMEM;
d0d3cdf4
HC
533 do {
534 ccode = signal_processor(cpu, sigp_initial_cpu_reset);
535 if (ccode == sigp_busy)
536 udelay(10);
537 if (ccode == sigp_not_operational)
538 goto err_out;
539 } while (ccode == sigp_busy);
540
541 lowcore = (u32)(unsigned long)lowcore_ptr[cpu];
542 while (signal_processor_p(lowcore, cpu, sigp_set_prefix) == sigp_busy)
543 udelay(10);
1da177e4
LT
544
545 idle = current_set[cpu];
39ce010d 546 cpu_lowcore = lowcore_ptr[cpu];
1da177e4 547 cpu_lowcore->kernel_stack = (unsigned long)
39ce010d 548 task_stack_page(idle) + THREAD_SIZE;
1cb6bb4b 549 cpu_lowcore->thread_info = (unsigned long) task_thread_info(idle);
1da177e4
LT
550 sf = (struct stack_frame *) (cpu_lowcore->kernel_stack
551 - sizeof(struct pt_regs)
552 - sizeof(struct stack_frame));
553 memset(sf, 0, sizeof(struct stack_frame));
554 sf->gprs[9] = (unsigned long) sf;
555 cpu_lowcore->save_area[15] = (unsigned long) sf;
24d3e210 556 __ctl_store(cpu_lowcore->cregs_save_area, 0, 15);
94c12cc7
MS
557 asm volatile(
558 " stam 0,15,0(%0)"
559 : : "a" (&cpu_lowcore->access_regs_save_area) : "memory");
1da177e4 560 cpu_lowcore->percpu_offset = __per_cpu_offset[cpu];
39ce010d 561 cpu_lowcore->current_task = (unsigned long) idle;
7b468488 562 cpu_lowcore->cpu_nr = cpu;
591bb4f6 563 cpu_lowcore->kernel_asce = S390_lowcore.kernel_asce;
25097bf1 564 cpu_lowcore->machine_flags = S390_lowcore.machine_flags;
dfd9f7ab 565 cpu_lowcore->ftrace_func = S390_lowcore.ftrace_func;
1da177e4 566 eieio();
699ff13f 567
39ce010d 568 while (signal_processor(cpu, sigp_restart) == sigp_busy)
699ff13f 569 udelay(10);
1da177e4
LT
570
571 while (!cpu_online(cpu))
572 cpu_relax();
573 return 0;
d0d3cdf4
HC
574
575err_out:
576 smp_free_lowcore(cpu);
577 return -EIO;
1da177e4
LT
578}
579
48483b32 580static int __init setup_possible_cpus(char *s)
255acee7 581{
48483b32 582 int pcpus, cpu;
255acee7 583
48483b32 584 pcpus = simple_strtoul(s, NULL, 0);
88e01285
HC
585 init_cpu_possible(cpumask_of(0));
586 for (cpu = 1; cpu < pcpus && cpu < nr_cpu_ids; cpu++)
def6cfb7 587 set_cpu_possible(cpu, true);
37a33026
HC
588 return 0;
589}
590early_param("possible_cpus", setup_possible_cpus);
591
48483b32
HC
592#ifdef CONFIG_HOTPLUG_CPU
593
39ce010d 594int __cpu_disable(void)
1da177e4 595{
94c12cc7 596 struct ec_creg_mask_parms cr_parms;
f3705136 597 int cpu = smp_processor_id();
1da177e4 598
f3705136 599 cpu_clear(cpu, cpu_online_map);
1da177e4 600
1da177e4 601 /* Disable pfault pseudo page faults on this cpu. */
29b08d2b 602 pfault_fini();
1da177e4 603
94c12cc7
MS
604 memset(&cr_parms.orvals, 0, sizeof(cr_parms.orvals));
605 memset(&cr_parms.andvals, 0xff, sizeof(cr_parms.andvals));
1da177e4 606
94c12cc7 607 /* disable all external interrupts */
1da177e4 608 cr_parms.orvals[0] = 0;
39ce010d
HC
609 cr_parms.andvals[0] = ~(1 << 15 | 1 << 14 | 1 << 13 | 1 << 12 |
610 1 << 11 | 1 << 10 | 1 << 6 | 1 << 4);
1da177e4 611 /* disable all I/O interrupts */
1da177e4 612 cr_parms.orvals[6] = 0;
39ce010d
HC
613 cr_parms.andvals[6] = ~(1 << 31 | 1 << 30 | 1 << 29 | 1 << 28 |
614 1 << 27 | 1 << 26 | 1 << 25 | 1 << 24);
1da177e4 615 /* disable most machine checks */
1da177e4 616 cr_parms.orvals[14] = 0;
39ce010d
HC
617 cr_parms.andvals[14] = ~(1 << 28 | 1 << 27 | 1 << 26 |
618 1 << 25 | 1 << 24);
94c12cc7 619
1da177e4
LT
620 smp_ctl_bit_callback(&cr_parms);
621
1da177e4
LT
622 return 0;
623}
624
39ce010d 625void __cpu_die(unsigned int cpu)
1da177e4
LT
626{
627 /* Wait until target cpu is down */
5c0b912e 628 while (!cpu_stopped(cpu))
1da177e4 629 cpu_relax();
4f8048ee
HC
630 while (signal_processor_p(0, cpu, sigp_set_prefix) == sigp_busy)
631 udelay(10);
1cb6bb4b 632 smp_free_lowcore(cpu);
395d31d4 633 pr_info("Processor %d stopped\n", cpu);
1da177e4
LT
634}
635
39ce010d 636void cpu_die(void)
1da177e4
LT
637{
638 idle_task_exit();
f8501ba7
HC
639 while (signal_processor(smp_processor_id(), sigp_stop) == sigp_busy)
640 cpu_relax();
39ce010d 641 for (;;);
1da177e4
LT
642}
643
255acee7
HC
644#endif /* CONFIG_HOTPLUG_CPU */
645
1da177e4
LT
646void __init smp_prepare_cpus(unsigned int max_cpus)
647{
591bb4f6
HC
648#ifndef CONFIG_64BIT
649 unsigned long save_area = 0;
650#endif
651 unsigned long async_stack, panic_stack;
652 struct _lowcore *lowcore;
1da177e4 653 unsigned int cpu;
39ce010d 654
48483b32
HC
655 smp_detect_cpus();
656
39ce010d
HC
657 /* request the 0x1201 emergency signal external interrupt */
658 if (register_external_interrupt(0x1201, do_ext_call_interrupt) != 0)
659 panic("Couldn't request external interrupt 0x1201");
7b468488 660 print_cpu_info();
1da177e4 661
591bb4f6 662 /* Reallocate current lowcore, but keep its contents. */
3fd26a77 663 lowcore = (void *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
591bb4f6
HC
664 panic_stack = __get_free_page(GFP_KERNEL);
665 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
c742b31c 666 BUG_ON(!lowcore || !panic_stack || !async_stack);
347a8dc3 667#ifndef CONFIG_64BIT
77fa2245 668 if (MACHINE_HAS_IEEE)
591bb4f6 669 save_area = get_zeroed_page(GFP_KERNEL);
77fa2245 670#endif
591bb4f6
HC
671 local_irq_disable();
672 local_mcck_disable();
673 lowcore_ptr[smp_processor_id()] = lowcore;
674 *lowcore = S390_lowcore;
675 lowcore->panic_stack = panic_stack + PAGE_SIZE;
676 lowcore->async_stack = async_stack + ASYNC_SIZE;
677#ifndef CONFIG_64BIT
678 if (MACHINE_HAS_IEEE)
679 lowcore->extended_save_area_addr = (u32) save_area;
680#endif
681 set_prefix((u32)(unsigned long) lowcore);
682 local_mcck_enable();
683 local_irq_enable();
3a6ba460
HC
684#ifdef CONFIG_64BIT
685 if (vdso_alloc_per_cpu(smp_processor_id(), &S390_lowcore))
686 BUG();
687#endif
97db7fbf 688 for_each_possible_cpu(cpu)
1da177e4
LT
689 if (cpu != smp_processor_id())
690 smp_create_idle(cpu);
691}
692
ea1f4eec 693void __init smp_prepare_boot_cpu(void)
1da177e4
LT
694{
695 BUG_ON(smp_processor_id() != 0);
696
48483b32
HC
697 current_thread_info()->cpu = 0;
698 cpu_set(0, cpu_present_map);
1da177e4 699 cpu_set(0, cpu_online_map);
1da177e4
LT
700 S390_lowcore.percpu_offset = __per_cpu_offset[0];
701 current_set[0] = current;
08d07968 702 smp_cpu_state[0] = CPU_STATE_CONFIGURED;
c10fde0d 703 smp_cpu_polarization[0] = POLARIZATION_UNKNWN;
1da177e4
LT
704}
705
ea1f4eec 706void __init smp_cpus_done(unsigned int max_cpus)
1da177e4 707{
1da177e4
LT
708}
709
02beaccc
HC
710void __init smp_setup_processor_id(void)
711{
712 S390_lowcore.cpu_nr = 0;
713 __cpu_logical_map[0] = stap();
714}
715
1da177e4
LT
716/*
717 * the frequency of the profiling timer can be changed
718 * by writing a multiplier value into /proc/profile.
719 *
720 * usually you want to run this on all CPUs ;)
721 */
722int setup_profiling_timer(unsigned int multiplier)
723{
39ce010d 724 return 0;
1da177e4
LT
725}
726
08d07968 727#ifdef CONFIG_HOTPLUG_CPU
4a0b2b4d
AK
728static ssize_t cpu_configure_show(struct sys_device *dev,
729 struct sysdev_attribute *attr, char *buf)
08d07968
HC
730{
731 ssize_t count;
732
733 mutex_lock(&smp_cpu_state_mutex);
734 count = sprintf(buf, "%d\n", smp_cpu_state[dev->id]);
735 mutex_unlock(&smp_cpu_state_mutex);
736 return count;
737}
738
4a0b2b4d
AK
739static ssize_t cpu_configure_store(struct sys_device *dev,
740 struct sysdev_attribute *attr,
741 const char *buf, size_t count)
08d07968
HC
742{
743 int cpu = dev->id;
744 int val, rc;
745 char delim;
746
747 if (sscanf(buf, "%d %c", &val, &delim) != 1)
748 return -EINVAL;
749 if (val != 0 && val != 1)
750 return -EINVAL;
751
9d40d2e3 752 get_online_cpus();
0b18d318 753 mutex_lock(&smp_cpu_state_mutex);
08d07968
HC
754 rc = -EBUSY;
755 if (cpu_online(cpu))
756 goto out;
757 rc = 0;
758 switch (val) {
759 case 0:
760 if (smp_cpu_state[cpu] == CPU_STATE_CONFIGURED) {
761 rc = sclp_cpu_deconfigure(__cpu_logical_map[cpu]);
c10fde0d 762 if (!rc) {
08d07968 763 smp_cpu_state[cpu] = CPU_STATE_STANDBY;
c10fde0d
HC
764 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
765 }
08d07968
HC
766 }
767 break;
768 case 1:
769 if (smp_cpu_state[cpu] == CPU_STATE_STANDBY) {
770 rc = sclp_cpu_configure(__cpu_logical_map[cpu]);
c10fde0d 771 if (!rc) {
08d07968 772 smp_cpu_state[cpu] = CPU_STATE_CONFIGURED;
c10fde0d
HC
773 smp_cpu_polarization[cpu] = POLARIZATION_UNKNWN;
774 }
08d07968
HC
775 }
776 break;
777 default:
778 break;
779 }
780out:
08d07968 781 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 782 put_online_cpus();
08d07968
HC
783 return rc ? rc : count;
784}
785static SYSDEV_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
786#endif /* CONFIG_HOTPLUG_CPU */
787
4a0b2b4d
AK
788static ssize_t cpu_polarization_show(struct sys_device *dev,
789 struct sysdev_attribute *attr, char *buf)
c10fde0d
HC
790{
791 int cpu = dev->id;
792 ssize_t count;
793
794 mutex_lock(&smp_cpu_state_mutex);
795 switch (smp_cpu_polarization[cpu]) {
796 case POLARIZATION_HRZ:
797 count = sprintf(buf, "horizontal\n");
798 break;
799 case POLARIZATION_VL:
800 count = sprintf(buf, "vertical:low\n");
801 break;
802 case POLARIZATION_VM:
803 count = sprintf(buf, "vertical:medium\n");
804 break;
805 case POLARIZATION_VH:
806 count = sprintf(buf, "vertical:high\n");
807 break;
808 default:
809 count = sprintf(buf, "unknown\n");
810 break;
811 }
812 mutex_unlock(&smp_cpu_state_mutex);
813 return count;
814}
815static SYSDEV_ATTR(polarization, 0444, cpu_polarization_show, NULL);
816
4a0b2b4d
AK
817static ssize_t show_cpu_address(struct sys_device *dev,
818 struct sysdev_attribute *attr, char *buf)
08d07968
HC
819{
820 return sprintf(buf, "%d\n", __cpu_logical_map[dev->id]);
821}
822static SYSDEV_ATTR(address, 0444, show_cpu_address, NULL);
823
824
825static struct attribute *cpu_common_attrs[] = {
826#ifdef CONFIG_HOTPLUG_CPU
827 &attr_configure.attr,
828#endif
829 &attr_address.attr,
c10fde0d 830 &attr_polarization.attr,
08d07968
HC
831 NULL,
832};
833
834static struct attribute_group cpu_common_attr_group = {
835 .attrs = cpu_common_attrs,
836};
1da177e4 837
4a0b2b4d
AK
838static ssize_t show_capability(struct sys_device *dev,
839 struct sysdev_attribute *attr, char *buf)
2fc2d1e9
HC
840{
841 unsigned int capability;
842 int rc;
843
844 rc = get_cpu_capability(&capability);
845 if (rc)
846 return rc;
847 return sprintf(buf, "%u\n", capability);
848}
849static SYSDEV_ATTR(capability, 0444, show_capability, NULL);
850
4a0b2b4d
AK
851static ssize_t show_idle_count(struct sys_device *dev,
852 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
853{
854 struct s390_idle_data *idle;
855 unsigned long long idle_count;
e98bbaaf 856 unsigned int sequence;
fae8b22d
HC
857
858 idle = &per_cpu(s390_idle, dev->id);
e98bbaaf
MS
859repeat:
860 sequence = idle->sequence;
861 smp_rmb();
862 if (sequence & 1)
863 goto repeat;
fae8b22d 864 idle_count = idle->idle_count;
6f430924
MS
865 if (idle->idle_enter)
866 idle_count++;
e98bbaaf
MS
867 smp_rmb();
868 if (idle->sequence != sequence)
869 goto repeat;
fae8b22d
HC
870 return sprintf(buf, "%llu\n", idle_count);
871}
872static SYSDEV_ATTR(idle_count, 0444, show_idle_count, NULL);
873
4a0b2b4d
AK
874static ssize_t show_idle_time(struct sys_device *dev,
875 struct sysdev_attribute *attr, char *buf)
fae8b22d
HC
876{
877 struct s390_idle_data *idle;
6f430924 878 unsigned long long now, idle_time, idle_enter;
e98bbaaf 879 unsigned int sequence;
fae8b22d
HC
880
881 idle = &per_cpu(s390_idle, dev->id);
6f430924 882 now = get_clock();
e98bbaaf
MS
883repeat:
884 sequence = idle->sequence;
885 smp_rmb();
886 if (sequence & 1)
887 goto repeat;
6f430924
MS
888 idle_time = idle->idle_time;
889 idle_enter = idle->idle_enter;
890 if (idle_enter != 0ULL && idle_enter < now)
891 idle_time += now - idle_enter;
e98bbaaf
MS
892 smp_rmb();
893 if (idle->sequence != sequence)
894 goto repeat;
6f430924 895 return sprintf(buf, "%llu\n", idle_time >> 12);
fae8b22d 896}
69d39d66 897static SYSDEV_ATTR(idle_time_us, 0444, show_idle_time, NULL);
fae8b22d 898
08d07968 899static struct attribute *cpu_online_attrs[] = {
fae8b22d
HC
900 &attr_capability.attr,
901 &attr_idle_count.attr,
69d39d66 902 &attr_idle_time_us.attr,
fae8b22d
HC
903 NULL,
904};
905
08d07968
HC
906static struct attribute_group cpu_online_attr_group = {
907 .attrs = cpu_online_attrs,
fae8b22d
HC
908};
909
2fc2d1e9
HC
910static int __cpuinit smp_cpu_notify(struct notifier_block *self,
911 unsigned long action, void *hcpu)
912{
913 unsigned int cpu = (unsigned int)(long)hcpu;
914 struct cpu *c = &per_cpu(cpu_devices, cpu);
915 struct sys_device *s = &c->sysdev;
fae8b22d 916 struct s390_idle_data *idle;
2fc2d1e9
HC
917
918 switch (action) {
919 case CPU_ONLINE:
8bb78442 920 case CPU_ONLINE_FROZEN:
fae8b22d 921 idle = &per_cpu(s390_idle, cpu);
e98bbaaf 922 memset(idle, 0, sizeof(struct s390_idle_data));
08d07968 923 if (sysfs_create_group(&s->kobj, &cpu_online_attr_group))
2fc2d1e9
HC
924 return NOTIFY_BAD;
925 break;
926 case CPU_DEAD:
8bb78442 927 case CPU_DEAD_FROZEN:
08d07968 928 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
2fc2d1e9
HC
929 break;
930 }
931 return NOTIFY_OK;
932}
933
934static struct notifier_block __cpuinitdata smp_cpu_nb = {
39ce010d 935 .notifier_call = smp_cpu_notify,
2fc2d1e9
HC
936};
937
2bc89b5e 938static int __devinit smp_add_present_cpu(int cpu)
08d07968
HC
939{
940 struct cpu *c = &per_cpu(cpu_devices, cpu);
941 struct sys_device *s = &c->sysdev;
942 int rc;
943
944 c->hotpluggable = 1;
945 rc = register_cpu(c, cpu);
946 if (rc)
947 goto out;
948 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
949 if (rc)
950 goto out_cpu;
951 if (!cpu_online(cpu))
952 goto out;
953 rc = sysfs_create_group(&s->kobj, &cpu_online_attr_group);
954 if (!rc)
955 return 0;
956 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
957out_cpu:
958#ifdef CONFIG_HOTPLUG_CPU
959 unregister_cpu(c);
960#endif
961out:
962 return rc;
963}
964
965#ifdef CONFIG_HOTPLUG_CPU
1e489518 966
67060d9c 967int __ref smp_rescan_cpus(void)
08d07968
HC
968{
969 cpumask_t newcpus;
970 int cpu;
971 int rc;
972
9d40d2e3 973 get_online_cpus();
0b18d318 974 mutex_lock(&smp_cpu_state_mutex);
08d07968 975 newcpus = cpu_present_map;
1e489518 976 rc = __smp_rescan_cpus();
08d07968
HC
977 if (rc)
978 goto out;
979 cpus_andnot(newcpus, cpu_present_map, newcpus);
980 for_each_cpu_mask(cpu, newcpus) {
981 rc = smp_add_present_cpu(cpu);
982 if (rc)
983 cpu_clear(cpu, cpu_present_map);
984 }
985 rc = 0;
986out:
08d07968 987 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 988 put_online_cpus();
c10fde0d
HC
989 if (!cpus_empty(newcpus))
990 topology_schedule_update();
1e489518
HC
991 return rc;
992}
993
da5aae70 994static ssize_t __ref rescan_store(struct sysdev_class *class, const char *buf,
1e489518
HC
995 size_t count)
996{
997 int rc;
998
999 rc = smp_rescan_cpus();
08d07968
HC
1000 return rc ? rc : count;
1001}
da5aae70 1002static SYSDEV_CLASS_ATTR(rescan, 0200, NULL, rescan_store);
08d07968
HC
1003#endif /* CONFIG_HOTPLUG_CPU */
1004
da5aae70 1005static ssize_t dispatching_show(struct sysdev_class *class, char *buf)
c10fde0d
HC
1006{
1007 ssize_t count;
1008
1009 mutex_lock(&smp_cpu_state_mutex);
1010 count = sprintf(buf, "%d\n", cpu_management);
1011 mutex_unlock(&smp_cpu_state_mutex);
1012 return count;
1013}
1014
da5aae70
HC
1015static ssize_t dispatching_store(struct sysdev_class *dev, const char *buf,
1016 size_t count)
c10fde0d
HC
1017{
1018 int val, rc;
1019 char delim;
1020
1021 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1022 return -EINVAL;
1023 if (val != 0 && val != 1)
1024 return -EINVAL;
1025 rc = 0;
c10fde0d 1026 get_online_cpus();
0b18d318 1027 mutex_lock(&smp_cpu_state_mutex);
c10fde0d
HC
1028 if (cpu_management == val)
1029 goto out;
1030 rc = topology_set_cpu_management(val);
1031 if (!rc)
1032 cpu_management = val;
1033out:
c10fde0d 1034 mutex_unlock(&smp_cpu_state_mutex);
0b18d318 1035 put_online_cpus();
c10fde0d
HC
1036 return rc ? rc : count;
1037}
da5aae70
HC
1038static SYSDEV_CLASS_ATTR(dispatching, 0644, dispatching_show,
1039 dispatching_store);
c10fde0d 1040
1da177e4
LT
1041static int __init topology_init(void)
1042{
1043 int cpu;
fae8b22d 1044 int rc;
2fc2d1e9
HC
1045
1046 register_cpu_notifier(&smp_cpu_nb);
1da177e4 1047
08d07968 1048#ifdef CONFIG_HOTPLUG_CPU
da5aae70 1049 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_rescan);
08d07968
HC
1050 if (rc)
1051 return rc;
1052#endif
da5aae70 1053 rc = sysdev_class_create_file(&cpu_sysdev_class, &attr_dispatching);
c10fde0d
HC
1054 if (rc)
1055 return rc;
08d07968
HC
1056 for_each_present_cpu(cpu) {
1057 rc = smp_add_present_cpu(cpu);
fae8b22d
HC
1058 if (rc)
1059 return rc;
1da177e4
LT
1060 }
1061 return 0;
1062}
1da177e4 1063subsys_initcall(topology_init);