Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
5e9a2692 | 2 | * Ptrace user space interface. |
1da177e4 | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2010 |
5e9a2692 | 5 | * Author(s): Denis Joseph Barrow |
1da177e4 | 6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/kernel.h> | |
10 | #include <linux/sched.h> | |
68db0cf1 | 11 | #include <linux/sched/task_stack.h> |
1da177e4 LT |
12 | #include <linux/mm.h> |
13 | #include <linux/smp.h> | |
1da177e4 LT |
14 | #include <linux/errno.h> |
15 | #include <linux/ptrace.h> | |
16 | #include <linux/user.h> | |
17 | #include <linux/security.h> | |
18 | #include <linux/audit.h> | |
7ed20e1a | 19 | #include <linux/signal.h> |
63506c41 MS |
20 | #include <linux/elf.h> |
21 | #include <linux/regset.h> | |
753c4dd6 | 22 | #include <linux/tracehook.h> |
bcf5cef7 | 23 | #include <linux/seccomp.h> |
048cd4e5 | 24 | #include <linux/compat.h> |
9bf1226b | 25 | #include <trace/syscall.h> |
1da177e4 LT |
26 | #include <asm/segment.h> |
27 | #include <asm/page.h> | |
28 | #include <asm/pgtable.h> | |
29 | #include <asm/pgalloc.h> | |
7c0f6ba6 | 30 | #include <linux/uaccess.h> |
778959db | 31 | #include <asm/unistd.h> |
a0616cde | 32 | #include <asm/switch_to.h> |
a806170e | 33 | #include "entry.h" |
1da177e4 | 34 | |
347a8dc3 | 35 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
36 | #include "compat_ptrace.h" |
37 | #endif | |
38 | ||
1c569f02 JS |
39 | #define CREATE_TRACE_POINTS |
40 | #include <trace/events/syscalls.h> | |
5e9ad7df | 41 | |
64597f9d | 42 | void update_cr_regs(struct task_struct *task) |
1da177e4 | 43 | { |
5e9a2692 MS |
44 | struct pt_regs *regs = task_pt_regs(task); |
45 | struct thread_struct *thread = &task->thread; | |
a45aff52 | 46 | struct per_regs old, new; |
916cda1a MS |
47 | unsigned long cr0_old, cr0_new; |
48 | unsigned long cr2_old, cr2_new; | |
49 | int cr0_changed, cr2_changed; | |
50 | ||
51 | __ctl_store(cr0_old, 0, 0); | |
52 | __ctl_store(cr2_old, 2, 2); | |
53 | cr0_new = cr0_old; | |
54 | cr2_new = cr2_old; | |
d35339a4 | 55 | /* Take care of the enable/disable of transactional execution. */ |
9977e886 | 56 | if (MACHINE_HAS_TE) { |
9977e886 | 57 | /* Set or clear transaction execution TXC bit 8. */ |
916cda1a | 58 | cr0_new |= (1UL << 55); |
9977e886 | 59 | if (task->thread.per_flags & PER_FLAG_NO_TE) |
916cda1a | 60 | cr0_new &= ~(1UL << 55); |
9977e886 | 61 | /* Set or clear transaction execution TDC bits 62 and 63. */ |
916cda1a | 62 | cr2_new &= ~3UL; |
9977e886 HB |
63 | if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) { |
64 | if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND_TEND) | |
916cda1a | 65 | cr2_new |= 1UL; |
9977e886 | 66 | else |
916cda1a | 67 | cr2_new |= 2UL; |
64597f9d | 68 | } |
d35339a4 | 69 | } |
916cda1a MS |
70 | /* Take care of enable/disable of guarded storage. */ |
71 | if (MACHINE_HAS_GS) { | |
72 | cr2_new &= ~(1UL << 4); | |
73 | if (task->thread.gs_cb) | |
74 | cr2_new |= (1UL << 4); | |
75 | } | |
76 | /* Load control register 0/2 iff changed */ | |
77 | cr0_changed = cr0_new != cr0_old; | |
78 | cr2_changed = cr2_new != cr2_old; | |
79 | if (cr0_changed) | |
80 | __ctl_load(cr0_new, 0, 0); | |
81 | if (cr2_changed) | |
82 | __ctl_load(cr2_new, 2, 2); | |
a45aff52 MS |
83 | /* Copy user specified PER registers */ |
84 | new.control = thread->per_user.control; | |
85 | new.start = thread->per_user.start; | |
86 | new.end = thread->per_user.end; | |
87 | ||
88 | /* merge TIF_SINGLE_STEP into user specified PER registers. */ | |
2a0a5b22 JW |
89 | if (test_tsk_thread_flag(task, TIF_SINGLE_STEP) || |
90 | test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) { | |
818a330c MS |
91 | if (test_tsk_thread_flag(task, TIF_BLOCK_STEP)) |
92 | new.control |= PER_EVENT_BRANCH; | |
93 | else | |
94 | new.control |= PER_EVENT_IFETCH; | |
d35339a4 MS |
95 | new.control |= PER_CONTROL_SUSPENSION; |
96 | new.control |= PER_EVENT_TRANSACTION_END; | |
2a0a5b22 JW |
97 | if (test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) |
98 | new.control |= PER_EVENT_IFETCH; | |
a45aff52 | 99 | new.start = 0; |
9cb1ccec | 100 | new.end = -1UL; |
a45aff52 | 101 | } |
5e9a2692 MS |
102 | |
103 | /* Take care of the PER enablement bit in the PSW. */ | |
a45aff52 | 104 | if (!(new.control & PER_EVENT_MASK)) { |
1da177e4 | 105 | regs->psw.mask &= ~PSW_MASK_PER; |
5e9a2692 | 106 | return; |
c3311c13 | 107 | } |
5e9a2692 MS |
108 | regs->psw.mask |= PSW_MASK_PER; |
109 | __ctl_store(old, 9, 11); | |
a45aff52 MS |
110 | if (memcmp(&new, &old, sizeof(struct per_regs)) != 0) |
111 | __ctl_load(new, 9, 11); | |
1da177e4 LT |
112 | } |
113 | ||
0ac30be4 | 114 | void user_enable_single_step(struct task_struct *task) |
1da177e4 | 115 | { |
818a330c | 116 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 117 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
118 | } |
119 | ||
0ac30be4 | 120 | void user_disable_single_step(struct task_struct *task) |
1da177e4 | 121 | { |
818a330c | 122 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 123 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
124 | } |
125 | ||
818a330c MS |
126 | void user_enable_block_step(struct task_struct *task) |
127 | { | |
128 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
129 | set_tsk_thread_flag(task, TIF_BLOCK_STEP); | |
130 | } | |
131 | ||
1da177e4 LT |
132 | /* |
133 | * Called by kernel/ptrace.c when detaching.. | |
134 | * | |
5e9a2692 | 135 | * Clear all debugging related fields. |
1da177e4 | 136 | */ |
5e9a2692 | 137 | void ptrace_disable(struct task_struct *task) |
1da177e4 | 138 | { |
5e9a2692 MS |
139 | memset(&task->thread.per_user, 0, sizeof(task->thread.per_user)); |
140 | memset(&task->thread.per_event, 0, sizeof(task->thread.per_event)); | |
141 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
d3a73acb | 142 | clear_pt_regs_flag(task_pt_regs(task), PIF_PER_TRAP); |
d35339a4 | 143 | task->thread.per_flags = 0; |
1da177e4 LT |
144 | } |
145 | ||
5a79859a | 146 | #define __ADDR_MASK 7 |
1da177e4 | 147 | |
5e9a2692 MS |
148 | static inline unsigned long __peek_user_per(struct task_struct *child, |
149 | addr_t addr) | |
150 | { | |
151 | struct per_struct_kernel *dummy = NULL; | |
152 | ||
153 | if (addr == (addr_t) &dummy->cr9) | |
154 | /* Control bits of the active per set. */ | |
155 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
156 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
157 | else if (addr == (addr_t) &dummy->cr10) | |
158 | /* Start address of the active per set. */ | |
159 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
160 | 0 : child->thread.per_user.start; | |
161 | else if (addr == (addr_t) &dummy->cr11) | |
162 | /* End address of the active per set. */ | |
163 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
9cb1ccec | 164 | -1UL : child->thread.per_user.end; |
5e9a2692 MS |
165 | else if (addr == (addr_t) &dummy->bits) |
166 | /* Single-step bit. */ | |
167 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
168 | (1UL << (BITS_PER_LONG - 1)) : 0; | |
169 | else if (addr == (addr_t) &dummy->starting_addr) | |
170 | /* Start address of the user specified per set. */ | |
171 | return child->thread.per_user.start; | |
172 | else if (addr == (addr_t) &dummy->ending_addr) | |
173 | /* End address of the user specified per set. */ | |
174 | return child->thread.per_user.end; | |
175 | else if (addr == (addr_t) &dummy->perc_atmid) | |
176 | /* PER code, ATMID and AI of the last PER trap */ | |
177 | return (unsigned long) | |
178 | child->thread.per_event.cause << (BITS_PER_LONG - 16); | |
179 | else if (addr == (addr_t) &dummy->address) | |
180 | /* Address of the last PER trap */ | |
181 | return child->thread.per_event.address; | |
182 | else if (addr == (addr_t) &dummy->access_id) | |
183 | /* Access id of the last PER trap */ | |
184 | return (unsigned long) | |
185 | child->thread.per_event.paid << (BITS_PER_LONG - 8); | |
186 | return 0; | |
187 | } | |
188 | ||
1da177e4 LT |
189 | /* |
190 | * Read the word at offset addr from the user area of a process. The | |
191 | * trouble here is that the information is littered over different | |
192 | * locations. The process registers are found on the kernel stack, | |
193 | * the floating point stuff and the trace settings are stored in | |
194 | * the task structure. In addition the different structures in | |
195 | * struct user contain pad bytes that should be read as zeroes. | |
196 | * Lovely... | |
197 | */ | |
63506c41 | 198 | static unsigned long __peek_user(struct task_struct *child, addr_t addr) |
1da177e4 LT |
199 | { |
200 | struct user *dummy = NULL; | |
63506c41 | 201 | addr_t offset, tmp; |
1da177e4 LT |
202 | |
203 | if (addr < (addr_t) &dummy->regs.acrs) { | |
204 | /* | |
205 | * psw and gprs are stored on the stack | |
206 | */ | |
c7584fb6 | 207 | tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr); |
5ebf250d | 208 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
b50511e4 | 209 | /* Return a clean psw mask. */ |
5ebf250d HC |
210 | tmp &= PSW_MASK_USER | PSW_MASK_RI; |
211 | tmp |= PSW_USER_BITS; | |
212 | } | |
1da177e4 LT |
213 | |
214 | } else if (addr < (addr_t) &dummy->regs.orig_gpr2) { | |
215 | /* | |
216 | * access registers are stored in the thread structure | |
217 | */ | |
218 | offset = addr - (addr_t) &dummy->regs.acrs; | |
778959db MS |
219 | /* |
220 | * Very special case: old & broken 64 bit gdb reading | |
221 | * from acrs[15]. Result is a 64 bit value. Read the | |
222 | * 32 bit acrs[15] value and shift it by 32. Sick... | |
223 | */ | |
224 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
225 | tmp = ((unsigned long) child->thread.acrs[15]) << 32; | |
226 | else | |
5a79859a | 227 | tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset); |
1da177e4 LT |
228 | |
229 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
230 | /* | |
231 | * orig_gpr2 is stored on the kernel stack | |
232 | */ | |
c7584fb6 | 233 | tmp = (addr_t) task_pt_regs(child)->orig_gpr2; |
1da177e4 | 234 | |
3d6e48f4 JW |
235 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
236 | /* | |
237 | * prevent reads of padding hole between | |
238 | * orig_gpr2 and fp_regs on s390. | |
239 | */ | |
240 | tmp = 0; | |
241 | ||
86c558e8 MS |
242 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
243 | /* | |
244 | * floating point control reg. is in the thread structure | |
245 | */ | |
904818e2 | 246 | tmp = child->thread.fpu.fpc; |
86c558e8 MS |
247 | tmp <<= BITS_PER_LONG - 32; |
248 | ||
1da177e4 | 249 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
86c558e8 | 250 | /* |
904818e2 HB |
251 | * floating point regs. are either in child->thread.fpu |
252 | * or the child->thread.fpu.vxrs array | |
1da177e4 | 253 | */ |
86c558e8 | 254 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
b5510d9b | 255 | if (MACHINE_HAS_VX) |
86c558e8 | 256 | tmp = *(addr_t *) |
904818e2 | 257 | ((addr_t) child->thread.fpu.vxrs + 2*offset); |
86c558e8 | 258 | else |
86c558e8 | 259 | tmp = *(addr_t *) |
55a423b6 | 260 | ((addr_t) child->thread.fpu.fprs + offset); |
1da177e4 LT |
261 | |
262 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
263 | /* | |
5e9a2692 | 264 | * Handle access to the per_info structure. |
1da177e4 | 265 | */ |
5e9a2692 MS |
266 | addr -= (addr_t) &dummy->regs.per_info; |
267 | tmp = __peek_user_per(child, addr); | |
1da177e4 LT |
268 | |
269 | } else | |
270 | tmp = 0; | |
271 | ||
63506c41 | 272 | return tmp; |
1da177e4 LT |
273 | } |
274 | ||
1da177e4 | 275 | static int |
63506c41 | 276 | peek_user(struct task_struct *child, addr_t addr, addr_t data) |
1da177e4 | 277 | { |
63506c41 | 278 | addr_t tmp, mask; |
1da177e4 LT |
279 | |
280 | /* | |
281 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
63506c41 | 282 | * an alignment of 4. Programmers from hell... |
1da177e4 | 283 | */ |
778959db | 284 | mask = __ADDR_MASK; |
547e3cec MS |
285 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
286 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
778959db | 287 | mask = 3; |
778959db | 288 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) |
1da177e4 LT |
289 | return -EIO; |
290 | ||
63506c41 MS |
291 | tmp = __peek_user(child, addr); |
292 | return put_user(tmp, (addr_t __user *) data); | |
293 | } | |
294 | ||
5e9a2692 MS |
295 | static inline void __poke_user_per(struct task_struct *child, |
296 | addr_t addr, addr_t data) | |
297 | { | |
298 | struct per_struct_kernel *dummy = NULL; | |
299 | ||
300 | /* | |
301 | * There are only three fields in the per_info struct that the | |
302 | * debugger user can write to. | |
303 | * 1) cr9: the debugger wants to set a new PER event mask | |
304 | * 2) starting_addr: the debugger wants to set a new starting | |
305 | * address to use with the PER event mask. | |
306 | * 3) ending_addr: the debugger wants to set a new ending | |
307 | * address to use with the PER event mask. | |
308 | * The user specified PER event mask and the start and end | |
309 | * addresses are used only if single stepping is not in effect. | |
310 | * Writes to any other field in per_info are ignored. | |
311 | */ | |
312 | if (addr == (addr_t) &dummy->cr9) | |
313 | /* PER event mask of the user specified per set. */ | |
314 | child->thread.per_user.control = | |
315 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
316 | else if (addr == (addr_t) &dummy->starting_addr) | |
317 | /* Starting address of the user specified per set. */ | |
318 | child->thread.per_user.start = data; | |
319 | else if (addr == (addr_t) &dummy->ending_addr) | |
320 | /* Ending address of the user specified per set. */ | |
321 | child->thread.per_user.end = data; | |
322 | } | |
323 | ||
63506c41 MS |
324 | /* |
325 | * Write a word to the user area of a process at location addr. This | |
326 | * operation does have an additional problem compared to peek_user. | |
327 | * Stores to the program status word and on the floating point | |
328 | * control register needs to get checked for validity. | |
329 | */ | |
330 | static int __poke_user(struct task_struct *child, addr_t addr, addr_t data) | |
331 | { | |
332 | struct user *dummy = NULL; | |
d4e81b35 | 333 | addr_t offset; |
63506c41 | 334 | |
1da177e4 LT |
335 | if (addr < (addr_t) &dummy->regs.acrs) { |
336 | /* | |
337 | * psw and gprs are stored on the stack | |
338 | */ | |
5ebf250d HC |
339 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
340 | unsigned long mask = PSW_MASK_USER; | |
341 | ||
342 | mask |= is_ri_task(child) ? PSW_MASK_RI : 0; | |
dab6cf55 MS |
343 | if ((data ^ PSW_USER_BITS) & ~mask) |
344 | /* Invalid psw mask. */ | |
345 | return -EINVAL; | |
346 | if ((data & PSW_MASK_ASC) == PSW_ASC_HOME) | |
347 | /* Invalid address-space-control bits */ | |
5ebf250d HC |
348 | return -EINVAL; |
349 | if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)) | |
dab6cf55 | 350 | /* Invalid addressing mode bits */ |
5ebf250d HC |
351 | return -EINVAL; |
352 | } | |
c7584fb6 | 353 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; |
1da177e4 LT |
354 | |
355 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { | |
356 | /* | |
357 | * access registers are stored in the thread structure | |
358 | */ | |
359 | offset = addr - (addr_t) &dummy->regs.acrs; | |
778959db MS |
360 | /* |
361 | * Very special case: old & broken 64 bit gdb writing | |
362 | * to acrs[15] with a 64 bit value. Ignore the lower | |
363 | * half of the value and write the upper 32 bit to | |
364 | * acrs[15]. Sick... | |
365 | */ | |
366 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
367 | child->thread.acrs[15] = (unsigned int) (data >> 32); | |
368 | else | |
5a79859a | 369 | *(addr_t *)((addr_t) &child->thread.acrs + offset) = data; |
1da177e4 LT |
370 | |
371 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
372 | /* | |
373 | * orig_gpr2 is stored on the kernel stack | |
374 | */ | |
c7584fb6 | 375 | task_pt_regs(child)->orig_gpr2 = data; |
1da177e4 | 376 | |
3d6e48f4 JW |
377 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
378 | /* | |
379 | * prevent writes of padding hole between | |
380 | * orig_gpr2 and fp_regs on s390. | |
381 | */ | |
382 | return 0; | |
383 | ||
86c558e8 MS |
384 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
385 | /* | |
386 | * floating point control reg. is in the thread structure | |
387 | */ | |
388 | if ((unsigned int) data != 0 || | |
389 | test_fp_ctl(data >> (BITS_PER_LONG - 32))) | |
390 | return -EINVAL; | |
904818e2 | 391 | child->thread.fpu.fpc = data >> (BITS_PER_LONG - 32); |
86c558e8 | 392 | |
1da177e4 LT |
393 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
394 | /* | |
904818e2 HB |
395 | * floating point regs. are either in child->thread.fpu |
396 | * or the child->thread.fpu.vxrs array | |
1da177e4 | 397 | */ |
86c558e8 | 398 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
b5510d9b | 399 | if (MACHINE_HAS_VX) |
86c558e8 | 400 | *(addr_t *)((addr_t) |
904818e2 | 401 | child->thread.fpu.vxrs + 2*offset) = data; |
86c558e8 | 402 | else |
86c558e8 | 403 | *(addr_t *)((addr_t) |
55a423b6 | 404 | child->thread.fpu.fprs + offset) = data; |
1da177e4 LT |
405 | |
406 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
407 | /* | |
5e9a2692 | 408 | * Handle access to the per_info structure. |
1da177e4 | 409 | */ |
5e9a2692 MS |
410 | addr -= (addr_t) &dummy->regs.per_info; |
411 | __poke_user_per(child, addr, data); | |
1da177e4 LT |
412 | |
413 | } | |
414 | ||
1da177e4 LT |
415 | return 0; |
416 | } | |
417 | ||
5e9a2692 | 418 | static int poke_user(struct task_struct *child, addr_t addr, addr_t data) |
63506c41 | 419 | { |
63506c41 MS |
420 | addr_t mask; |
421 | ||
422 | /* | |
423 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
424 | * an alignment of 4. Programmers from hell indeed... | |
425 | */ | |
426 | mask = __ADDR_MASK; | |
547e3cec MS |
427 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
428 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
63506c41 | 429 | mask = 3; |
63506c41 MS |
430 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) |
431 | return -EIO; | |
432 | ||
433 | return __poke_user(child, addr, data); | |
434 | } | |
435 | ||
9b05a69e NK |
436 | long arch_ptrace(struct task_struct *child, long request, |
437 | unsigned long addr, unsigned long data) | |
1da177e4 | 438 | { |
1da177e4 LT |
439 | ptrace_area parea; |
440 | int copied, ret; | |
441 | ||
442 | switch (request) { | |
1da177e4 LT |
443 | case PTRACE_PEEKUSR: |
444 | /* read the word at location addr in the USER area. */ | |
445 | return peek_user(child, addr, data); | |
446 | ||
1da177e4 LT |
447 | case PTRACE_POKEUSR: |
448 | /* write the word at location addr in the USER area */ | |
449 | return poke_user(child, addr, data); | |
450 | ||
451 | case PTRACE_PEEKUSR_AREA: | |
452 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 453 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
454 | sizeof(parea))) |
455 | return -EFAULT; | |
456 | addr = parea.kernel_addr; | |
457 | data = parea.process_addr; | |
458 | copied = 0; | |
459 | while (copied < parea.len) { | |
460 | if (request == PTRACE_PEEKUSR_AREA) | |
461 | ret = peek_user(child, addr, data); | |
462 | else { | |
2b67fc46 HC |
463 | addr_t utmp; |
464 | if (get_user(utmp, | |
465 | (addr_t __force __user *) data)) | |
1da177e4 | 466 | return -EFAULT; |
2b67fc46 | 467 | ret = poke_user(child, addr, utmp); |
1da177e4 LT |
468 | } |
469 | if (ret) | |
470 | return ret; | |
471 | addr += sizeof(unsigned long); | |
472 | data += sizeof(unsigned long); | |
473 | copied += sizeof(unsigned long); | |
474 | } | |
475 | return 0; | |
86f2552b | 476 | case PTRACE_GET_LAST_BREAK: |
ef280c85 | 477 | put_user(child->thread.last_break, |
86f2552b MS |
478 | (unsigned long __user *) data); |
479 | return 0; | |
d35339a4 MS |
480 | case PTRACE_ENABLE_TE: |
481 | if (!MACHINE_HAS_TE) | |
482 | return -EIO; | |
483 | child->thread.per_flags &= ~PER_FLAG_NO_TE; | |
484 | return 0; | |
485 | case PTRACE_DISABLE_TE: | |
486 | if (!MACHINE_HAS_TE) | |
487 | return -EIO; | |
488 | child->thread.per_flags |= PER_FLAG_NO_TE; | |
64597f9d MM |
489 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; |
490 | return 0; | |
491 | case PTRACE_TE_ABORT_RAND: | |
492 | if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE)) | |
493 | return -EIO; | |
494 | switch (data) { | |
495 | case 0UL: | |
496 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; | |
497 | break; | |
498 | case 1UL: | |
499 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
500 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND; | |
501 | break; | |
502 | case 2UL: | |
503 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
504 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND; | |
505 | break; | |
506 | default: | |
507 | return -EINVAL; | |
508 | } | |
d35339a4 | 509 | return 0; |
07805ac8 | 510 | default: |
07805ac8 | 511 | return ptrace_request(child, request, addr, data); |
1da177e4 | 512 | } |
1da177e4 LT |
513 | } |
514 | ||
347a8dc3 | 515 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
516 | /* |
517 | * Now the fun part starts... a 31 bit program running in the | |
518 | * 31 bit emulation tracing another program. PTRACE_PEEKTEXT, | |
519 | * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy | |
520 | * to handle, the difference to the 64 bit versions of the requests | |
521 | * is that the access is done in multiples of 4 byte instead of | |
522 | * 8 bytes (sizeof(unsigned long) on 31/64 bit). | |
523 | * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA, | |
524 | * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program | |
525 | * is a 31 bit program too, the content of struct user can be | |
526 | * emulated. A 31 bit program peeking into the struct user of | |
527 | * a 64 bit program is a no-no. | |
528 | */ | |
529 | ||
5e9a2692 MS |
530 | /* |
531 | * Same as peek_user_per but for a 31 bit program. | |
532 | */ | |
533 | static inline __u32 __peek_user_per_compat(struct task_struct *child, | |
534 | addr_t addr) | |
535 | { | |
536 | struct compat_per_struct_kernel *dummy32 = NULL; | |
537 | ||
538 | if (addr == (addr_t) &dummy32->cr9) | |
539 | /* Control bits of the active per set. */ | |
540 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
541 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
542 | else if (addr == (addr_t) &dummy32->cr10) | |
543 | /* Start address of the active per set. */ | |
544 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
545 | 0 : child->thread.per_user.start; | |
546 | else if (addr == (addr_t) &dummy32->cr11) | |
547 | /* End address of the active per set. */ | |
548 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
549 | PSW32_ADDR_INSN : child->thread.per_user.end; | |
550 | else if (addr == (addr_t) &dummy32->bits) | |
551 | /* Single-step bit. */ | |
552 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
553 | 0x80000000 : 0; | |
554 | else if (addr == (addr_t) &dummy32->starting_addr) | |
555 | /* Start address of the user specified per set. */ | |
556 | return (__u32) child->thread.per_user.start; | |
557 | else if (addr == (addr_t) &dummy32->ending_addr) | |
558 | /* End address of the user specified per set. */ | |
559 | return (__u32) child->thread.per_user.end; | |
560 | else if (addr == (addr_t) &dummy32->perc_atmid) | |
561 | /* PER code, ATMID and AI of the last PER trap */ | |
562 | return (__u32) child->thread.per_event.cause << 16; | |
563 | else if (addr == (addr_t) &dummy32->address) | |
564 | /* Address of the last PER trap */ | |
565 | return (__u32) child->thread.per_event.address; | |
566 | else if (addr == (addr_t) &dummy32->access_id) | |
567 | /* Access id of the last PER trap */ | |
568 | return (__u32) child->thread.per_event.paid << 24; | |
569 | return 0; | |
570 | } | |
571 | ||
1da177e4 LT |
572 | /* |
573 | * Same as peek_user but for a 31 bit program. | |
574 | */ | |
63506c41 | 575 | static u32 __peek_user_compat(struct task_struct *child, addr_t addr) |
1da177e4 | 576 | { |
5e9a2692 | 577 | struct compat_user *dummy32 = NULL; |
1da177e4 LT |
578 | addr_t offset; |
579 | __u32 tmp; | |
580 | ||
1da177e4 | 581 | if (addr < (addr_t) &dummy32->regs.acrs) { |
b50511e4 | 582 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
583 | /* |
584 | * psw and gprs are stored on the stack | |
585 | */ | |
586 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
587 | /* Fake a 31 bit psw mask. */ | |
b50511e4 | 588 | tmp = (__u32)(regs->psw.mask >> 32); |
5ebf250d | 589 | tmp &= PSW32_MASK_USER | PSW32_MASK_RI; |
f26946d7 | 590 | tmp |= PSW32_USER_BITS; |
1da177e4 LT |
591 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
592 | /* Fake a 31 bit psw address. */ | |
d4e81b35 MS |
593 | tmp = (__u32) regs->psw.addr | |
594 | (__u32)(regs->psw.mask & PSW_MASK_BA); | |
1da177e4 LT |
595 | } else { |
596 | /* gpr 0-15 */ | |
b50511e4 | 597 | tmp = *(__u32 *)((addr_t) ®s->psw + addr*2 + 4); |
1da177e4 LT |
598 | } |
599 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
600 | /* | |
601 | * access registers are stored in the thread structure | |
602 | */ | |
603 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
604 | tmp = *(__u32*)((addr_t) &child->thread.acrs + offset); | |
605 | ||
606 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
607 | /* | |
608 | * orig_gpr2 is stored on the kernel stack | |
609 | */ | |
c7584fb6 | 610 | tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4); |
1da177e4 | 611 | |
3d6e48f4 JW |
612 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
613 | /* | |
614 | * prevent reads of padding hole between | |
615 | * orig_gpr2 and fp_regs on s390. | |
616 | */ | |
617 | tmp = 0; | |
618 | ||
86c558e8 MS |
619 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
620 | /* | |
621 | * floating point control reg. is in the thread structure | |
622 | */ | |
904818e2 | 623 | tmp = child->thread.fpu.fpc; |
86c558e8 | 624 | |
1da177e4 LT |
625 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { |
626 | /* | |
904818e2 HB |
627 | * floating point regs. are either in child->thread.fpu |
628 | * or the child->thread.fpu.vxrs array | |
1da177e4 | 629 | */ |
86c558e8 | 630 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; |
b5510d9b | 631 | if (MACHINE_HAS_VX) |
86c558e8 | 632 | tmp = *(__u32 *) |
904818e2 | 633 | ((addr_t) child->thread.fpu.vxrs + 2*offset); |
86c558e8 | 634 | else |
86c558e8 | 635 | tmp = *(__u32 *) |
55a423b6 | 636 | ((addr_t) child->thread.fpu.fprs + offset); |
1da177e4 LT |
637 | |
638 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
639 | /* | |
5e9a2692 | 640 | * Handle access to the per_info structure. |
1da177e4 | 641 | */ |
5e9a2692 MS |
642 | addr -= (addr_t) &dummy32->regs.per_info; |
643 | tmp = __peek_user_per_compat(child, addr); | |
1da177e4 LT |
644 | |
645 | } else | |
646 | tmp = 0; | |
647 | ||
63506c41 MS |
648 | return tmp; |
649 | } | |
650 | ||
651 | static int peek_user_compat(struct task_struct *child, | |
652 | addr_t addr, addr_t data) | |
653 | { | |
654 | __u32 tmp; | |
655 | ||
7757591a | 656 | if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3) |
63506c41 MS |
657 | return -EIO; |
658 | ||
659 | tmp = __peek_user_compat(child, addr); | |
1da177e4 LT |
660 | return put_user(tmp, (__u32 __user *) data); |
661 | } | |
662 | ||
5e9a2692 MS |
663 | /* |
664 | * Same as poke_user_per but for a 31 bit program. | |
665 | */ | |
666 | static inline void __poke_user_per_compat(struct task_struct *child, | |
667 | addr_t addr, __u32 data) | |
668 | { | |
669 | struct compat_per_struct_kernel *dummy32 = NULL; | |
670 | ||
671 | if (addr == (addr_t) &dummy32->cr9) | |
672 | /* PER event mask of the user specified per set. */ | |
673 | child->thread.per_user.control = | |
674 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
675 | else if (addr == (addr_t) &dummy32->starting_addr) | |
676 | /* Starting address of the user specified per set. */ | |
677 | child->thread.per_user.start = data; | |
678 | else if (addr == (addr_t) &dummy32->ending_addr) | |
679 | /* Ending address of the user specified per set. */ | |
680 | child->thread.per_user.end = data; | |
681 | } | |
682 | ||
1da177e4 LT |
683 | /* |
684 | * Same as poke_user but for a 31 bit program. | |
685 | */ | |
63506c41 MS |
686 | static int __poke_user_compat(struct task_struct *child, |
687 | addr_t addr, addr_t data) | |
1da177e4 | 688 | { |
5e9a2692 | 689 | struct compat_user *dummy32 = NULL; |
63506c41 | 690 | __u32 tmp = (__u32) data; |
1da177e4 | 691 | addr_t offset; |
1da177e4 LT |
692 | |
693 | if (addr < (addr_t) &dummy32->regs.acrs) { | |
b50511e4 | 694 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
695 | /* |
696 | * psw, gprs, acrs and orig_gpr2 are stored on the stack | |
697 | */ | |
698 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
5ebf250d HC |
699 | __u32 mask = PSW32_MASK_USER; |
700 | ||
701 | mask |= is_ri_task(child) ? PSW32_MASK_RI : 0; | |
1da177e4 | 702 | /* Build a 64 bit psw mask from 31 bit mask. */ |
dab6cf55 | 703 | if ((tmp ^ PSW32_USER_BITS) & ~mask) |
1da177e4 LT |
704 | /* Invalid psw mask. */ |
705 | return -EINVAL; | |
dab6cf55 MS |
706 | if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME) |
707 | /* Invalid address-space-control bits */ | |
708 | return -EINVAL; | |
b50511e4 | 709 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | |
d4e81b35 | 710 | (regs->psw.mask & PSW_MASK_BA) | |
5ebf250d | 711 | (__u64)(tmp & mask) << 32; |
1da177e4 LT |
712 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
713 | /* Build a 64 bit psw address from 31 bit address. */ | |
b50511e4 | 714 | regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN; |
d4e81b35 MS |
715 | /* Transfer 31 bit amode bit to psw mask. */ |
716 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | | |
717 | (__u64)(tmp & PSW32_ADDR_AMODE); | |
1da177e4 LT |
718 | } else { |
719 | /* gpr 0-15 */ | |
b50511e4 | 720 | *(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp; |
1da177e4 LT |
721 | } |
722 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
723 | /* | |
724 | * access registers are stored in the thread structure | |
725 | */ | |
726 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
727 | *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp; | |
728 | ||
729 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
730 | /* | |
731 | * orig_gpr2 is stored on the kernel stack | |
732 | */ | |
c7584fb6 | 733 | *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp; |
1da177e4 | 734 | |
3d6e48f4 JW |
735 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
736 | /* | |
737 | * prevent writess of padding hole between | |
738 | * orig_gpr2 and fp_regs on s390. | |
739 | */ | |
740 | return 0; | |
741 | ||
86c558e8 | 742 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
1da177e4 | 743 | /* |
86c558e8 | 744 | * floating point control reg. is in the thread structure |
1da177e4 | 745 | */ |
86c558e8 | 746 | if (test_fp_ctl(tmp)) |
1da177e4 | 747 | return -EINVAL; |
904818e2 | 748 | child->thread.fpu.fpc = data; |
86c558e8 MS |
749 | |
750 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { | |
751 | /* | |
904818e2 HB |
752 | * floating point regs. are either in child->thread.fpu |
753 | * or the child->thread.fpu.vxrs array | |
86c558e8 MS |
754 | */ |
755 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; | |
b5510d9b | 756 | if (MACHINE_HAS_VX) |
86c558e8 | 757 | *(__u32 *)((addr_t) |
904818e2 | 758 | child->thread.fpu.vxrs + 2*offset) = tmp; |
86c558e8 | 759 | else |
86c558e8 | 760 | *(__u32 *)((addr_t) |
55a423b6 | 761 | child->thread.fpu.fprs + offset) = tmp; |
1da177e4 LT |
762 | |
763 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
764 | /* | |
5e9a2692 | 765 | * Handle access to the per_info structure. |
1da177e4 | 766 | */ |
5e9a2692 MS |
767 | addr -= (addr_t) &dummy32->regs.per_info; |
768 | __poke_user_per_compat(child, addr, data); | |
1da177e4 LT |
769 | } |
770 | ||
1da177e4 LT |
771 | return 0; |
772 | } | |
773 | ||
63506c41 MS |
774 | static int poke_user_compat(struct task_struct *child, |
775 | addr_t addr, addr_t data) | |
776 | { | |
5e9a2692 MS |
777 | if (!is_compat_task() || (addr & 3) || |
778 | addr > sizeof(struct compat_user) - 3) | |
63506c41 MS |
779 | return -EIO; |
780 | ||
781 | return __poke_user_compat(child, addr, data); | |
782 | } | |
783 | ||
b499d76b RM |
784 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
785 | compat_ulong_t caddr, compat_ulong_t cdata) | |
1da177e4 | 786 | { |
b499d76b RM |
787 | unsigned long addr = caddr; |
788 | unsigned long data = cdata; | |
5e9a2692 | 789 | compat_ptrace_area parea; |
1da177e4 LT |
790 | int copied, ret; |
791 | ||
792 | switch (request) { | |
1da177e4 LT |
793 | case PTRACE_PEEKUSR: |
794 | /* read the word at location addr in the USER area. */ | |
63506c41 | 795 | return peek_user_compat(child, addr, data); |
1da177e4 | 796 | |
1da177e4 LT |
797 | case PTRACE_POKEUSR: |
798 | /* write the word at location addr in the USER area */ | |
63506c41 | 799 | return poke_user_compat(child, addr, data); |
1da177e4 LT |
800 | |
801 | case PTRACE_PEEKUSR_AREA: | |
802 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 803 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
804 | sizeof(parea))) |
805 | return -EFAULT; | |
806 | addr = parea.kernel_addr; | |
807 | data = parea.process_addr; | |
808 | copied = 0; | |
809 | while (copied < parea.len) { | |
810 | if (request == PTRACE_PEEKUSR_AREA) | |
63506c41 | 811 | ret = peek_user_compat(child, addr, data); |
1da177e4 | 812 | else { |
2b67fc46 HC |
813 | __u32 utmp; |
814 | if (get_user(utmp, | |
815 | (__u32 __force __user *) data)) | |
1da177e4 | 816 | return -EFAULT; |
63506c41 | 817 | ret = poke_user_compat(child, addr, utmp); |
1da177e4 LT |
818 | } |
819 | if (ret) | |
820 | return ret; | |
821 | addr += sizeof(unsigned int); | |
822 | data += sizeof(unsigned int); | |
823 | copied += sizeof(unsigned int); | |
824 | } | |
825 | return 0; | |
86f2552b | 826 | case PTRACE_GET_LAST_BREAK: |
ef280c85 | 827 | put_user(child->thread.last_break, |
86f2552b MS |
828 | (unsigned int __user *) data); |
829 | return 0; | |
1da177e4 | 830 | } |
b499d76b | 831 | return compat_ptrace_request(child, request, addr, data); |
1da177e4 LT |
832 | } |
833 | #endif | |
834 | ||
753c4dd6 | 835 | asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) |
1da177e4 | 836 | { |
da7f750c | 837 | unsigned long mask = -1UL; |
1da177e4 | 838 | |
c5c3a6d8 | 839 | /* |
753c4dd6 MS |
840 | * The sysc_tracesys code in entry.S stored the system |
841 | * call number to gprs[2]. | |
c5c3a6d8 | 842 | */ |
753c4dd6 MS |
843 | if (test_thread_flag(TIF_SYSCALL_TRACE) && |
844 | (tracehook_report_syscall_entry(regs) || | |
845 | regs->gprs[2] >= NR_syscalls)) { | |
846 | /* | |
847 | * Tracing decided this syscall should not happen or the | |
848 | * debugger stored an invalid system call number. Skip | |
849 | * the system call and the system call restart handling. | |
850 | */ | |
d3a73acb | 851 | clear_pt_regs_flag(regs, PIF_SYSCALL); |
0208b944 KC |
852 | return -1; |
853 | } | |
854 | ||
855 | /* Do the secure computing check after ptrace. */ | |
856 | if (secure_computing(NULL)) { | |
857 | /* seccomp failures shouldn't expose any additional code. */ | |
858 | return -1; | |
1da177e4 | 859 | } |
753c4dd6 | 860 | |
66700001 | 861 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 862 | trace_sys_enter(regs, regs->gprs[2]); |
9bf1226b | 863 | |
da7f750c PM |
864 | if (is_compat_task()) |
865 | mask = 0xffffffff; | |
866 | ||
867 | audit_syscall_entry(regs->gprs[2], regs->orig_gpr2 & mask, | |
797cee98 LT |
868 | regs->gprs[3] &mask, regs->gprs[4] &mask, |
869 | regs->gprs[5] &mask); | |
0208b944 KC |
870 | |
871 | return regs->gprs[2]; | |
753c4dd6 MS |
872 | } |
873 | ||
874 | asmlinkage void do_syscall_trace_exit(struct pt_regs *regs) | |
875 | { | |
d7e7528b | 876 | audit_syscall_exit(regs); |
753c4dd6 | 877 | |
66700001 | 878 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 879 | trace_sys_exit(regs, regs->gprs[2]); |
9bf1226b | 880 | |
753c4dd6 MS |
881 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
882 | tracehook_report_syscall_exit(regs, 0); | |
1da177e4 | 883 | } |
63506c41 MS |
884 | |
885 | /* | |
886 | * user_regset definitions. | |
887 | */ | |
888 | ||
889 | static int s390_regs_get(struct task_struct *target, | |
890 | const struct user_regset *regset, | |
891 | unsigned int pos, unsigned int count, | |
892 | void *kbuf, void __user *ubuf) | |
893 | { | |
894 | if (target == current) | |
895 | save_access_regs(target->thread.acrs); | |
896 | ||
897 | if (kbuf) { | |
898 | unsigned long *k = kbuf; | |
899 | while (count > 0) { | |
900 | *k++ = __peek_user(target, pos); | |
901 | count -= sizeof(*k); | |
902 | pos += sizeof(*k); | |
903 | } | |
904 | } else { | |
905 | unsigned long __user *u = ubuf; | |
906 | while (count > 0) { | |
907 | if (__put_user(__peek_user(target, pos), u++)) | |
908 | return -EFAULT; | |
909 | count -= sizeof(*u); | |
910 | pos += sizeof(*u); | |
911 | } | |
912 | } | |
913 | return 0; | |
914 | } | |
915 | ||
916 | static int s390_regs_set(struct task_struct *target, | |
917 | const struct user_regset *regset, | |
918 | unsigned int pos, unsigned int count, | |
919 | const void *kbuf, const void __user *ubuf) | |
920 | { | |
921 | int rc = 0; | |
922 | ||
923 | if (target == current) | |
924 | save_access_regs(target->thread.acrs); | |
925 | ||
926 | if (kbuf) { | |
927 | const unsigned long *k = kbuf; | |
928 | while (count > 0 && !rc) { | |
929 | rc = __poke_user(target, pos, *k++); | |
930 | count -= sizeof(*k); | |
931 | pos += sizeof(*k); | |
932 | } | |
933 | } else { | |
934 | const unsigned long __user *u = ubuf; | |
935 | while (count > 0 && !rc) { | |
936 | unsigned long word; | |
937 | rc = __get_user(word, u++); | |
938 | if (rc) | |
939 | break; | |
940 | rc = __poke_user(target, pos, word); | |
941 | count -= sizeof(*u); | |
942 | pos += sizeof(*u); | |
943 | } | |
944 | } | |
945 | ||
946 | if (rc == 0 && target == current) | |
947 | restore_access_regs(target->thread.acrs); | |
948 | ||
949 | return rc; | |
950 | } | |
951 | ||
952 | static int s390_fpregs_get(struct task_struct *target, | |
953 | const struct user_regset *regset, unsigned int pos, | |
954 | unsigned int count, void *kbuf, void __user *ubuf) | |
955 | { | |
904818e2 HB |
956 | _s390_fp_regs fp_regs; |
957 | ||
958 | if (target == current) | |
d0164ee2 | 959 | save_fpu_regs(); |
904818e2 HB |
960 | |
961 | fp_regs.fpc = target->thread.fpu.fpc; | |
962 | fpregs_store(&fp_regs, &target->thread.fpu); | |
63506c41 MS |
963 | |
964 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
904818e2 | 965 | &fp_regs, 0, -1); |
63506c41 MS |
966 | } |
967 | ||
968 | static int s390_fpregs_set(struct task_struct *target, | |
969 | const struct user_regset *regset, unsigned int pos, | |
970 | unsigned int count, const void *kbuf, | |
971 | const void __user *ubuf) | |
972 | { | |
973 | int rc = 0; | |
904818e2 | 974 | freg_t fprs[__NUM_FPRS]; |
63506c41 | 975 | |
904818e2 | 976 | if (target == current) |
d0164ee2 | 977 | save_fpu_regs(); |
63506c41 | 978 | |
9dce990d MS |
979 | if (MACHINE_HAS_VX) |
980 | convert_vx_to_fp(fprs, target->thread.fpu.vxrs); | |
981 | else | |
982 | memcpy(&fprs, target->thread.fpu.fprs, sizeof(fprs)); | |
983 | ||
63506c41 MS |
984 | /* If setting FPC, must validate it first. */ |
985 | if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) { | |
904818e2 | 986 | u32 ufpc[2] = { target->thread.fpu.fpc, 0 }; |
4725c860 | 987 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ufpc, |
63506c41 MS |
988 | 0, offsetof(s390_fp_regs, fprs)); |
989 | if (rc) | |
990 | return rc; | |
4725c860 | 991 | if (ufpc[1] != 0 || test_fp_ctl(ufpc[0])) |
63506c41 | 992 | return -EINVAL; |
904818e2 | 993 | target->thread.fpu.fpc = ufpc[0]; |
63506c41 MS |
994 | } |
995 | ||
996 | if (rc == 0 && count > 0) | |
997 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
904818e2 HB |
998 | fprs, offsetof(s390_fp_regs, fprs), -1); |
999 | if (rc) | |
1000 | return rc; | |
63506c41 | 1001 | |
b5510d9b | 1002 | if (MACHINE_HAS_VX) |
904818e2 HB |
1003 | convert_fp_to_vx(target->thread.fpu.vxrs, fprs); |
1004 | else | |
1005 | memcpy(target->thread.fpu.fprs, &fprs, sizeof(fprs)); | |
1006 | ||
63506c41 MS |
1007 | return rc; |
1008 | } | |
1009 | ||
86f2552b MS |
1010 | static int s390_last_break_get(struct task_struct *target, |
1011 | const struct user_regset *regset, | |
1012 | unsigned int pos, unsigned int count, | |
1013 | void *kbuf, void __user *ubuf) | |
1014 | { | |
1015 | if (count > 0) { | |
1016 | if (kbuf) { | |
1017 | unsigned long *k = kbuf; | |
ef280c85 | 1018 | *k = target->thread.last_break; |
86f2552b MS |
1019 | } else { |
1020 | unsigned long __user *u = ubuf; | |
ef280c85 | 1021 | if (__put_user(target->thread.last_break, u)) |
86f2552b MS |
1022 | return -EFAULT; |
1023 | } | |
1024 | } | |
1025 | return 0; | |
1026 | } | |
1027 | ||
b934069c MS |
1028 | static int s390_last_break_set(struct task_struct *target, |
1029 | const struct user_regset *regset, | |
1030 | unsigned int pos, unsigned int count, | |
1031 | const void *kbuf, const void __user *ubuf) | |
1032 | { | |
1033 | return 0; | |
1034 | } | |
1035 | ||
d35339a4 MS |
1036 | static int s390_tdb_get(struct task_struct *target, |
1037 | const struct user_regset *regset, | |
1038 | unsigned int pos, unsigned int count, | |
1039 | void *kbuf, void __user *ubuf) | |
1040 | { | |
1041 | struct pt_regs *regs = task_pt_regs(target); | |
1042 | unsigned char *data; | |
1043 | ||
1044 | if (!(regs->int_code & 0x200)) | |
1045 | return -ENODATA; | |
1046 | data = target->thread.trap_tdb; | |
1047 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, data, 0, 256); | |
1048 | } | |
1049 | ||
1050 | static int s390_tdb_set(struct task_struct *target, | |
1051 | const struct user_regset *regset, | |
1052 | unsigned int pos, unsigned int count, | |
1053 | const void *kbuf, const void __user *ubuf) | |
1054 | { | |
1055 | return 0; | |
1056 | } | |
1057 | ||
80703617 MS |
1058 | static int s390_vxrs_low_get(struct task_struct *target, |
1059 | const struct user_regset *regset, | |
1060 | unsigned int pos, unsigned int count, | |
1061 | void *kbuf, void __user *ubuf) | |
1062 | { | |
1063 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1064 | int i; | |
1065 | ||
7490daf0 MS |
1066 | if (!MACHINE_HAS_VX) |
1067 | return -ENODEV; | |
b5510d9b HB |
1068 | if (target == current) |
1069 | save_fpu_regs(); | |
1070 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1071 | vxrs[i] = *((__u64 *)(target->thread.fpu.vxrs + i) + 1); | |
80703617 MS |
1072 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); |
1073 | } | |
1074 | ||
1075 | static int s390_vxrs_low_set(struct task_struct *target, | |
1076 | const struct user_regset *regset, | |
1077 | unsigned int pos, unsigned int count, | |
1078 | const void *kbuf, const void __user *ubuf) | |
1079 | { | |
1080 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1081 | int i, rc; | |
1082 | ||
7490daf0 MS |
1083 | if (!MACHINE_HAS_VX) |
1084 | return -ENODEV; | |
b5510d9b | 1085 | if (target == current) |
d0164ee2 | 1086 | save_fpu_regs(); |
80703617 | 1087 | |
9dce990d MS |
1088 | for (i = 0; i < __NUM_VXRS_LOW; i++) |
1089 | vxrs[i] = *((__u64 *)(target->thread.fpu.vxrs + i) + 1); | |
1090 | ||
80703617 | 1091 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); |
9977e886 | 1092 | if (rc == 0) |
80703617 | 1093 | for (i = 0; i < __NUM_VXRS_LOW; i++) |
904818e2 | 1094 | *((__u64 *)(target->thread.fpu.vxrs + i) + 1) = vxrs[i]; |
80703617 MS |
1095 | |
1096 | return rc; | |
1097 | } | |
1098 | ||
1099 | static int s390_vxrs_high_get(struct task_struct *target, | |
1100 | const struct user_regset *regset, | |
1101 | unsigned int pos, unsigned int count, | |
1102 | void *kbuf, void __user *ubuf) | |
1103 | { | |
1104 | __vector128 vxrs[__NUM_VXRS_HIGH]; | |
1105 | ||
7490daf0 MS |
1106 | if (!MACHINE_HAS_VX) |
1107 | return -ENODEV; | |
b5510d9b HB |
1108 | if (target == current) |
1109 | save_fpu_regs(); | |
1110 | memcpy(vxrs, target->thread.fpu.vxrs + __NUM_VXRS_LOW, sizeof(vxrs)); | |
1111 | ||
80703617 MS |
1112 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); |
1113 | } | |
1114 | ||
1115 | static int s390_vxrs_high_set(struct task_struct *target, | |
1116 | const struct user_regset *regset, | |
1117 | unsigned int pos, unsigned int count, | |
1118 | const void *kbuf, const void __user *ubuf) | |
1119 | { | |
1120 | int rc; | |
1121 | ||
7490daf0 MS |
1122 | if (!MACHINE_HAS_VX) |
1123 | return -ENODEV; | |
b5510d9b | 1124 | if (target == current) |
d0164ee2 | 1125 | save_fpu_regs(); |
80703617 MS |
1126 | |
1127 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
904818e2 | 1128 | target->thread.fpu.vxrs + __NUM_VXRS_LOW, 0, -1); |
80703617 MS |
1129 | return rc; |
1130 | } | |
1131 | ||
20b40a79 MS |
1132 | static int s390_system_call_get(struct task_struct *target, |
1133 | const struct user_regset *regset, | |
1134 | unsigned int pos, unsigned int count, | |
1135 | void *kbuf, void __user *ubuf) | |
1136 | { | |
f8fc82b4 | 1137 | unsigned int *data = &target->thread.system_call; |
20b40a79 MS |
1138 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
1139 | data, 0, sizeof(unsigned int)); | |
1140 | } | |
1141 | ||
1142 | static int s390_system_call_set(struct task_struct *target, | |
1143 | const struct user_regset *regset, | |
1144 | unsigned int pos, unsigned int count, | |
1145 | const void *kbuf, const void __user *ubuf) | |
1146 | { | |
f8fc82b4 | 1147 | unsigned int *data = &target->thread.system_call; |
20b40a79 MS |
1148 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
1149 | data, 0, sizeof(unsigned int)); | |
1150 | } | |
1151 | ||
916cda1a MS |
1152 | static int s390_gs_cb_get(struct task_struct *target, |
1153 | const struct user_regset *regset, | |
1154 | unsigned int pos, unsigned int count, | |
1155 | void *kbuf, void __user *ubuf) | |
1156 | { | |
1157 | struct gs_cb *data = target->thread.gs_cb; | |
1158 | ||
1159 | if (!MACHINE_HAS_GS) | |
1160 | return -ENODEV; | |
1161 | if (!data) | |
1162 | return -ENODATA; | |
f5bbd721 MS |
1163 | if (target == current) |
1164 | save_gs_cb(data); | |
916cda1a MS |
1165 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
1166 | data, 0, sizeof(struct gs_cb)); | |
1167 | } | |
1168 | ||
1169 | static int s390_gs_cb_set(struct task_struct *target, | |
1170 | const struct user_regset *regset, | |
1171 | unsigned int pos, unsigned int count, | |
1172 | const void *kbuf, const void __user *ubuf) | |
1173 | { | |
5ef2d523 | 1174 | struct gs_cb gs_cb = { }, *data = NULL; |
f5bbd721 | 1175 | int rc; |
916cda1a | 1176 | |
e525f8a6 MS |
1177 | if (!MACHINE_HAS_GS) |
1178 | return -ENODEV; | |
5ef2d523 | 1179 | if (!target->thread.gs_cb) { |
e525f8a6 MS |
1180 | data = kzalloc(sizeof(*data), GFP_KERNEL); |
1181 | if (!data) | |
1182 | return -ENOMEM; | |
e525f8a6 | 1183 | } |
5ef2d523 HC |
1184 | if (!target->thread.gs_cb) |
1185 | gs_cb.gsd = 25; | |
1186 | else if (target == current) | |
1187 | save_gs_cb(&gs_cb); | |
1188 | else | |
1189 | gs_cb = *target->thread.gs_cb; | |
f5bbd721 | 1190 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
5ef2d523 HC |
1191 | &gs_cb, 0, sizeof(gs_cb)); |
1192 | if (rc) { | |
1193 | kfree(data); | |
1194 | return -EFAULT; | |
1195 | } | |
1196 | preempt_disable(); | |
1197 | if (!target->thread.gs_cb) | |
1198 | target->thread.gs_cb = data; | |
1199 | *target->thread.gs_cb = gs_cb; | |
1200 | if (target == current) { | |
1201 | __ctl_set_bit(2, 4); | |
1202 | restore_gs_cb(target->thread.gs_cb); | |
1203 | } | |
1204 | preempt_enable(); | |
f5bbd721 | 1205 | return rc; |
e525f8a6 MS |
1206 | } |
1207 | ||
1208 | static int s390_gs_bc_get(struct task_struct *target, | |
1209 | const struct user_regset *regset, | |
1210 | unsigned int pos, unsigned int count, | |
1211 | void *kbuf, void __user *ubuf) | |
1212 | { | |
1213 | struct gs_cb *data = target->thread.gs_bc_cb; | |
1214 | ||
916cda1a MS |
1215 | if (!MACHINE_HAS_GS) |
1216 | return -ENODEV; | |
1217 | if (!data) | |
1218 | return -ENODATA; | |
e525f8a6 MS |
1219 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
1220 | data, 0, sizeof(struct gs_cb)); | |
1221 | } | |
1222 | ||
1223 | static int s390_gs_bc_set(struct task_struct *target, | |
1224 | const struct user_regset *regset, | |
1225 | unsigned int pos, unsigned int count, | |
1226 | const void *kbuf, const void __user *ubuf) | |
1227 | { | |
1228 | struct gs_cb *data = target->thread.gs_bc_cb; | |
1229 | ||
1230 | if (!MACHINE_HAS_GS) | |
1231 | return -ENODEV; | |
1232 | if (!data) { | |
1233 | data = kzalloc(sizeof(*data), GFP_KERNEL); | |
1234 | if (!data) | |
1235 | return -ENOMEM; | |
1236 | target->thread.gs_bc_cb = data; | |
1237 | } | |
916cda1a MS |
1238 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
1239 | data, 0, sizeof(struct gs_cb)); | |
1240 | } | |
1241 | ||
63506c41 | 1242 | static const struct user_regset s390_regsets[] = { |
80703617 | 1243 | { |
63506c41 MS |
1244 | .core_note_type = NT_PRSTATUS, |
1245 | .n = sizeof(s390_regs) / sizeof(long), | |
1246 | .size = sizeof(long), | |
1247 | .align = sizeof(long), | |
1248 | .get = s390_regs_get, | |
1249 | .set = s390_regs_set, | |
1250 | }, | |
80703617 | 1251 | { |
63506c41 MS |
1252 | .core_note_type = NT_PRFPREG, |
1253 | .n = sizeof(s390_fp_regs) / sizeof(long), | |
1254 | .size = sizeof(long), | |
1255 | .align = sizeof(long), | |
1256 | .get = s390_fpregs_get, | |
1257 | .set = s390_fpregs_set, | |
1258 | }, | |
80703617 MS |
1259 | { |
1260 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1261 | .n = 1, | |
1262 | .size = sizeof(unsigned int), | |
1263 | .align = sizeof(unsigned int), | |
1264 | .get = s390_system_call_get, | |
1265 | .set = s390_system_call_set, | |
1266 | }, | |
80703617 | 1267 | { |
86f2552b MS |
1268 | .core_note_type = NT_S390_LAST_BREAK, |
1269 | .n = 1, | |
1270 | .size = sizeof(long), | |
1271 | .align = sizeof(long), | |
1272 | .get = s390_last_break_get, | |
b934069c | 1273 | .set = s390_last_break_set, |
86f2552b | 1274 | }, |
80703617 | 1275 | { |
d35339a4 MS |
1276 | .core_note_type = NT_S390_TDB, |
1277 | .n = 1, | |
1278 | .size = 256, | |
1279 | .align = 1, | |
1280 | .get = s390_tdb_get, | |
1281 | .set = s390_tdb_set, | |
1282 | }, | |
80703617 MS |
1283 | { |
1284 | .core_note_type = NT_S390_VXRS_LOW, | |
1285 | .n = __NUM_VXRS_LOW, | |
1286 | .size = sizeof(__u64), | |
1287 | .align = sizeof(__u64), | |
80703617 MS |
1288 | .get = s390_vxrs_low_get, |
1289 | .set = s390_vxrs_low_set, | |
20b40a79 | 1290 | }, |
80703617 MS |
1291 | { |
1292 | .core_note_type = NT_S390_VXRS_HIGH, | |
1293 | .n = __NUM_VXRS_HIGH, | |
1294 | .size = sizeof(__vector128), | |
1295 | .align = sizeof(__vector128), | |
80703617 MS |
1296 | .get = s390_vxrs_high_get, |
1297 | .set = s390_vxrs_high_set, | |
20b40a79 | 1298 | }, |
916cda1a MS |
1299 | { |
1300 | .core_note_type = NT_S390_GS_CB, | |
1301 | .n = sizeof(struct gs_cb) / sizeof(__u64), | |
1302 | .size = sizeof(__u64), | |
1303 | .align = sizeof(__u64), | |
1304 | .get = s390_gs_cb_get, | |
1305 | .set = s390_gs_cb_set, | |
1306 | }, | |
e525f8a6 MS |
1307 | { |
1308 | .core_note_type = NT_S390_GS_BC, | |
1309 | .n = sizeof(struct gs_cb) / sizeof(__u64), | |
1310 | .size = sizeof(__u64), | |
1311 | .align = sizeof(__u64), | |
1312 | .get = s390_gs_bc_get, | |
1313 | .set = s390_gs_bc_set, | |
1314 | }, | |
63506c41 MS |
1315 | }; |
1316 | ||
1317 | static const struct user_regset_view user_s390_view = { | |
1318 | .name = UTS_MACHINE, | |
1319 | .e_machine = EM_S390, | |
1320 | .regsets = s390_regsets, | |
1321 | .n = ARRAY_SIZE(s390_regsets) | |
1322 | }; | |
1323 | ||
1324 | #ifdef CONFIG_COMPAT | |
1325 | static int s390_compat_regs_get(struct task_struct *target, | |
1326 | const struct user_regset *regset, | |
1327 | unsigned int pos, unsigned int count, | |
1328 | void *kbuf, void __user *ubuf) | |
1329 | { | |
1330 | if (target == current) | |
1331 | save_access_regs(target->thread.acrs); | |
1332 | ||
1333 | if (kbuf) { | |
1334 | compat_ulong_t *k = kbuf; | |
1335 | while (count > 0) { | |
1336 | *k++ = __peek_user_compat(target, pos); | |
1337 | count -= sizeof(*k); | |
1338 | pos += sizeof(*k); | |
1339 | } | |
1340 | } else { | |
1341 | compat_ulong_t __user *u = ubuf; | |
1342 | while (count > 0) { | |
1343 | if (__put_user(__peek_user_compat(target, pos), u++)) | |
1344 | return -EFAULT; | |
1345 | count -= sizeof(*u); | |
1346 | pos += sizeof(*u); | |
1347 | } | |
1348 | } | |
1349 | return 0; | |
1350 | } | |
1351 | ||
1352 | static int s390_compat_regs_set(struct task_struct *target, | |
1353 | const struct user_regset *regset, | |
1354 | unsigned int pos, unsigned int count, | |
1355 | const void *kbuf, const void __user *ubuf) | |
1356 | { | |
1357 | int rc = 0; | |
1358 | ||
1359 | if (target == current) | |
1360 | save_access_regs(target->thread.acrs); | |
1361 | ||
1362 | if (kbuf) { | |
1363 | const compat_ulong_t *k = kbuf; | |
1364 | while (count > 0 && !rc) { | |
1365 | rc = __poke_user_compat(target, pos, *k++); | |
1366 | count -= sizeof(*k); | |
1367 | pos += sizeof(*k); | |
1368 | } | |
1369 | } else { | |
1370 | const compat_ulong_t __user *u = ubuf; | |
1371 | while (count > 0 && !rc) { | |
1372 | compat_ulong_t word; | |
1373 | rc = __get_user(word, u++); | |
1374 | if (rc) | |
1375 | break; | |
1376 | rc = __poke_user_compat(target, pos, word); | |
1377 | count -= sizeof(*u); | |
1378 | pos += sizeof(*u); | |
1379 | } | |
1380 | } | |
1381 | ||
1382 | if (rc == 0 && target == current) | |
1383 | restore_access_regs(target->thread.acrs); | |
1384 | ||
1385 | return rc; | |
1386 | } | |
1387 | ||
ea2a4d3a HC |
1388 | static int s390_compat_regs_high_get(struct task_struct *target, |
1389 | const struct user_regset *regset, | |
1390 | unsigned int pos, unsigned int count, | |
1391 | void *kbuf, void __user *ubuf) | |
1392 | { | |
1393 | compat_ulong_t *gprs_high; | |
1394 | ||
1395 | gprs_high = (compat_ulong_t *) | |
1396 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1397 | if (kbuf) { | |
1398 | compat_ulong_t *k = kbuf; | |
1399 | while (count > 0) { | |
1400 | *k++ = *gprs_high; | |
1401 | gprs_high += 2; | |
1402 | count -= sizeof(*k); | |
1403 | } | |
1404 | } else { | |
1405 | compat_ulong_t __user *u = ubuf; | |
1406 | while (count > 0) { | |
1407 | if (__put_user(*gprs_high, u++)) | |
1408 | return -EFAULT; | |
1409 | gprs_high += 2; | |
1410 | count -= sizeof(*u); | |
1411 | } | |
1412 | } | |
1413 | return 0; | |
1414 | } | |
1415 | ||
1416 | static int s390_compat_regs_high_set(struct task_struct *target, | |
1417 | const struct user_regset *regset, | |
1418 | unsigned int pos, unsigned int count, | |
1419 | const void *kbuf, const void __user *ubuf) | |
1420 | { | |
1421 | compat_ulong_t *gprs_high; | |
1422 | int rc = 0; | |
1423 | ||
1424 | gprs_high = (compat_ulong_t *) | |
1425 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1426 | if (kbuf) { | |
1427 | const compat_ulong_t *k = kbuf; | |
1428 | while (count > 0) { | |
1429 | *gprs_high = *k++; | |
1430 | *gprs_high += 2; | |
1431 | count -= sizeof(*k); | |
1432 | } | |
1433 | } else { | |
1434 | const compat_ulong_t __user *u = ubuf; | |
1435 | while (count > 0 && !rc) { | |
1436 | unsigned long word; | |
1437 | rc = __get_user(word, u++); | |
1438 | if (rc) | |
1439 | break; | |
1440 | *gprs_high = word; | |
1441 | *gprs_high += 2; | |
1442 | count -= sizeof(*u); | |
1443 | } | |
1444 | } | |
1445 | ||
1446 | return rc; | |
1447 | } | |
1448 | ||
86f2552b MS |
1449 | static int s390_compat_last_break_get(struct task_struct *target, |
1450 | const struct user_regset *regset, | |
1451 | unsigned int pos, unsigned int count, | |
1452 | void *kbuf, void __user *ubuf) | |
1453 | { | |
1454 | compat_ulong_t last_break; | |
1455 | ||
1456 | if (count > 0) { | |
ef280c85 | 1457 | last_break = target->thread.last_break; |
86f2552b MS |
1458 | if (kbuf) { |
1459 | unsigned long *k = kbuf; | |
1460 | *k = last_break; | |
1461 | } else { | |
1462 | unsigned long __user *u = ubuf; | |
1463 | if (__put_user(last_break, u)) | |
1464 | return -EFAULT; | |
1465 | } | |
1466 | } | |
1467 | return 0; | |
1468 | } | |
1469 | ||
b934069c MS |
1470 | static int s390_compat_last_break_set(struct task_struct *target, |
1471 | const struct user_regset *regset, | |
1472 | unsigned int pos, unsigned int count, | |
1473 | const void *kbuf, const void __user *ubuf) | |
1474 | { | |
1475 | return 0; | |
1476 | } | |
1477 | ||
63506c41 | 1478 | static const struct user_regset s390_compat_regsets[] = { |
80703617 | 1479 | { |
63506c41 MS |
1480 | .core_note_type = NT_PRSTATUS, |
1481 | .n = sizeof(s390_compat_regs) / sizeof(compat_long_t), | |
1482 | .size = sizeof(compat_long_t), | |
1483 | .align = sizeof(compat_long_t), | |
1484 | .get = s390_compat_regs_get, | |
1485 | .set = s390_compat_regs_set, | |
1486 | }, | |
80703617 | 1487 | { |
63506c41 MS |
1488 | .core_note_type = NT_PRFPREG, |
1489 | .n = sizeof(s390_fp_regs) / sizeof(compat_long_t), | |
1490 | .size = sizeof(compat_long_t), | |
1491 | .align = sizeof(compat_long_t), | |
1492 | .get = s390_fpregs_get, | |
1493 | .set = s390_fpregs_set, | |
1494 | }, | |
80703617 MS |
1495 | { |
1496 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1497 | .n = 1, | |
1498 | .size = sizeof(compat_uint_t), | |
1499 | .align = sizeof(compat_uint_t), | |
1500 | .get = s390_system_call_get, | |
1501 | .set = s390_system_call_set, | |
1502 | }, | |
1503 | { | |
86f2552b MS |
1504 | .core_note_type = NT_S390_LAST_BREAK, |
1505 | .n = 1, | |
1506 | .size = sizeof(long), | |
1507 | .align = sizeof(long), | |
1508 | .get = s390_compat_last_break_get, | |
b934069c | 1509 | .set = s390_compat_last_break_set, |
86f2552b | 1510 | }, |
80703617 | 1511 | { |
d35339a4 MS |
1512 | .core_note_type = NT_S390_TDB, |
1513 | .n = 1, | |
1514 | .size = 256, | |
1515 | .align = 1, | |
1516 | .get = s390_tdb_get, | |
1517 | .set = s390_tdb_set, | |
1518 | }, | |
80703617 MS |
1519 | { |
1520 | .core_note_type = NT_S390_VXRS_LOW, | |
1521 | .n = __NUM_VXRS_LOW, | |
1522 | .size = sizeof(__u64), | |
1523 | .align = sizeof(__u64), | |
80703617 MS |
1524 | .get = s390_vxrs_low_get, |
1525 | .set = s390_vxrs_low_set, | |
1526 | }, | |
1527 | { | |
1528 | .core_note_type = NT_S390_VXRS_HIGH, | |
1529 | .n = __NUM_VXRS_HIGH, | |
1530 | .size = sizeof(__vector128), | |
1531 | .align = sizeof(__vector128), | |
80703617 MS |
1532 | .get = s390_vxrs_high_get, |
1533 | .set = s390_vxrs_high_set, | |
20b40a79 | 1534 | }, |
80703617 | 1535 | { |
622e99bf | 1536 | .core_note_type = NT_S390_HIGH_GPRS, |
ea2a4d3a HC |
1537 | .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), |
1538 | .size = sizeof(compat_long_t), | |
1539 | .align = sizeof(compat_long_t), | |
1540 | .get = s390_compat_regs_high_get, | |
1541 | .set = s390_compat_regs_high_set, | |
1542 | }, | |
916cda1a MS |
1543 | { |
1544 | .core_note_type = NT_S390_GS_CB, | |
1545 | .n = sizeof(struct gs_cb) / sizeof(__u64), | |
1546 | .size = sizeof(__u64), | |
1547 | .align = sizeof(__u64), | |
1548 | .get = s390_gs_cb_get, | |
1549 | .set = s390_gs_cb_set, | |
1550 | }, | |
63506c41 MS |
1551 | }; |
1552 | ||
1553 | static const struct user_regset_view user_s390_compat_view = { | |
1554 | .name = "s390", | |
1555 | .e_machine = EM_S390, | |
1556 | .regsets = s390_compat_regsets, | |
1557 | .n = ARRAY_SIZE(s390_compat_regsets) | |
1558 | }; | |
1559 | #endif | |
1560 | ||
1561 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | |
1562 | { | |
1563 | #ifdef CONFIG_COMPAT | |
1564 | if (test_tsk_thread_flag(task, TIF_31BIT)) | |
1565 | return &user_s390_compat_view; | |
1566 | #endif | |
1567 | return &user_s390_view; | |
1568 | } | |
952974ac HC |
1569 | |
1570 | static const char *gpr_names[NUM_GPRS] = { | |
1571 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
1572 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
1573 | }; | |
1574 | ||
1575 | unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset) | |
1576 | { | |
1577 | if (offset >= NUM_GPRS) | |
1578 | return 0; | |
1579 | return regs->gprs[offset]; | |
1580 | } | |
1581 | ||
1582 | int regs_query_register_offset(const char *name) | |
1583 | { | |
1584 | unsigned long offset; | |
1585 | ||
1586 | if (!name || *name != 'r') | |
1587 | return -EINVAL; | |
958d9072 | 1588 | if (kstrtoul(name + 1, 10, &offset)) |
952974ac HC |
1589 | return -EINVAL; |
1590 | if (offset >= NUM_GPRS) | |
1591 | return -EINVAL; | |
1592 | return offset; | |
1593 | } | |
1594 | ||
1595 | const char *regs_query_register_name(unsigned int offset) | |
1596 | { | |
1597 | if (offset >= NUM_GPRS) | |
1598 | return NULL; | |
1599 | return gpr_names[offset]; | |
1600 | } | |
1601 | ||
1602 | static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr) | |
1603 | { | |
1604 | unsigned long ksp = kernel_stack_pointer(regs); | |
1605 | ||
1606 | return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1)); | |
1607 | } | |
1608 | ||
1609 | /** | |
1610 | * regs_get_kernel_stack_nth() - get Nth entry of the stack | |
1611 | * @regs:pt_regs which contains kernel stack pointer. | |
1612 | * @n:stack entry number. | |
1613 | * | |
1614 | * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which | |
1615 | * is specifined by @regs. If the @n th entry is NOT in the kernel stack, | |
1616 | * this returns 0. | |
1617 | */ | |
1618 | unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n) | |
1619 | { | |
1620 | unsigned long addr; | |
1621 | ||
1622 | addr = kernel_stack_pointer(regs) + n * sizeof(long); | |
1623 | if (!regs_within_kernel_stack(regs, addr)) | |
1624 | return 0; | |
1625 | return *(unsigned long *)addr; | |
1626 | } |