Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 | 2 | /* |
5e9a2692 | 3 | * Ptrace user space interface. |
1da177e4 | 4 | * |
a53c8fab | 5 | * Copyright IBM Corp. 1999, 2010 |
5e9a2692 | 6 | * Author(s): Denis Joseph Barrow |
1da177e4 | 7 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
1da177e4 LT |
8 | */ |
9 | ||
10 | #include <linux/kernel.h> | |
11 | #include <linux/sched.h> | |
68db0cf1 | 12 | #include <linux/sched/task_stack.h> |
1da177e4 LT |
13 | #include <linux/mm.h> |
14 | #include <linux/smp.h> | |
1da177e4 LT |
15 | #include <linux/errno.h> |
16 | #include <linux/ptrace.h> | |
17 | #include <linux/user.h> | |
18 | #include <linux/security.h> | |
19 | #include <linux/audit.h> | |
7ed20e1a | 20 | #include <linux/signal.h> |
63506c41 MS |
21 | #include <linux/elf.h> |
22 | #include <linux/regset.h> | |
753c4dd6 | 23 | #include <linux/tracehook.h> |
bcf5cef7 | 24 | #include <linux/seccomp.h> |
048cd4e5 | 25 | #include <linux/compat.h> |
9bf1226b | 26 | #include <trace/syscall.h> |
1da177e4 LT |
27 | #include <asm/segment.h> |
28 | #include <asm/page.h> | |
29 | #include <asm/pgtable.h> | |
30 | #include <asm/pgalloc.h> | |
7c0f6ba6 | 31 | #include <linux/uaccess.h> |
778959db | 32 | #include <asm/unistd.h> |
a0616cde | 33 | #include <asm/switch_to.h> |
a806170e | 34 | #include "entry.h" |
1da177e4 | 35 | |
347a8dc3 | 36 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
37 | #include "compat_ptrace.h" |
38 | #endif | |
39 | ||
1c569f02 JS |
40 | #define CREATE_TRACE_POINTS |
41 | #include <trace/events/syscalls.h> | |
5e9ad7df | 42 | |
64597f9d | 43 | void update_cr_regs(struct task_struct *task) |
1da177e4 | 44 | { |
5e9a2692 MS |
45 | struct pt_regs *regs = task_pt_regs(task); |
46 | struct thread_struct *thread = &task->thread; | |
a45aff52 | 47 | struct per_regs old, new; |
916cda1a MS |
48 | unsigned long cr0_old, cr0_new; |
49 | unsigned long cr2_old, cr2_new; | |
50 | int cr0_changed, cr2_changed; | |
51 | ||
52 | __ctl_store(cr0_old, 0, 0); | |
53 | __ctl_store(cr2_old, 2, 2); | |
54 | cr0_new = cr0_old; | |
55 | cr2_new = cr2_old; | |
d35339a4 | 56 | /* Take care of the enable/disable of transactional execution. */ |
9977e886 | 57 | if (MACHINE_HAS_TE) { |
9977e886 | 58 | /* Set or clear transaction execution TXC bit 8. */ |
916cda1a | 59 | cr0_new |= (1UL << 55); |
9977e886 | 60 | if (task->thread.per_flags & PER_FLAG_NO_TE) |
916cda1a | 61 | cr0_new &= ~(1UL << 55); |
9977e886 | 62 | /* Set or clear transaction execution TDC bits 62 and 63. */ |
916cda1a | 63 | cr2_new &= ~3UL; |
9977e886 HB |
64 | if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) { |
65 | if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND_TEND) | |
916cda1a | 66 | cr2_new |= 1UL; |
9977e886 | 67 | else |
916cda1a | 68 | cr2_new |= 2UL; |
64597f9d | 69 | } |
d35339a4 | 70 | } |
916cda1a MS |
71 | /* Take care of enable/disable of guarded storage. */ |
72 | if (MACHINE_HAS_GS) { | |
73 | cr2_new &= ~(1UL << 4); | |
74 | if (task->thread.gs_cb) | |
75 | cr2_new |= (1UL << 4); | |
76 | } | |
77 | /* Load control register 0/2 iff changed */ | |
78 | cr0_changed = cr0_new != cr0_old; | |
79 | cr2_changed = cr2_new != cr2_old; | |
80 | if (cr0_changed) | |
81 | __ctl_load(cr0_new, 0, 0); | |
82 | if (cr2_changed) | |
83 | __ctl_load(cr2_new, 2, 2); | |
a45aff52 MS |
84 | /* Copy user specified PER registers */ |
85 | new.control = thread->per_user.control; | |
86 | new.start = thread->per_user.start; | |
87 | new.end = thread->per_user.end; | |
88 | ||
89 | /* merge TIF_SINGLE_STEP into user specified PER registers. */ | |
2a0a5b22 JW |
90 | if (test_tsk_thread_flag(task, TIF_SINGLE_STEP) || |
91 | test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) { | |
818a330c MS |
92 | if (test_tsk_thread_flag(task, TIF_BLOCK_STEP)) |
93 | new.control |= PER_EVENT_BRANCH; | |
94 | else | |
95 | new.control |= PER_EVENT_IFETCH; | |
d35339a4 MS |
96 | new.control |= PER_CONTROL_SUSPENSION; |
97 | new.control |= PER_EVENT_TRANSACTION_END; | |
2a0a5b22 JW |
98 | if (test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) |
99 | new.control |= PER_EVENT_IFETCH; | |
a45aff52 | 100 | new.start = 0; |
9cb1ccec | 101 | new.end = -1UL; |
a45aff52 | 102 | } |
5e9a2692 MS |
103 | |
104 | /* Take care of the PER enablement bit in the PSW. */ | |
a45aff52 | 105 | if (!(new.control & PER_EVENT_MASK)) { |
1da177e4 | 106 | regs->psw.mask &= ~PSW_MASK_PER; |
5e9a2692 | 107 | return; |
c3311c13 | 108 | } |
5e9a2692 MS |
109 | regs->psw.mask |= PSW_MASK_PER; |
110 | __ctl_store(old, 9, 11); | |
a45aff52 MS |
111 | if (memcmp(&new, &old, sizeof(struct per_regs)) != 0) |
112 | __ctl_load(new, 9, 11); | |
1da177e4 LT |
113 | } |
114 | ||
0ac30be4 | 115 | void user_enable_single_step(struct task_struct *task) |
1da177e4 | 116 | { |
818a330c | 117 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 118 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
119 | } |
120 | ||
0ac30be4 | 121 | void user_disable_single_step(struct task_struct *task) |
1da177e4 | 122 | { |
818a330c | 123 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 124 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
125 | } |
126 | ||
818a330c MS |
127 | void user_enable_block_step(struct task_struct *task) |
128 | { | |
129 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
130 | set_tsk_thread_flag(task, TIF_BLOCK_STEP); | |
131 | } | |
132 | ||
1da177e4 LT |
133 | /* |
134 | * Called by kernel/ptrace.c when detaching.. | |
135 | * | |
5e9a2692 | 136 | * Clear all debugging related fields. |
1da177e4 | 137 | */ |
5e9a2692 | 138 | void ptrace_disable(struct task_struct *task) |
1da177e4 | 139 | { |
5e9a2692 MS |
140 | memset(&task->thread.per_user, 0, sizeof(task->thread.per_user)); |
141 | memset(&task->thread.per_event, 0, sizeof(task->thread.per_event)); | |
142 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
d3a73acb | 143 | clear_pt_regs_flag(task_pt_regs(task), PIF_PER_TRAP); |
d35339a4 | 144 | task->thread.per_flags = 0; |
1da177e4 LT |
145 | } |
146 | ||
5a79859a | 147 | #define __ADDR_MASK 7 |
1da177e4 | 148 | |
5e9a2692 MS |
149 | static inline unsigned long __peek_user_per(struct task_struct *child, |
150 | addr_t addr) | |
151 | { | |
152 | struct per_struct_kernel *dummy = NULL; | |
153 | ||
154 | if (addr == (addr_t) &dummy->cr9) | |
155 | /* Control bits of the active per set. */ | |
156 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
157 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
158 | else if (addr == (addr_t) &dummy->cr10) | |
159 | /* Start address of the active per set. */ | |
160 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
161 | 0 : child->thread.per_user.start; | |
162 | else if (addr == (addr_t) &dummy->cr11) | |
163 | /* End address of the active per set. */ | |
164 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
9cb1ccec | 165 | -1UL : child->thread.per_user.end; |
5e9a2692 MS |
166 | else if (addr == (addr_t) &dummy->bits) |
167 | /* Single-step bit. */ | |
168 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
169 | (1UL << (BITS_PER_LONG - 1)) : 0; | |
170 | else if (addr == (addr_t) &dummy->starting_addr) | |
171 | /* Start address of the user specified per set. */ | |
172 | return child->thread.per_user.start; | |
173 | else if (addr == (addr_t) &dummy->ending_addr) | |
174 | /* End address of the user specified per set. */ | |
175 | return child->thread.per_user.end; | |
176 | else if (addr == (addr_t) &dummy->perc_atmid) | |
177 | /* PER code, ATMID and AI of the last PER trap */ | |
178 | return (unsigned long) | |
179 | child->thread.per_event.cause << (BITS_PER_LONG - 16); | |
180 | else if (addr == (addr_t) &dummy->address) | |
181 | /* Address of the last PER trap */ | |
182 | return child->thread.per_event.address; | |
183 | else if (addr == (addr_t) &dummy->access_id) | |
184 | /* Access id of the last PER trap */ | |
185 | return (unsigned long) | |
186 | child->thread.per_event.paid << (BITS_PER_LONG - 8); | |
187 | return 0; | |
188 | } | |
189 | ||
1da177e4 LT |
190 | /* |
191 | * Read the word at offset addr from the user area of a process. The | |
192 | * trouble here is that the information is littered over different | |
193 | * locations. The process registers are found on the kernel stack, | |
194 | * the floating point stuff and the trace settings are stored in | |
195 | * the task structure. In addition the different structures in | |
196 | * struct user contain pad bytes that should be read as zeroes. | |
197 | * Lovely... | |
198 | */ | |
63506c41 | 199 | static unsigned long __peek_user(struct task_struct *child, addr_t addr) |
1da177e4 LT |
200 | { |
201 | struct user *dummy = NULL; | |
63506c41 | 202 | addr_t offset, tmp; |
1da177e4 LT |
203 | |
204 | if (addr < (addr_t) &dummy->regs.acrs) { | |
205 | /* | |
206 | * psw and gprs are stored on the stack | |
207 | */ | |
c7584fb6 | 208 | tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr); |
5ebf250d | 209 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
b50511e4 | 210 | /* Return a clean psw mask. */ |
5ebf250d HC |
211 | tmp &= PSW_MASK_USER | PSW_MASK_RI; |
212 | tmp |= PSW_USER_BITS; | |
213 | } | |
1da177e4 LT |
214 | |
215 | } else if (addr < (addr_t) &dummy->regs.orig_gpr2) { | |
216 | /* | |
217 | * access registers are stored in the thread structure | |
218 | */ | |
219 | offset = addr - (addr_t) &dummy->regs.acrs; | |
778959db MS |
220 | /* |
221 | * Very special case: old & broken 64 bit gdb reading | |
222 | * from acrs[15]. Result is a 64 bit value. Read the | |
223 | * 32 bit acrs[15] value and shift it by 32. Sick... | |
224 | */ | |
225 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
226 | tmp = ((unsigned long) child->thread.acrs[15]) << 32; | |
227 | else | |
5a79859a | 228 | tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset); |
1da177e4 LT |
229 | |
230 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
231 | /* | |
232 | * orig_gpr2 is stored on the kernel stack | |
233 | */ | |
c7584fb6 | 234 | tmp = (addr_t) task_pt_regs(child)->orig_gpr2; |
1da177e4 | 235 | |
3d6e48f4 JW |
236 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
237 | /* | |
238 | * prevent reads of padding hole between | |
239 | * orig_gpr2 and fp_regs on s390. | |
240 | */ | |
241 | tmp = 0; | |
242 | ||
86c558e8 MS |
243 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
244 | /* | |
245 | * floating point control reg. is in the thread structure | |
246 | */ | |
904818e2 | 247 | tmp = child->thread.fpu.fpc; |
86c558e8 MS |
248 | tmp <<= BITS_PER_LONG - 32; |
249 | ||
1da177e4 | 250 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
86c558e8 | 251 | /* |
904818e2 HB |
252 | * floating point regs. are either in child->thread.fpu |
253 | * or the child->thread.fpu.vxrs array | |
1da177e4 | 254 | */ |
86c558e8 | 255 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
b5510d9b | 256 | if (MACHINE_HAS_VX) |
86c558e8 | 257 | tmp = *(addr_t *) |
904818e2 | 258 | ((addr_t) child->thread.fpu.vxrs + 2*offset); |
86c558e8 | 259 | else |
86c558e8 | 260 | tmp = *(addr_t *) |
55a423b6 | 261 | ((addr_t) child->thread.fpu.fprs + offset); |
1da177e4 LT |
262 | |
263 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
264 | /* | |
5e9a2692 | 265 | * Handle access to the per_info structure. |
1da177e4 | 266 | */ |
5e9a2692 MS |
267 | addr -= (addr_t) &dummy->regs.per_info; |
268 | tmp = __peek_user_per(child, addr); | |
1da177e4 LT |
269 | |
270 | } else | |
271 | tmp = 0; | |
272 | ||
63506c41 | 273 | return tmp; |
1da177e4 LT |
274 | } |
275 | ||
1da177e4 | 276 | static int |
63506c41 | 277 | peek_user(struct task_struct *child, addr_t addr, addr_t data) |
1da177e4 | 278 | { |
63506c41 | 279 | addr_t tmp, mask; |
1da177e4 LT |
280 | |
281 | /* | |
282 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
63506c41 | 283 | * an alignment of 4. Programmers from hell... |
1da177e4 | 284 | */ |
778959db | 285 | mask = __ADDR_MASK; |
547e3cec MS |
286 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
287 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
778959db | 288 | mask = 3; |
778959db | 289 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) |
1da177e4 LT |
290 | return -EIO; |
291 | ||
63506c41 MS |
292 | tmp = __peek_user(child, addr); |
293 | return put_user(tmp, (addr_t __user *) data); | |
294 | } | |
295 | ||
5e9a2692 MS |
296 | static inline void __poke_user_per(struct task_struct *child, |
297 | addr_t addr, addr_t data) | |
298 | { | |
299 | struct per_struct_kernel *dummy = NULL; | |
300 | ||
301 | /* | |
302 | * There are only three fields in the per_info struct that the | |
303 | * debugger user can write to. | |
304 | * 1) cr9: the debugger wants to set a new PER event mask | |
305 | * 2) starting_addr: the debugger wants to set a new starting | |
306 | * address to use with the PER event mask. | |
307 | * 3) ending_addr: the debugger wants to set a new ending | |
308 | * address to use with the PER event mask. | |
309 | * The user specified PER event mask and the start and end | |
310 | * addresses are used only if single stepping is not in effect. | |
311 | * Writes to any other field in per_info are ignored. | |
312 | */ | |
313 | if (addr == (addr_t) &dummy->cr9) | |
314 | /* PER event mask of the user specified per set. */ | |
315 | child->thread.per_user.control = | |
316 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
317 | else if (addr == (addr_t) &dummy->starting_addr) | |
318 | /* Starting address of the user specified per set. */ | |
319 | child->thread.per_user.start = data; | |
320 | else if (addr == (addr_t) &dummy->ending_addr) | |
321 | /* Ending address of the user specified per set. */ | |
322 | child->thread.per_user.end = data; | |
323 | } | |
324 | ||
63506c41 MS |
325 | /* |
326 | * Write a word to the user area of a process at location addr. This | |
327 | * operation does have an additional problem compared to peek_user. | |
328 | * Stores to the program status word and on the floating point | |
329 | * control register needs to get checked for validity. | |
330 | */ | |
331 | static int __poke_user(struct task_struct *child, addr_t addr, addr_t data) | |
332 | { | |
333 | struct user *dummy = NULL; | |
d4e81b35 | 334 | addr_t offset; |
63506c41 | 335 | |
1da177e4 LT |
336 | if (addr < (addr_t) &dummy->regs.acrs) { |
337 | /* | |
338 | * psw and gprs are stored on the stack | |
339 | */ | |
5ebf250d HC |
340 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
341 | unsigned long mask = PSW_MASK_USER; | |
342 | ||
343 | mask |= is_ri_task(child) ? PSW_MASK_RI : 0; | |
dab6cf55 MS |
344 | if ((data ^ PSW_USER_BITS) & ~mask) |
345 | /* Invalid psw mask. */ | |
346 | return -EINVAL; | |
347 | if ((data & PSW_MASK_ASC) == PSW_ASC_HOME) | |
348 | /* Invalid address-space-control bits */ | |
5ebf250d HC |
349 | return -EINVAL; |
350 | if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)) | |
dab6cf55 | 351 | /* Invalid addressing mode bits */ |
5ebf250d HC |
352 | return -EINVAL; |
353 | } | |
c7584fb6 | 354 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; |
1da177e4 LT |
355 | |
356 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { | |
357 | /* | |
358 | * access registers are stored in the thread structure | |
359 | */ | |
360 | offset = addr - (addr_t) &dummy->regs.acrs; | |
778959db MS |
361 | /* |
362 | * Very special case: old & broken 64 bit gdb writing | |
363 | * to acrs[15] with a 64 bit value. Ignore the lower | |
364 | * half of the value and write the upper 32 bit to | |
365 | * acrs[15]. Sick... | |
366 | */ | |
367 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
368 | child->thread.acrs[15] = (unsigned int) (data >> 32); | |
369 | else | |
5a79859a | 370 | *(addr_t *)((addr_t) &child->thread.acrs + offset) = data; |
1da177e4 LT |
371 | |
372 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
373 | /* | |
374 | * orig_gpr2 is stored on the kernel stack | |
375 | */ | |
c7584fb6 | 376 | task_pt_regs(child)->orig_gpr2 = data; |
1da177e4 | 377 | |
3d6e48f4 JW |
378 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
379 | /* | |
380 | * prevent writes of padding hole between | |
381 | * orig_gpr2 and fp_regs on s390. | |
382 | */ | |
383 | return 0; | |
384 | ||
86c558e8 MS |
385 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
386 | /* | |
387 | * floating point control reg. is in the thread structure | |
388 | */ | |
389 | if ((unsigned int) data != 0 || | |
390 | test_fp_ctl(data >> (BITS_PER_LONG - 32))) | |
391 | return -EINVAL; | |
904818e2 | 392 | child->thread.fpu.fpc = data >> (BITS_PER_LONG - 32); |
86c558e8 | 393 | |
1da177e4 LT |
394 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
395 | /* | |
904818e2 HB |
396 | * floating point regs. are either in child->thread.fpu |
397 | * or the child->thread.fpu.vxrs array | |
1da177e4 | 398 | */ |
86c558e8 | 399 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
b5510d9b | 400 | if (MACHINE_HAS_VX) |
86c558e8 | 401 | *(addr_t *)((addr_t) |
904818e2 | 402 | child->thread.fpu.vxrs + 2*offset) = data; |
86c558e8 | 403 | else |
86c558e8 | 404 | *(addr_t *)((addr_t) |
55a423b6 | 405 | child->thread.fpu.fprs + offset) = data; |
1da177e4 LT |
406 | |
407 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
408 | /* | |
5e9a2692 | 409 | * Handle access to the per_info structure. |
1da177e4 | 410 | */ |
5e9a2692 MS |
411 | addr -= (addr_t) &dummy->regs.per_info; |
412 | __poke_user_per(child, addr, data); | |
1da177e4 LT |
413 | |
414 | } | |
415 | ||
1da177e4 LT |
416 | return 0; |
417 | } | |
418 | ||
5e9a2692 | 419 | static int poke_user(struct task_struct *child, addr_t addr, addr_t data) |
63506c41 | 420 | { |
63506c41 MS |
421 | addr_t mask; |
422 | ||
423 | /* | |
424 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
425 | * an alignment of 4. Programmers from hell indeed... | |
426 | */ | |
427 | mask = __ADDR_MASK; | |
547e3cec MS |
428 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
429 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
63506c41 | 430 | mask = 3; |
63506c41 MS |
431 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) |
432 | return -EIO; | |
433 | ||
434 | return __poke_user(child, addr, data); | |
435 | } | |
436 | ||
9b05a69e NK |
437 | long arch_ptrace(struct task_struct *child, long request, |
438 | unsigned long addr, unsigned long data) | |
1da177e4 | 439 | { |
1da177e4 LT |
440 | ptrace_area parea; |
441 | int copied, ret; | |
442 | ||
443 | switch (request) { | |
1da177e4 LT |
444 | case PTRACE_PEEKUSR: |
445 | /* read the word at location addr in the USER area. */ | |
446 | return peek_user(child, addr, data); | |
447 | ||
1da177e4 LT |
448 | case PTRACE_POKEUSR: |
449 | /* write the word at location addr in the USER area */ | |
450 | return poke_user(child, addr, data); | |
451 | ||
452 | case PTRACE_PEEKUSR_AREA: | |
453 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 454 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
455 | sizeof(parea))) |
456 | return -EFAULT; | |
457 | addr = parea.kernel_addr; | |
458 | data = parea.process_addr; | |
459 | copied = 0; | |
460 | while (copied < parea.len) { | |
461 | if (request == PTRACE_PEEKUSR_AREA) | |
462 | ret = peek_user(child, addr, data); | |
463 | else { | |
2b67fc46 HC |
464 | addr_t utmp; |
465 | if (get_user(utmp, | |
466 | (addr_t __force __user *) data)) | |
1da177e4 | 467 | return -EFAULT; |
2b67fc46 | 468 | ret = poke_user(child, addr, utmp); |
1da177e4 LT |
469 | } |
470 | if (ret) | |
471 | return ret; | |
472 | addr += sizeof(unsigned long); | |
473 | data += sizeof(unsigned long); | |
474 | copied += sizeof(unsigned long); | |
475 | } | |
476 | return 0; | |
86f2552b | 477 | case PTRACE_GET_LAST_BREAK: |
ef280c85 | 478 | put_user(child->thread.last_break, |
86f2552b MS |
479 | (unsigned long __user *) data); |
480 | return 0; | |
d35339a4 MS |
481 | case PTRACE_ENABLE_TE: |
482 | if (!MACHINE_HAS_TE) | |
483 | return -EIO; | |
484 | child->thread.per_flags &= ~PER_FLAG_NO_TE; | |
485 | return 0; | |
486 | case PTRACE_DISABLE_TE: | |
487 | if (!MACHINE_HAS_TE) | |
488 | return -EIO; | |
489 | child->thread.per_flags |= PER_FLAG_NO_TE; | |
64597f9d MM |
490 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; |
491 | return 0; | |
492 | case PTRACE_TE_ABORT_RAND: | |
493 | if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE)) | |
494 | return -EIO; | |
495 | switch (data) { | |
496 | case 0UL: | |
497 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; | |
498 | break; | |
499 | case 1UL: | |
500 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
501 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND; | |
502 | break; | |
503 | case 2UL: | |
504 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
505 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND; | |
506 | break; | |
507 | default: | |
508 | return -EINVAL; | |
509 | } | |
d35339a4 | 510 | return 0; |
07805ac8 | 511 | default: |
07805ac8 | 512 | return ptrace_request(child, request, addr, data); |
1da177e4 | 513 | } |
1da177e4 LT |
514 | } |
515 | ||
347a8dc3 | 516 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
517 | /* |
518 | * Now the fun part starts... a 31 bit program running in the | |
519 | * 31 bit emulation tracing another program. PTRACE_PEEKTEXT, | |
520 | * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy | |
521 | * to handle, the difference to the 64 bit versions of the requests | |
522 | * is that the access is done in multiples of 4 byte instead of | |
523 | * 8 bytes (sizeof(unsigned long) on 31/64 bit). | |
524 | * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA, | |
525 | * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program | |
526 | * is a 31 bit program too, the content of struct user can be | |
527 | * emulated. A 31 bit program peeking into the struct user of | |
528 | * a 64 bit program is a no-no. | |
529 | */ | |
530 | ||
5e9a2692 MS |
531 | /* |
532 | * Same as peek_user_per but for a 31 bit program. | |
533 | */ | |
534 | static inline __u32 __peek_user_per_compat(struct task_struct *child, | |
535 | addr_t addr) | |
536 | { | |
537 | struct compat_per_struct_kernel *dummy32 = NULL; | |
538 | ||
539 | if (addr == (addr_t) &dummy32->cr9) | |
540 | /* Control bits of the active per set. */ | |
541 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
542 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
543 | else if (addr == (addr_t) &dummy32->cr10) | |
544 | /* Start address of the active per set. */ | |
545 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
546 | 0 : child->thread.per_user.start; | |
547 | else if (addr == (addr_t) &dummy32->cr11) | |
548 | /* End address of the active per set. */ | |
549 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
550 | PSW32_ADDR_INSN : child->thread.per_user.end; | |
551 | else if (addr == (addr_t) &dummy32->bits) | |
552 | /* Single-step bit. */ | |
553 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
554 | 0x80000000 : 0; | |
555 | else if (addr == (addr_t) &dummy32->starting_addr) | |
556 | /* Start address of the user specified per set. */ | |
557 | return (__u32) child->thread.per_user.start; | |
558 | else if (addr == (addr_t) &dummy32->ending_addr) | |
559 | /* End address of the user specified per set. */ | |
560 | return (__u32) child->thread.per_user.end; | |
561 | else if (addr == (addr_t) &dummy32->perc_atmid) | |
562 | /* PER code, ATMID and AI of the last PER trap */ | |
563 | return (__u32) child->thread.per_event.cause << 16; | |
564 | else if (addr == (addr_t) &dummy32->address) | |
565 | /* Address of the last PER trap */ | |
566 | return (__u32) child->thread.per_event.address; | |
567 | else if (addr == (addr_t) &dummy32->access_id) | |
568 | /* Access id of the last PER trap */ | |
569 | return (__u32) child->thread.per_event.paid << 24; | |
570 | return 0; | |
571 | } | |
572 | ||
1da177e4 LT |
573 | /* |
574 | * Same as peek_user but for a 31 bit program. | |
575 | */ | |
63506c41 | 576 | static u32 __peek_user_compat(struct task_struct *child, addr_t addr) |
1da177e4 | 577 | { |
5e9a2692 | 578 | struct compat_user *dummy32 = NULL; |
1da177e4 LT |
579 | addr_t offset; |
580 | __u32 tmp; | |
581 | ||
1da177e4 | 582 | if (addr < (addr_t) &dummy32->regs.acrs) { |
b50511e4 | 583 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
584 | /* |
585 | * psw and gprs are stored on the stack | |
586 | */ | |
587 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
588 | /* Fake a 31 bit psw mask. */ | |
b50511e4 | 589 | tmp = (__u32)(regs->psw.mask >> 32); |
5ebf250d | 590 | tmp &= PSW32_MASK_USER | PSW32_MASK_RI; |
f26946d7 | 591 | tmp |= PSW32_USER_BITS; |
1da177e4 LT |
592 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
593 | /* Fake a 31 bit psw address. */ | |
d4e81b35 MS |
594 | tmp = (__u32) regs->psw.addr | |
595 | (__u32)(regs->psw.mask & PSW_MASK_BA); | |
1da177e4 LT |
596 | } else { |
597 | /* gpr 0-15 */ | |
b50511e4 | 598 | tmp = *(__u32 *)((addr_t) ®s->psw + addr*2 + 4); |
1da177e4 LT |
599 | } |
600 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
601 | /* | |
602 | * access registers are stored in the thread structure | |
603 | */ | |
604 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
605 | tmp = *(__u32*)((addr_t) &child->thread.acrs + offset); | |
606 | ||
607 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
608 | /* | |
609 | * orig_gpr2 is stored on the kernel stack | |
610 | */ | |
c7584fb6 | 611 | tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4); |
1da177e4 | 612 | |
3d6e48f4 JW |
613 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
614 | /* | |
615 | * prevent reads of padding hole between | |
616 | * orig_gpr2 and fp_regs on s390. | |
617 | */ | |
618 | tmp = 0; | |
619 | ||
86c558e8 MS |
620 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
621 | /* | |
622 | * floating point control reg. is in the thread structure | |
623 | */ | |
904818e2 | 624 | tmp = child->thread.fpu.fpc; |
86c558e8 | 625 | |
1da177e4 LT |
626 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { |
627 | /* | |
904818e2 HB |
628 | * floating point regs. are either in child->thread.fpu |
629 | * or the child->thread.fpu.vxrs array | |
1da177e4 | 630 | */ |
86c558e8 | 631 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; |
b5510d9b | 632 | if (MACHINE_HAS_VX) |
86c558e8 | 633 | tmp = *(__u32 *) |
904818e2 | 634 | ((addr_t) child->thread.fpu.vxrs + 2*offset); |
86c558e8 | 635 | else |
86c558e8 | 636 | tmp = *(__u32 *) |
55a423b6 | 637 | ((addr_t) child->thread.fpu.fprs + offset); |
1da177e4 LT |
638 | |
639 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
640 | /* | |
5e9a2692 | 641 | * Handle access to the per_info structure. |
1da177e4 | 642 | */ |
5e9a2692 MS |
643 | addr -= (addr_t) &dummy32->regs.per_info; |
644 | tmp = __peek_user_per_compat(child, addr); | |
1da177e4 LT |
645 | |
646 | } else | |
647 | tmp = 0; | |
648 | ||
63506c41 MS |
649 | return tmp; |
650 | } | |
651 | ||
652 | static int peek_user_compat(struct task_struct *child, | |
653 | addr_t addr, addr_t data) | |
654 | { | |
655 | __u32 tmp; | |
656 | ||
7757591a | 657 | if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3) |
63506c41 MS |
658 | return -EIO; |
659 | ||
660 | tmp = __peek_user_compat(child, addr); | |
1da177e4 LT |
661 | return put_user(tmp, (__u32 __user *) data); |
662 | } | |
663 | ||
5e9a2692 MS |
664 | /* |
665 | * Same as poke_user_per but for a 31 bit program. | |
666 | */ | |
667 | static inline void __poke_user_per_compat(struct task_struct *child, | |
668 | addr_t addr, __u32 data) | |
669 | { | |
670 | struct compat_per_struct_kernel *dummy32 = NULL; | |
671 | ||
672 | if (addr == (addr_t) &dummy32->cr9) | |
673 | /* PER event mask of the user specified per set. */ | |
674 | child->thread.per_user.control = | |
675 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
676 | else if (addr == (addr_t) &dummy32->starting_addr) | |
677 | /* Starting address of the user specified per set. */ | |
678 | child->thread.per_user.start = data; | |
679 | else if (addr == (addr_t) &dummy32->ending_addr) | |
680 | /* Ending address of the user specified per set. */ | |
681 | child->thread.per_user.end = data; | |
682 | } | |
683 | ||
1da177e4 LT |
684 | /* |
685 | * Same as poke_user but for a 31 bit program. | |
686 | */ | |
63506c41 MS |
687 | static int __poke_user_compat(struct task_struct *child, |
688 | addr_t addr, addr_t data) | |
1da177e4 | 689 | { |
5e9a2692 | 690 | struct compat_user *dummy32 = NULL; |
63506c41 | 691 | __u32 tmp = (__u32) data; |
1da177e4 | 692 | addr_t offset; |
1da177e4 LT |
693 | |
694 | if (addr < (addr_t) &dummy32->regs.acrs) { | |
b50511e4 | 695 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
696 | /* |
697 | * psw, gprs, acrs and orig_gpr2 are stored on the stack | |
698 | */ | |
699 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
5ebf250d HC |
700 | __u32 mask = PSW32_MASK_USER; |
701 | ||
702 | mask |= is_ri_task(child) ? PSW32_MASK_RI : 0; | |
1da177e4 | 703 | /* Build a 64 bit psw mask from 31 bit mask. */ |
dab6cf55 | 704 | if ((tmp ^ PSW32_USER_BITS) & ~mask) |
1da177e4 LT |
705 | /* Invalid psw mask. */ |
706 | return -EINVAL; | |
dab6cf55 MS |
707 | if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME) |
708 | /* Invalid address-space-control bits */ | |
709 | return -EINVAL; | |
b50511e4 | 710 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | |
d4e81b35 | 711 | (regs->psw.mask & PSW_MASK_BA) | |
5ebf250d | 712 | (__u64)(tmp & mask) << 32; |
1da177e4 LT |
713 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
714 | /* Build a 64 bit psw address from 31 bit address. */ | |
b50511e4 | 715 | regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN; |
d4e81b35 MS |
716 | /* Transfer 31 bit amode bit to psw mask. */ |
717 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | | |
718 | (__u64)(tmp & PSW32_ADDR_AMODE); | |
1da177e4 LT |
719 | } else { |
720 | /* gpr 0-15 */ | |
b50511e4 | 721 | *(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp; |
1da177e4 LT |
722 | } |
723 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
724 | /* | |
725 | * access registers are stored in the thread structure | |
726 | */ | |
727 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
728 | *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp; | |
729 | ||
730 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
731 | /* | |
732 | * orig_gpr2 is stored on the kernel stack | |
733 | */ | |
c7584fb6 | 734 | *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp; |
1da177e4 | 735 | |
3d6e48f4 JW |
736 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
737 | /* | |
738 | * prevent writess of padding hole between | |
739 | * orig_gpr2 and fp_regs on s390. | |
740 | */ | |
741 | return 0; | |
742 | ||
86c558e8 | 743 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
1da177e4 | 744 | /* |
86c558e8 | 745 | * floating point control reg. is in the thread structure |
1da177e4 | 746 | */ |
86c558e8 | 747 | if (test_fp_ctl(tmp)) |
1da177e4 | 748 | return -EINVAL; |
904818e2 | 749 | child->thread.fpu.fpc = data; |
86c558e8 MS |
750 | |
751 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { | |
752 | /* | |
904818e2 HB |
753 | * floating point regs. are either in child->thread.fpu |
754 | * or the child->thread.fpu.vxrs array | |
86c558e8 MS |
755 | */ |
756 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; | |
b5510d9b | 757 | if (MACHINE_HAS_VX) |
86c558e8 | 758 | *(__u32 *)((addr_t) |
904818e2 | 759 | child->thread.fpu.vxrs + 2*offset) = tmp; |
86c558e8 | 760 | else |
86c558e8 | 761 | *(__u32 *)((addr_t) |
55a423b6 | 762 | child->thread.fpu.fprs + offset) = tmp; |
1da177e4 LT |
763 | |
764 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
765 | /* | |
5e9a2692 | 766 | * Handle access to the per_info structure. |
1da177e4 | 767 | */ |
5e9a2692 MS |
768 | addr -= (addr_t) &dummy32->regs.per_info; |
769 | __poke_user_per_compat(child, addr, data); | |
1da177e4 LT |
770 | } |
771 | ||
1da177e4 LT |
772 | return 0; |
773 | } | |
774 | ||
63506c41 MS |
775 | static int poke_user_compat(struct task_struct *child, |
776 | addr_t addr, addr_t data) | |
777 | { | |
5e9a2692 MS |
778 | if (!is_compat_task() || (addr & 3) || |
779 | addr > sizeof(struct compat_user) - 3) | |
63506c41 MS |
780 | return -EIO; |
781 | ||
782 | return __poke_user_compat(child, addr, data); | |
783 | } | |
784 | ||
b499d76b RM |
785 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
786 | compat_ulong_t caddr, compat_ulong_t cdata) | |
1da177e4 | 787 | { |
b499d76b RM |
788 | unsigned long addr = caddr; |
789 | unsigned long data = cdata; | |
5e9a2692 | 790 | compat_ptrace_area parea; |
1da177e4 LT |
791 | int copied, ret; |
792 | ||
793 | switch (request) { | |
1da177e4 LT |
794 | case PTRACE_PEEKUSR: |
795 | /* read the word at location addr in the USER area. */ | |
63506c41 | 796 | return peek_user_compat(child, addr, data); |
1da177e4 | 797 | |
1da177e4 LT |
798 | case PTRACE_POKEUSR: |
799 | /* write the word at location addr in the USER area */ | |
63506c41 | 800 | return poke_user_compat(child, addr, data); |
1da177e4 LT |
801 | |
802 | case PTRACE_PEEKUSR_AREA: | |
803 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 804 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
805 | sizeof(parea))) |
806 | return -EFAULT; | |
807 | addr = parea.kernel_addr; | |
808 | data = parea.process_addr; | |
809 | copied = 0; | |
810 | while (copied < parea.len) { | |
811 | if (request == PTRACE_PEEKUSR_AREA) | |
63506c41 | 812 | ret = peek_user_compat(child, addr, data); |
1da177e4 | 813 | else { |
2b67fc46 HC |
814 | __u32 utmp; |
815 | if (get_user(utmp, | |
816 | (__u32 __force __user *) data)) | |
1da177e4 | 817 | return -EFAULT; |
63506c41 | 818 | ret = poke_user_compat(child, addr, utmp); |
1da177e4 LT |
819 | } |
820 | if (ret) | |
821 | return ret; | |
822 | addr += sizeof(unsigned int); | |
823 | data += sizeof(unsigned int); | |
824 | copied += sizeof(unsigned int); | |
825 | } | |
826 | return 0; | |
86f2552b | 827 | case PTRACE_GET_LAST_BREAK: |
ef280c85 | 828 | put_user(child->thread.last_break, |
86f2552b MS |
829 | (unsigned int __user *) data); |
830 | return 0; | |
1da177e4 | 831 | } |
b499d76b | 832 | return compat_ptrace_request(child, request, addr, data); |
1da177e4 LT |
833 | } |
834 | #endif | |
835 | ||
753c4dd6 | 836 | asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) |
1da177e4 | 837 | { |
da7f750c | 838 | unsigned long mask = -1UL; |
1da177e4 | 839 | |
c5c3a6d8 | 840 | /* |
753c4dd6 MS |
841 | * The sysc_tracesys code in entry.S stored the system |
842 | * call number to gprs[2]. | |
c5c3a6d8 | 843 | */ |
753c4dd6 MS |
844 | if (test_thread_flag(TIF_SYSCALL_TRACE) && |
845 | (tracehook_report_syscall_entry(regs) || | |
846 | regs->gprs[2] >= NR_syscalls)) { | |
847 | /* | |
848 | * Tracing decided this syscall should not happen or the | |
849 | * debugger stored an invalid system call number. Skip | |
850 | * the system call and the system call restart handling. | |
851 | */ | |
d3a73acb | 852 | clear_pt_regs_flag(regs, PIF_SYSCALL); |
0208b944 KC |
853 | return -1; |
854 | } | |
855 | ||
856 | /* Do the secure computing check after ptrace. */ | |
857 | if (secure_computing(NULL)) { | |
858 | /* seccomp failures shouldn't expose any additional code. */ | |
859 | return -1; | |
1da177e4 | 860 | } |
753c4dd6 | 861 | |
66700001 | 862 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 863 | trace_sys_enter(regs, regs->gprs[2]); |
9bf1226b | 864 | |
da7f750c PM |
865 | if (is_compat_task()) |
866 | mask = 0xffffffff; | |
867 | ||
868 | audit_syscall_entry(regs->gprs[2], regs->orig_gpr2 & mask, | |
797cee98 LT |
869 | regs->gprs[3] &mask, regs->gprs[4] &mask, |
870 | regs->gprs[5] &mask); | |
0208b944 KC |
871 | |
872 | return regs->gprs[2]; | |
753c4dd6 MS |
873 | } |
874 | ||
875 | asmlinkage void do_syscall_trace_exit(struct pt_regs *regs) | |
876 | { | |
d7e7528b | 877 | audit_syscall_exit(regs); |
753c4dd6 | 878 | |
66700001 | 879 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 880 | trace_sys_exit(regs, regs->gprs[2]); |
9bf1226b | 881 | |
753c4dd6 MS |
882 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
883 | tracehook_report_syscall_exit(regs, 0); | |
1da177e4 | 884 | } |
63506c41 MS |
885 | |
886 | /* | |
887 | * user_regset definitions. | |
888 | */ | |
889 | ||
890 | static int s390_regs_get(struct task_struct *target, | |
891 | const struct user_regset *regset, | |
892 | unsigned int pos, unsigned int count, | |
893 | void *kbuf, void __user *ubuf) | |
894 | { | |
895 | if (target == current) | |
896 | save_access_regs(target->thread.acrs); | |
897 | ||
898 | if (kbuf) { | |
899 | unsigned long *k = kbuf; | |
900 | while (count > 0) { | |
901 | *k++ = __peek_user(target, pos); | |
902 | count -= sizeof(*k); | |
903 | pos += sizeof(*k); | |
904 | } | |
905 | } else { | |
906 | unsigned long __user *u = ubuf; | |
907 | while (count > 0) { | |
908 | if (__put_user(__peek_user(target, pos), u++)) | |
909 | return -EFAULT; | |
910 | count -= sizeof(*u); | |
911 | pos += sizeof(*u); | |
912 | } | |
913 | } | |
914 | return 0; | |
915 | } | |
916 | ||
917 | static int s390_regs_set(struct task_struct *target, | |
918 | const struct user_regset *regset, | |
919 | unsigned int pos, unsigned int count, | |
920 | const void *kbuf, const void __user *ubuf) | |
921 | { | |
922 | int rc = 0; | |
923 | ||
924 | if (target == current) | |
925 | save_access_regs(target->thread.acrs); | |
926 | ||
927 | if (kbuf) { | |
928 | const unsigned long *k = kbuf; | |
929 | while (count > 0 && !rc) { | |
930 | rc = __poke_user(target, pos, *k++); | |
931 | count -= sizeof(*k); | |
932 | pos += sizeof(*k); | |
933 | } | |
934 | } else { | |
935 | const unsigned long __user *u = ubuf; | |
936 | while (count > 0 && !rc) { | |
937 | unsigned long word; | |
938 | rc = __get_user(word, u++); | |
939 | if (rc) | |
940 | break; | |
941 | rc = __poke_user(target, pos, word); | |
942 | count -= sizeof(*u); | |
943 | pos += sizeof(*u); | |
944 | } | |
945 | } | |
946 | ||
947 | if (rc == 0 && target == current) | |
948 | restore_access_regs(target->thread.acrs); | |
949 | ||
950 | return rc; | |
951 | } | |
952 | ||
953 | static int s390_fpregs_get(struct task_struct *target, | |
954 | const struct user_regset *regset, unsigned int pos, | |
955 | unsigned int count, void *kbuf, void __user *ubuf) | |
956 | { | |
904818e2 HB |
957 | _s390_fp_regs fp_regs; |
958 | ||
959 | if (target == current) | |
d0164ee2 | 960 | save_fpu_regs(); |
904818e2 HB |
961 | |
962 | fp_regs.fpc = target->thread.fpu.fpc; | |
963 | fpregs_store(&fp_regs, &target->thread.fpu); | |
63506c41 MS |
964 | |
965 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
904818e2 | 966 | &fp_regs, 0, -1); |
63506c41 MS |
967 | } |
968 | ||
969 | static int s390_fpregs_set(struct task_struct *target, | |
970 | const struct user_regset *regset, unsigned int pos, | |
971 | unsigned int count, const void *kbuf, | |
972 | const void __user *ubuf) | |
973 | { | |
974 | int rc = 0; | |
904818e2 | 975 | freg_t fprs[__NUM_FPRS]; |
63506c41 | 976 | |
904818e2 | 977 | if (target == current) |
d0164ee2 | 978 | save_fpu_regs(); |
63506c41 | 979 | |
9dce990d MS |
980 | if (MACHINE_HAS_VX) |
981 | convert_vx_to_fp(fprs, target->thread.fpu.vxrs); | |
982 | else | |
983 | memcpy(&fprs, target->thread.fpu.fprs, sizeof(fprs)); | |
984 | ||
63506c41 MS |
985 | /* If setting FPC, must validate it first. */ |
986 | if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) { | |
904818e2 | 987 | u32 ufpc[2] = { target->thread.fpu.fpc, 0 }; |
4725c860 | 988 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ufpc, |
63506c41 MS |
989 | 0, offsetof(s390_fp_regs, fprs)); |
990 | if (rc) | |
991 | return rc; | |
4725c860 | 992 | if (ufpc[1] != 0 || test_fp_ctl(ufpc[0])) |
63506c41 | 993 | return -EINVAL; |
904818e2 | 994 | target->thread.fpu.fpc = ufpc[0]; |
63506c41 MS |
995 | } |
996 | ||
997 | if (rc == 0 && count > 0) | |
998 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
904818e2 HB |
999 | fprs, offsetof(s390_fp_regs, fprs), -1); |
1000 | if (rc) | |
1001 | return rc; | |
63506c41 | 1002 | |
b5510d9b | 1003 | if (MACHINE_HAS_VX) |
904818e2 HB |
1004 | convert_fp_to_vx(target->thread.fpu.vxrs, fprs); |
1005 | else | |
1006 | memcpy(target->thread.fpu.fprs, &fprs, sizeof(fprs)); | |
1007 | ||
63506c41 MS |
1008 | return rc; |
1009 | } | |
1010 | ||
86f2552b MS |
1011 | static int s390_last_break_get(struct task_struct *target, |
1012 | const struct user_regset *regset, | |
1013 | unsigned int pos, unsigned int count, | |
1014 | void *kbuf, void __user *ubuf) | |
1015 | { | |
1016 | if (count > 0) { | |
1017 | if (kbuf) { | |
1018 | unsigned long *k = kbuf; | |
ef280c85 | 1019 | *k = target->thread.last_break; |
86f2552b MS |
1020 | } else { |
1021 | unsigned long __user *u = ubuf; | |
ef280c85 | 1022 | if (__put_user(target->thread.last_break, u)) |
86f2552b MS |
1023 | return -EFAULT; |
1024 | } | |
1025 | } | |
1026 | return 0; | |
1027 | } | |
1028 | ||
b934069c MS |
1029 | static int s390_last_break_set(struct task_struct *target, |
1030 | const struct user_regset *regset, | |
1031 | unsigned int pos, unsigned int count, | |
1032 | const void *kbuf, const void __user *ubuf) | |
1033 | { | |
1034 | return 0; | |
1035 | } | |
1036 | ||
d35339a4 MS |
1037 | static int s390_tdb_get(struct task_struct *target, |
1038 | const struct user_regset *regset, | |
1039 | unsigned int pos, unsigned int count, | |
1040 | void *kbuf, void __user *ubuf) | |
1041 | { | |
1042 | struct pt_regs *regs = task_pt_regs(target); | |
1043 | unsigned char *data; | |
1044 | ||
1045 | if (!(regs->int_code & 0x200)) | |
1046 | return -ENODATA; | |
1047 | data = target->thread.trap_tdb; | |
1048 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, data, 0, 256); | |
1049 | } | |
1050 | ||
1051 | static int s390_tdb_set(struct task_struct *target, | |
1052 | const struct user_regset *regset, | |
1053 | unsigned int pos, unsigned int count, | |
1054 | const void *kbuf, const void __user *ubuf) | |
1055 | { | |
1056 | return 0; | |
1057 | } | |
1058 | ||
80703617 MS |
1059 | static int s390_vxrs_low_get(struct task_struct *target, |
1060 | const struct user_regset *regset, | |
1061 | unsigned int pos, unsigned int count, | |
1062 | void *kbuf, void __user *ubuf) | |
1063 | { | |
1064 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1065 | int i; | |
1066 | ||
7490daf0 MS |
1067 | if (!MACHINE_HAS_VX) |
1068 | return -ENODEV; | |
b5510d9b HB |
1069 | if (target == current) |
1070 | save_fpu_regs(); | |
1071 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1072 | vxrs[i] = *((__u64 *)(target->thread.fpu.vxrs + i) + 1); | |
80703617 MS |
1073 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); |
1074 | } | |
1075 | ||
1076 | static int s390_vxrs_low_set(struct task_struct *target, | |
1077 | const struct user_regset *regset, | |
1078 | unsigned int pos, unsigned int count, | |
1079 | const void *kbuf, const void __user *ubuf) | |
1080 | { | |
1081 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1082 | int i, rc; | |
1083 | ||
7490daf0 MS |
1084 | if (!MACHINE_HAS_VX) |
1085 | return -ENODEV; | |
b5510d9b | 1086 | if (target == current) |
d0164ee2 | 1087 | save_fpu_regs(); |
80703617 | 1088 | |
9dce990d MS |
1089 | for (i = 0; i < __NUM_VXRS_LOW; i++) |
1090 | vxrs[i] = *((__u64 *)(target->thread.fpu.vxrs + i) + 1); | |
1091 | ||
80703617 | 1092 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); |
9977e886 | 1093 | if (rc == 0) |
80703617 | 1094 | for (i = 0; i < __NUM_VXRS_LOW; i++) |
904818e2 | 1095 | *((__u64 *)(target->thread.fpu.vxrs + i) + 1) = vxrs[i]; |
80703617 MS |
1096 | |
1097 | return rc; | |
1098 | } | |
1099 | ||
1100 | static int s390_vxrs_high_get(struct task_struct *target, | |
1101 | const struct user_regset *regset, | |
1102 | unsigned int pos, unsigned int count, | |
1103 | void *kbuf, void __user *ubuf) | |
1104 | { | |
1105 | __vector128 vxrs[__NUM_VXRS_HIGH]; | |
1106 | ||
7490daf0 MS |
1107 | if (!MACHINE_HAS_VX) |
1108 | return -ENODEV; | |
b5510d9b HB |
1109 | if (target == current) |
1110 | save_fpu_regs(); | |
1111 | memcpy(vxrs, target->thread.fpu.vxrs + __NUM_VXRS_LOW, sizeof(vxrs)); | |
1112 | ||
80703617 MS |
1113 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); |
1114 | } | |
1115 | ||
1116 | static int s390_vxrs_high_set(struct task_struct *target, | |
1117 | const struct user_regset *regset, | |
1118 | unsigned int pos, unsigned int count, | |
1119 | const void *kbuf, const void __user *ubuf) | |
1120 | { | |
1121 | int rc; | |
1122 | ||
7490daf0 MS |
1123 | if (!MACHINE_HAS_VX) |
1124 | return -ENODEV; | |
b5510d9b | 1125 | if (target == current) |
d0164ee2 | 1126 | save_fpu_regs(); |
80703617 MS |
1127 | |
1128 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
904818e2 | 1129 | target->thread.fpu.vxrs + __NUM_VXRS_LOW, 0, -1); |
80703617 MS |
1130 | return rc; |
1131 | } | |
1132 | ||
20b40a79 MS |
1133 | static int s390_system_call_get(struct task_struct *target, |
1134 | const struct user_regset *regset, | |
1135 | unsigned int pos, unsigned int count, | |
1136 | void *kbuf, void __user *ubuf) | |
1137 | { | |
f8fc82b4 | 1138 | unsigned int *data = &target->thread.system_call; |
20b40a79 MS |
1139 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
1140 | data, 0, sizeof(unsigned int)); | |
1141 | } | |
1142 | ||
1143 | static int s390_system_call_set(struct task_struct *target, | |
1144 | const struct user_regset *regset, | |
1145 | unsigned int pos, unsigned int count, | |
1146 | const void *kbuf, const void __user *ubuf) | |
1147 | { | |
f8fc82b4 | 1148 | unsigned int *data = &target->thread.system_call; |
20b40a79 MS |
1149 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
1150 | data, 0, sizeof(unsigned int)); | |
1151 | } | |
1152 | ||
916cda1a MS |
1153 | static int s390_gs_cb_get(struct task_struct *target, |
1154 | const struct user_regset *regset, | |
1155 | unsigned int pos, unsigned int count, | |
1156 | void *kbuf, void __user *ubuf) | |
1157 | { | |
1158 | struct gs_cb *data = target->thread.gs_cb; | |
1159 | ||
1160 | if (!MACHINE_HAS_GS) | |
1161 | return -ENODEV; | |
1162 | if (!data) | |
1163 | return -ENODATA; | |
f5bbd721 MS |
1164 | if (target == current) |
1165 | save_gs_cb(data); | |
916cda1a MS |
1166 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
1167 | data, 0, sizeof(struct gs_cb)); | |
1168 | } | |
1169 | ||
1170 | static int s390_gs_cb_set(struct task_struct *target, | |
1171 | const struct user_regset *regset, | |
1172 | unsigned int pos, unsigned int count, | |
1173 | const void *kbuf, const void __user *ubuf) | |
1174 | { | |
1175 | struct gs_cb *data = target->thread.gs_cb; | |
f5bbd721 | 1176 | int rc; |
916cda1a | 1177 | |
e525f8a6 MS |
1178 | if (!MACHINE_HAS_GS) |
1179 | return -ENODEV; | |
1180 | if (!data) { | |
1181 | data = kzalloc(sizeof(*data), GFP_KERNEL); | |
1182 | if (!data) | |
1183 | return -ENOMEM; | |
f5bbd721 | 1184 | data->gsd = 25; |
e525f8a6 | 1185 | target->thread.gs_cb = data; |
f5bbd721 MS |
1186 | if (target == current) |
1187 | __ctl_set_bit(2, 4); | |
1188 | } else if (target == current) { | |
1189 | save_gs_cb(data); | |
e525f8a6 | 1190 | } |
f5bbd721 MS |
1191 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
1192 | data, 0, sizeof(struct gs_cb)); | |
1193 | if (target == current) | |
1194 | restore_gs_cb(data); | |
1195 | return rc; | |
e525f8a6 MS |
1196 | } |
1197 | ||
1198 | static int s390_gs_bc_get(struct task_struct *target, | |
1199 | const struct user_regset *regset, | |
1200 | unsigned int pos, unsigned int count, | |
1201 | void *kbuf, void __user *ubuf) | |
1202 | { | |
1203 | struct gs_cb *data = target->thread.gs_bc_cb; | |
1204 | ||
916cda1a MS |
1205 | if (!MACHINE_HAS_GS) |
1206 | return -ENODEV; | |
1207 | if (!data) | |
1208 | return -ENODATA; | |
e525f8a6 MS |
1209 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
1210 | data, 0, sizeof(struct gs_cb)); | |
1211 | } | |
1212 | ||
1213 | static int s390_gs_bc_set(struct task_struct *target, | |
1214 | const struct user_regset *regset, | |
1215 | unsigned int pos, unsigned int count, | |
1216 | const void *kbuf, const void __user *ubuf) | |
1217 | { | |
1218 | struct gs_cb *data = target->thread.gs_bc_cb; | |
1219 | ||
1220 | if (!MACHINE_HAS_GS) | |
1221 | return -ENODEV; | |
1222 | if (!data) { | |
1223 | data = kzalloc(sizeof(*data), GFP_KERNEL); | |
1224 | if (!data) | |
1225 | return -ENOMEM; | |
1226 | target->thread.gs_bc_cb = data; | |
1227 | } | |
916cda1a MS |
1228 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, |
1229 | data, 0, sizeof(struct gs_cb)); | |
1230 | } | |
1231 | ||
63506c41 | 1232 | static const struct user_regset s390_regsets[] = { |
80703617 | 1233 | { |
63506c41 MS |
1234 | .core_note_type = NT_PRSTATUS, |
1235 | .n = sizeof(s390_regs) / sizeof(long), | |
1236 | .size = sizeof(long), | |
1237 | .align = sizeof(long), | |
1238 | .get = s390_regs_get, | |
1239 | .set = s390_regs_set, | |
1240 | }, | |
80703617 | 1241 | { |
63506c41 MS |
1242 | .core_note_type = NT_PRFPREG, |
1243 | .n = sizeof(s390_fp_regs) / sizeof(long), | |
1244 | .size = sizeof(long), | |
1245 | .align = sizeof(long), | |
1246 | .get = s390_fpregs_get, | |
1247 | .set = s390_fpregs_set, | |
1248 | }, | |
80703617 MS |
1249 | { |
1250 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1251 | .n = 1, | |
1252 | .size = sizeof(unsigned int), | |
1253 | .align = sizeof(unsigned int), | |
1254 | .get = s390_system_call_get, | |
1255 | .set = s390_system_call_set, | |
1256 | }, | |
80703617 | 1257 | { |
86f2552b MS |
1258 | .core_note_type = NT_S390_LAST_BREAK, |
1259 | .n = 1, | |
1260 | .size = sizeof(long), | |
1261 | .align = sizeof(long), | |
1262 | .get = s390_last_break_get, | |
b934069c | 1263 | .set = s390_last_break_set, |
86f2552b | 1264 | }, |
80703617 | 1265 | { |
d35339a4 MS |
1266 | .core_note_type = NT_S390_TDB, |
1267 | .n = 1, | |
1268 | .size = 256, | |
1269 | .align = 1, | |
1270 | .get = s390_tdb_get, | |
1271 | .set = s390_tdb_set, | |
1272 | }, | |
80703617 MS |
1273 | { |
1274 | .core_note_type = NT_S390_VXRS_LOW, | |
1275 | .n = __NUM_VXRS_LOW, | |
1276 | .size = sizeof(__u64), | |
1277 | .align = sizeof(__u64), | |
80703617 MS |
1278 | .get = s390_vxrs_low_get, |
1279 | .set = s390_vxrs_low_set, | |
20b40a79 | 1280 | }, |
80703617 MS |
1281 | { |
1282 | .core_note_type = NT_S390_VXRS_HIGH, | |
1283 | .n = __NUM_VXRS_HIGH, | |
1284 | .size = sizeof(__vector128), | |
1285 | .align = sizeof(__vector128), | |
80703617 MS |
1286 | .get = s390_vxrs_high_get, |
1287 | .set = s390_vxrs_high_set, | |
20b40a79 | 1288 | }, |
916cda1a MS |
1289 | { |
1290 | .core_note_type = NT_S390_GS_CB, | |
1291 | .n = sizeof(struct gs_cb) / sizeof(__u64), | |
1292 | .size = sizeof(__u64), | |
1293 | .align = sizeof(__u64), | |
1294 | .get = s390_gs_cb_get, | |
1295 | .set = s390_gs_cb_set, | |
1296 | }, | |
e525f8a6 MS |
1297 | { |
1298 | .core_note_type = NT_S390_GS_BC, | |
1299 | .n = sizeof(struct gs_cb) / sizeof(__u64), | |
1300 | .size = sizeof(__u64), | |
1301 | .align = sizeof(__u64), | |
1302 | .get = s390_gs_bc_get, | |
1303 | .set = s390_gs_bc_set, | |
1304 | }, | |
63506c41 MS |
1305 | }; |
1306 | ||
1307 | static const struct user_regset_view user_s390_view = { | |
1308 | .name = UTS_MACHINE, | |
1309 | .e_machine = EM_S390, | |
1310 | .regsets = s390_regsets, | |
1311 | .n = ARRAY_SIZE(s390_regsets) | |
1312 | }; | |
1313 | ||
1314 | #ifdef CONFIG_COMPAT | |
1315 | static int s390_compat_regs_get(struct task_struct *target, | |
1316 | const struct user_regset *regset, | |
1317 | unsigned int pos, unsigned int count, | |
1318 | void *kbuf, void __user *ubuf) | |
1319 | { | |
1320 | if (target == current) | |
1321 | save_access_regs(target->thread.acrs); | |
1322 | ||
1323 | if (kbuf) { | |
1324 | compat_ulong_t *k = kbuf; | |
1325 | while (count > 0) { | |
1326 | *k++ = __peek_user_compat(target, pos); | |
1327 | count -= sizeof(*k); | |
1328 | pos += sizeof(*k); | |
1329 | } | |
1330 | } else { | |
1331 | compat_ulong_t __user *u = ubuf; | |
1332 | while (count > 0) { | |
1333 | if (__put_user(__peek_user_compat(target, pos), u++)) | |
1334 | return -EFAULT; | |
1335 | count -= sizeof(*u); | |
1336 | pos += sizeof(*u); | |
1337 | } | |
1338 | } | |
1339 | return 0; | |
1340 | } | |
1341 | ||
1342 | static int s390_compat_regs_set(struct task_struct *target, | |
1343 | const struct user_regset *regset, | |
1344 | unsigned int pos, unsigned int count, | |
1345 | const void *kbuf, const void __user *ubuf) | |
1346 | { | |
1347 | int rc = 0; | |
1348 | ||
1349 | if (target == current) | |
1350 | save_access_regs(target->thread.acrs); | |
1351 | ||
1352 | if (kbuf) { | |
1353 | const compat_ulong_t *k = kbuf; | |
1354 | while (count > 0 && !rc) { | |
1355 | rc = __poke_user_compat(target, pos, *k++); | |
1356 | count -= sizeof(*k); | |
1357 | pos += sizeof(*k); | |
1358 | } | |
1359 | } else { | |
1360 | const compat_ulong_t __user *u = ubuf; | |
1361 | while (count > 0 && !rc) { | |
1362 | compat_ulong_t word; | |
1363 | rc = __get_user(word, u++); | |
1364 | if (rc) | |
1365 | break; | |
1366 | rc = __poke_user_compat(target, pos, word); | |
1367 | count -= sizeof(*u); | |
1368 | pos += sizeof(*u); | |
1369 | } | |
1370 | } | |
1371 | ||
1372 | if (rc == 0 && target == current) | |
1373 | restore_access_regs(target->thread.acrs); | |
1374 | ||
1375 | return rc; | |
1376 | } | |
1377 | ||
ea2a4d3a HC |
1378 | static int s390_compat_regs_high_get(struct task_struct *target, |
1379 | const struct user_regset *regset, | |
1380 | unsigned int pos, unsigned int count, | |
1381 | void *kbuf, void __user *ubuf) | |
1382 | { | |
1383 | compat_ulong_t *gprs_high; | |
1384 | ||
1385 | gprs_high = (compat_ulong_t *) | |
1386 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1387 | if (kbuf) { | |
1388 | compat_ulong_t *k = kbuf; | |
1389 | while (count > 0) { | |
1390 | *k++ = *gprs_high; | |
1391 | gprs_high += 2; | |
1392 | count -= sizeof(*k); | |
1393 | } | |
1394 | } else { | |
1395 | compat_ulong_t __user *u = ubuf; | |
1396 | while (count > 0) { | |
1397 | if (__put_user(*gprs_high, u++)) | |
1398 | return -EFAULT; | |
1399 | gprs_high += 2; | |
1400 | count -= sizeof(*u); | |
1401 | } | |
1402 | } | |
1403 | return 0; | |
1404 | } | |
1405 | ||
1406 | static int s390_compat_regs_high_set(struct task_struct *target, | |
1407 | const struct user_regset *regset, | |
1408 | unsigned int pos, unsigned int count, | |
1409 | const void *kbuf, const void __user *ubuf) | |
1410 | { | |
1411 | compat_ulong_t *gprs_high; | |
1412 | int rc = 0; | |
1413 | ||
1414 | gprs_high = (compat_ulong_t *) | |
1415 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1416 | if (kbuf) { | |
1417 | const compat_ulong_t *k = kbuf; | |
1418 | while (count > 0) { | |
1419 | *gprs_high = *k++; | |
1420 | *gprs_high += 2; | |
1421 | count -= sizeof(*k); | |
1422 | } | |
1423 | } else { | |
1424 | const compat_ulong_t __user *u = ubuf; | |
1425 | while (count > 0 && !rc) { | |
1426 | unsigned long word; | |
1427 | rc = __get_user(word, u++); | |
1428 | if (rc) | |
1429 | break; | |
1430 | *gprs_high = word; | |
1431 | *gprs_high += 2; | |
1432 | count -= sizeof(*u); | |
1433 | } | |
1434 | } | |
1435 | ||
1436 | return rc; | |
1437 | } | |
1438 | ||
86f2552b MS |
1439 | static int s390_compat_last_break_get(struct task_struct *target, |
1440 | const struct user_regset *regset, | |
1441 | unsigned int pos, unsigned int count, | |
1442 | void *kbuf, void __user *ubuf) | |
1443 | { | |
1444 | compat_ulong_t last_break; | |
1445 | ||
1446 | if (count > 0) { | |
ef280c85 | 1447 | last_break = target->thread.last_break; |
86f2552b MS |
1448 | if (kbuf) { |
1449 | unsigned long *k = kbuf; | |
1450 | *k = last_break; | |
1451 | } else { | |
1452 | unsigned long __user *u = ubuf; | |
1453 | if (__put_user(last_break, u)) | |
1454 | return -EFAULT; | |
1455 | } | |
1456 | } | |
1457 | return 0; | |
1458 | } | |
1459 | ||
b934069c MS |
1460 | static int s390_compat_last_break_set(struct task_struct *target, |
1461 | const struct user_regset *regset, | |
1462 | unsigned int pos, unsigned int count, | |
1463 | const void *kbuf, const void __user *ubuf) | |
1464 | { | |
1465 | return 0; | |
1466 | } | |
1467 | ||
63506c41 | 1468 | static const struct user_regset s390_compat_regsets[] = { |
80703617 | 1469 | { |
63506c41 MS |
1470 | .core_note_type = NT_PRSTATUS, |
1471 | .n = sizeof(s390_compat_regs) / sizeof(compat_long_t), | |
1472 | .size = sizeof(compat_long_t), | |
1473 | .align = sizeof(compat_long_t), | |
1474 | .get = s390_compat_regs_get, | |
1475 | .set = s390_compat_regs_set, | |
1476 | }, | |
80703617 | 1477 | { |
63506c41 MS |
1478 | .core_note_type = NT_PRFPREG, |
1479 | .n = sizeof(s390_fp_regs) / sizeof(compat_long_t), | |
1480 | .size = sizeof(compat_long_t), | |
1481 | .align = sizeof(compat_long_t), | |
1482 | .get = s390_fpregs_get, | |
1483 | .set = s390_fpregs_set, | |
1484 | }, | |
80703617 MS |
1485 | { |
1486 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1487 | .n = 1, | |
1488 | .size = sizeof(compat_uint_t), | |
1489 | .align = sizeof(compat_uint_t), | |
1490 | .get = s390_system_call_get, | |
1491 | .set = s390_system_call_set, | |
1492 | }, | |
1493 | { | |
86f2552b MS |
1494 | .core_note_type = NT_S390_LAST_BREAK, |
1495 | .n = 1, | |
1496 | .size = sizeof(long), | |
1497 | .align = sizeof(long), | |
1498 | .get = s390_compat_last_break_get, | |
b934069c | 1499 | .set = s390_compat_last_break_set, |
86f2552b | 1500 | }, |
80703617 | 1501 | { |
d35339a4 MS |
1502 | .core_note_type = NT_S390_TDB, |
1503 | .n = 1, | |
1504 | .size = 256, | |
1505 | .align = 1, | |
1506 | .get = s390_tdb_get, | |
1507 | .set = s390_tdb_set, | |
1508 | }, | |
80703617 MS |
1509 | { |
1510 | .core_note_type = NT_S390_VXRS_LOW, | |
1511 | .n = __NUM_VXRS_LOW, | |
1512 | .size = sizeof(__u64), | |
1513 | .align = sizeof(__u64), | |
80703617 MS |
1514 | .get = s390_vxrs_low_get, |
1515 | .set = s390_vxrs_low_set, | |
1516 | }, | |
1517 | { | |
1518 | .core_note_type = NT_S390_VXRS_HIGH, | |
1519 | .n = __NUM_VXRS_HIGH, | |
1520 | .size = sizeof(__vector128), | |
1521 | .align = sizeof(__vector128), | |
80703617 MS |
1522 | .get = s390_vxrs_high_get, |
1523 | .set = s390_vxrs_high_set, | |
20b40a79 | 1524 | }, |
80703617 | 1525 | { |
622e99bf | 1526 | .core_note_type = NT_S390_HIGH_GPRS, |
ea2a4d3a HC |
1527 | .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), |
1528 | .size = sizeof(compat_long_t), | |
1529 | .align = sizeof(compat_long_t), | |
1530 | .get = s390_compat_regs_high_get, | |
1531 | .set = s390_compat_regs_high_set, | |
1532 | }, | |
916cda1a MS |
1533 | { |
1534 | .core_note_type = NT_S390_GS_CB, | |
1535 | .n = sizeof(struct gs_cb) / sizeof(__u64), | |
1536 | .size = sizeof(__u64), | |
1537 | .align = sizeof(__u64), | |
1538 | .get = s390_gs_cb_get, | |
1539 | .set = s390_gs_cb_set, | |
1540 | }, | |
63506c41 MS |
1541 | }; |
1542 | ||
1543 | static const struct user_regset_view user_s390_compat_view = { | |
1544 | .name = "s390", | |
1545 | .e_machine = EM_S390, | |
1546 | .regsets = s390_compat_regsets, | |
1547 | .n = ARRAY_SIZE(s390_compat_regsets) | |
1548 | }; | |
1549 | #endif | |
1550 | ||
1551 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | |
1552 | { | |
1553 | #ifdef CONFIG_COMPAT | |
1554 | if (test_tsk_thread_flag(task, TIF_31BIT)) | |
1555 | return &user_s390_compat_view; | |
1556 | #endif | |
1557 | return &user_s390_view; | |
1558 | } | |
952974ac HC |
1559 | |
1560 | static const char *gpr_names[NUM_GPRS] = { | |
1561 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
1562 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
1563 | }; | |
1564 | ||
1565 | unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset) | |
1566 | { | |
1567 | if (offset >= NUM_GPRS) | |
1568 | return 0; | |
1569 | return regs->gprs[offset]; | |
1570 | } | |
1571 | ||
1572 | int regs_query_register_offset(const char *name) | |
1573 | { | |
1574 | unsigned long offset; | |
1575 | ||
1576 | if (!name || *name != 'r') | |
1577 | return -EINVAL; | |
958d9072 | 1578 | if (kstrtoul(name + 1, 10, &offset)) |
952974ac HC |
1579 | return -EINVAL; |
1580 | if (offset >= NUM_GPRS) | |
1581 | return -EINVAL; | |
1582 | return offset; | |
1583 | } | |
1584 | ||
1585 | const char *regs_query_register_name(unsigned int offset) | |
1586 | { | |
1587 | if (offset >= NUM_GPRS) | |
1588 | return NULL; | |
1589 | return gpr_names[offset]; | |
1590 | } | |
1591 | ||
1592 | static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr) | |
1593 | { | |
1594 | unsigned long ksp = kernel_stack_pointer(regs); | |
1595 | ||
1596 | return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1)); | |
1597 | } | |
1598 | ||
1599 | /** | |
1600 | * regs_get_kernel_stack_nth() - get Nth entry of the stack | |
1601 | * @regs:pt_regs which contains kernel stack pointer. | |
1602 | * @n:stack entry number. | |
1603 | * | |
1604 | * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which | |
1605 | * is specifined by @regs. If the @n th entry is NOT in the kernel stack, | |
1606 | * this returns 0. | |
1607 | */ | |
1608 | unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n) | |
1609 | { | |
1610 | unsigned long addr; | |
1611 | ||
1612 | addr = kernel_stack_pointer(regs) + n * sizeof(long); | |
1613 | if (!regs_within_kernel_stack(regs, addr)) | |
1614 | return 0; | |
1615 | return *(unsigned long *)addr; | |
1616 | } |