Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
5e9a2692 | 2 | * Ptrace user space interface. |
1da177e4 | 3 | * |
a53c8fab | 4 | * Copyright IBM Corp. 1999, 2010 |
5e9a2692 | 5 | * Author(s): Denis Joseph Barrow |
1da177e4 | 6 | * Martin Schwidefsky (schwidefsky@de.ibm.com) |
1da177e4 LT |
7 | */ |
8 | ||
9 | #include <linux/kernel.h> | |
10 | #include <linux/sched.h> | |
11 | #include <linux/mm.h> | |
12 | #include <linux/smp.h> | |
1da177e4 LT |
13 | #include <linux/errno.h> |
14 | #include <linux/ptrace.h> | |
15 | #include <linux/user.h> | |
16 | #include <linux/security.h> | |
17 | #include <linux/audit.h> | |
7ed20e1a | 18 | #include <linux/signal.h> |
63506c41 MS |
19 | #include <linux/elf.h> |
20 | #include <linux/regset.h> | |
753c4dd6 | 21 | #include <linux/tracehook.h> |
bcf5cef7 | 22 | #include <linux/seccomp.h> |
048cd4e5 | 23 | #include <linux/compat.h> |
9bf1226b | 24 | #include <trace/syscall.h> |
1da177e4 LT |
25 | #include <asm/segment.h> |
26 | #include <asm/page.h> | |
27 | #include <asm/pgtable.h> | |
28 | #include <asm/pgalloc.h> | |
1da177e4 | 29 | #include <asm/uaccess.h> |
778959db | 30 | #include <asm/unistd.h> |
a0616cde | 31 | #include <asm/switch_to.h> |
a806170e | 32 | #include "entry.h" |
1da177e4 | 33 | |
347a8dc3 | 34 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
35 | #include "compat_ptrace.h" |
36 | #endif | |
37 | ||
1c569f02 JS |
38 | #define CREATE_TRACE_POINTS |
39 | #include <trace/events/syscalls.h> | |
5e9ad7df | 40 | |
64597f9d | 41 | void update_cr_regs(struct task_struct *task) |
1da177e4 | 42 | { |
5e9a2692 MS |
43 | struct pt_regs *regs = task_pt_regs(task); |
44 | struct thread_struct *thread = &task->thread; | |
a45aff52 | 45 | struct per_regs old, new; |
5e9a2692 | 46 | |
66389e85 | 47 | #ifdef CONFIG_64BIT |
d35339a4 | 48 | /* Take care of the enable/disable of transactional execution. */ |
80703617 | 49 | if (MACHINE_HAS_TE || MACHINE_HAS_VX) { |
c63badeb | 50 | unsigned long cr, cr_new; |
d35339a4 | 51 | |
c63badeb | 52 | __ctl_store(cr, 0, 0); |
80703617 MS |
53 | cr_new = cr; |
54 | if (MACHINE_HAS_TE) { | |
55 | /* Set or clear transaction execution TXC bit 8. */ | |
56 | cr_new |= (1UL << 55); | |
57 | if (task->thread.per_flags & PER_FLAG_NO_TE) | |
58 | cr_new &= ~(1UL << 55); | |
59 | } | |
60 | if (MACHINE_HAS_VX) { | |
61 | /* Enable/disable of vector extension */ | |
62 | cr_new &= ~(1UL << 17); | |
63 | if (task->thread.vxrs) | |
64 | cr_new |= (1UL << 17); | |
65 | } | |
c63badeb | 66 | if (cr_new != cr) |
a8a934e4 | 67 | __ctl_load(cr_new, 0, 0); |
80703617 MS |
68 | if (MACHINE_HAS_TE) { |
69 | /* Set/clear transaction execution TDC bits 62/63. */ | |
70 | __ctl_store(cr, 2, 2); | |
71 | cr_new = cr & ~3UL; | |
72 | if (task->thread.per_flags & PER_FLAG_TE_ABORT_RAND) { | |
73 | if (task->thread.per_flags & | |
74 | PER_FLAG_TE_ABORT_RAND_TEND) | |
75 | cr_new |= 1UL; | |
76 | else | |
77 | cr_new |= 2UL; | |
78 | } | |
79 | if (cr_new != cr) | |
80 | __ctl_load(cr_new, 2, 2); | |
64597f9d | 81 | } |
d35339a4 | 82 | } |
66389e85 | 83 | #endif |
a45aff52 MS |
84 | /* Copy user specified PER registers */ |
85 | new.control = thread->per_user.control; | |
86 | new.start = thread->per_user.start; | |
87 | new.end = thread->per_user.end; | |
88 | ||
89 | /* merge TIF_SINGLE_STEP into user specified PER registers. */ | |
2a0a5b22 JW |
90 | if (test_tsk_thread_flag(task, TIF_SINGLE_STEP) || |
91 | test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) { | |
818a330c MS |
92 | if (test_tsk_thread_flag(task, TIF_BLOCK_STEP)) |
93 | new.control |= PER_EVENT_BRANCH; | |
94 | else | |
95 | new.control |= PER_EVENT_IFETCH; | |
d35339a4 MS |
96 | #ifdef CONFIG_64BIT |
97 | new.control |= PER_CONTROL_SUSPENSION; | |
98 | new.control |= PER_EVENT_TRANSACTION_END; | |
99 | #endif | |
2a0a5b22 JW |
100 | if (test_tsk_thread_flag(task, TIF_UPROBE_SINGLESTEP)) |
101 | new.control |= PER_EVENT_IFETCH; | |
a45aff52 MS |
102 | new.start = 0; |
103 | new.end = PSW_ADDR_INSN; | |
104 | } | |
5e9a2692 MS |
105 | |
106 | /* Take care of the PER enablement bit in the PSW. */ | |
a45aff52 | 107 | if (!(new.control & PER_EVENT_MASK)) { |
1da177e4 | 108 | regs->psw.mask &= ~PSW_MASK_PER; |
5e9a2692 | 109 | return; |
c3311c13 | 110 | } |
5e9a2692 MS |
111 | regs->psw.mask |= PSW_MASK_PER; |
112 | __ctl_store(old, 9, 11); | |
a45aff52 MS |
113 | if (memcmp(&new, &old, sizeof(struct per_regs)) != 0) |
114 | __ctl_load(new, 9, 11); | |
1da177e4 LT |
115 | } |
116 | ||
0ac30be4 | 117 | void user_enable_single_step(struct task_struct *task) |
1da177e4 | 118 | { |
818a330c | 119 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 120 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
121 | } |
122 | ||
0ac30be4 | 123 | void user_disable_single_step(struct task_struct *task) |
1da177e4 | 124 | { |
818a330c | 125 | clear_tsk_thread_flag(task, TIF_BLOCK_STEP); |
5e9a2692 | 126 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); |
1da177e4 LT |
127 | } |
128 | ||
818a330c MS |
129 | void user_enable_block_step(struct task_struct *task) |
130 | { | |
131 | set_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
132 | set_tsk_thread_flag(task, TIF_BLOCK_STEP); | |
133 | } | |
134 | ||
1da177e4 LT |
135 | /* |
136 | * Called by kernel/ptrace.c when detaching.. | |
137 | * | |
5e9a2692 | 138 | * Clear all debugging related fields. |
1da177e4 | 139 | */ |
5e9a2692 | 140 | void ptrace_disable(struct task_struct *task) |
1da177e4 | 141 | { |
5e9a2692 MS |
142 | memset(&task->thread.per_user, 0, sizeof(task->thread.per_user)); |
143 | memset(&task->thread.per_event, 0, sizeof(task->thread.per_event)); | |
144 | clear_tsk_thread_flag(task, TIF_SINGLE_STEP); | |
d3a73acb | 145 | clear_pt_regs_flag(task_pt_regs(task), PIF_PER_TRAP); |
d35339a4 | 146 | task->thread.per_flags = 0; |
1da177e4 LT |
147 | } |
148 | ||
347a8dc3 | 149 | #ifndef CONFIG_64BIT |
1da177e4 LT |
150 | # define __ADDR_MASK 3 |
151 | #else | |
152 | # define __ADDR_MASK 7 | |
153 | #endif | |
154 | ||
5e9a2692 MS |
155 | static inline unsigned long __peek_user_per(struct task_struct *child, |
156 | addr_t addr) | |
157 | { | |
158 | struct per_struct_kernel *dummy = NULL; | |
159 | ||
160 | if (addr == (addr_t) &dummy->cr9) | |
161 | /* Control bits of the active per set. */ | |
162 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
163 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
164 | else if (addr == (addr_t) &dummy->cr10) | |
165 | /* Start address of the active per set. */ | |
166 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
167 | 0 : child->thread.per_user.start; | |
168 | else if (addr == (addr_t) &dummy->cr11) | |
169 | /* End address of the active per set. */ | |
170 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
171 | PSW_ADDR_INSN : child->thread.per_user.end; | |
172 | else if (addr == (addr_t) &dummy->bits) | |
173 | /* Single-step bit. */ | |
174 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
175 | (1UL << (BITS_PER_LONG - 1)) : 0; | |
176 | else if (addr == (addr_t) &dummy->starting_addr) | |
177 | /* Start address of the user specified per set. */ | |
178 | return child->thread.per_user.start; | |
179 | else if (addr == (addr_t) &dummy->ending_addr) | |
180 | /* End address of the user specified per set. */ | |
181 | return child->thread.per_user.end; | |
182 | else if (addr == (addr_t) &dummy->perc_atmid) | |
183 | /* PER code, ATMID and AI of the last PER trap */ | |
184 | return (unsigned long) | |
185 | child->thread.per_event.cause << (BITS_PER_LONG - 16); | |
186 | else if (addr == (addr_t) &dummy->address) | |
187 | /* Address of the last PER trap */ | |
188 | return child->thread.per_event.address; | |
189 | else if (addr == (addr_t) &dummy->access_id) | |
190 | /* Access id of the last PER trap */ | |
191 | return (unsigned long) | |
192 | child->thread.per_event.paid << (BITS_PER_LONG - 8); | |
193 | return 0; | |
194 | } | |
195 | ||
1da177e4 LT |
196 | /* |
197 | * Read the word at offset addr from the user area of a process. The | |
198 | * trouble here is that the information is littered over different | |
199 | * locations. The process registers are found on the kernel stack, | |
200 | * the floating point stuff and the trace settings are stored in | |
201 | * the task structure. In addition the different structures in | |
202 | * struct user contain pad bytes that should be read as zeroes. | |
203 | * Lovely... | |
204 | */ | |
63506c41 | 205 | static unsigned long __peek_user(struct task_struct *child, addr_t addr) |
1da177e4 LT |
206 | { |
207 | struct user *dummy = NULL; | |
63506c41 | 208 | addr_t offset, tmp; |
1da177e4 LT |
209 | |
210 | if (addr < (addr_t) &dummy->regs.acrs) { | |
211 | /* | |
212 | * psw and gprs are stored on the stack | |
213 | */ | |
c7584fb6 | 214 | tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr); |
5ebf250d | 215 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
b50511e4 | 216 | /* Return a clean psw mask. */ |
5ebf250d HC |
217 | tmp &= PSW_MASK_USER | PSW_MASK_RI; |
218 | tmp |= PSW_USER_BITS; | |
219 | } | |
1da177e4 LT |
220 | |
221 | } else if (addr < (addr_t) &dummy->regs.orig_gpr2) { | |
222 | /* | |
223 | * access registers are stored in the thread structure | |
224 | */ | |
225 | offset = addr - (addr_t) &dummy->regs.acrs; | |
347a8dc3 | 226 | #ifdef CONFIG_64BIT |
778959db MS |
227 | /* |
228 | * Very special case: old & broken 64 bit gdb reading | |
229 | * from acrs[15]. Result is a 64 bit value. Read the | |
230 | * 32 bit acrs[15] value and shift it by 32. Sick... | |
231 | */ | |
232 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
233 | tmp = ((unsigned long) child->thread.acrs[15]) << 32; | |
234 | else | |
235 | #endif | |
1da177e4 LT |
236 | tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset); |
237 | ||
238 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
239 | /* | |
240 | * orig_gpr2 is stored on the kernel stack | |
241 | */ | |
c7584fb6 | 242 | tmp = (addr_t) task_pt_regs(child)->orig_gpr2; |
1da177e4 | 243 | |
3d6e48f4 JW |
244 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
245 | /* | |
246 | * prevent reads of padding hole between | |
247 | * orig_gpr2 and fp_regs on s390. | |
248 | */ | |
249 | tmp = 0; | |
250 | ||
86c558e8 MS |
251 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
252 | /* | |
253 | * floating point control reg. is in the thread structure | |
254 | */ | |
255 | tmp = child->thread.fp_regs.fpc; | |
256 | tmp <<= BITS_PER_LONG - 32; | |
257 | ||
1da177e4 | 258 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
86c558e8 MS |
259 | /* |
260 | * floating point regs. are either in child->thread.fp_regs | |
261 | * or the child->thread.vxrs array | |
1da177e4 | 262 | */ |
86c558e8 MS |
263 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
264 | #ifdef CONFIG_64BIT | |
265 | if (child->thread.vxrs) | |
266 | tmp = *(addr_t *) | |
267 | ((addr_t) child->thread.vxrs + 2*offset); | |
268 | else | |
269 | #endif | |
270 | tmp = *(addr_t *) | |
271 | ((addr_t) &child->thread.fp_regs.fprs + offset); | |
1da177e4 LT |
272 | |
273 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
274 | /* | |
5e9a2692 | 275 | * Handle access to the per_info structure. |
1da177e4 | 276 | */ |
5e9a2692 MS |
277 | addr -= (addr_t) &dummy->regs.per_info; |
278 | tmp = __peek_user_per(child, addr); | |
1da177e4 LT |
279 | |
280 | } else | |
281 | tmp = 0; | |
282 | ||
63506c41 | 283 | return tmp; |
1da177e4 LT |
284 | } |
285 | ||
1da177e4 | 286 | static int |
63506c41 | 287 | peek_user(struct task_struct *child, addr_t addr, addr_t data) |
1da177e4 | 288 | { |
63506c41 | 289 | addr_t tmp, mask; |
1da177e4 LT |
290 | |
291 | /* | |
292 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
63506c41 | 293 | * an alignment of 4. Programmers from hell... |
1da177e4 | 294 | */ |
778959db | 295 | mask = __ADDR_MASK; |
347a8dc3 | 296 | #ifdef CONFIG_64BIT |
547e3cec MS |
297 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
298 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
778959db MS |
299 | mask = 3; |
300 | #endif | |
301 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) | |
1da177e4 LT |
302 | return -EIO; |
303 | ||
63506c41 MS |
304 | tmp = __peek_user(child, addr); |
305 | return put_user(tmp, (addr_t __user *) data); | |
306 | } | |
307 | ||
5e9a2692 MS |
308 | static inline void __poke_user_per(struct task_struct *child, |
309 | addr_t addr, addr_t data) | |
310 | { | |
311 | struct per_struct_kernel *dummy = NULL; | |
312 | ||
313 | /* | |
314 | * There are only three fields in the per_info struct that the | |
315 | * debugger user can write to. | |
316 | * 1) cr9: the debugger wants to set a new PER event mask | |
317 | * 2) starting_addr: the debugger wants to set a new starting | |
318 | * address to use with the PER event mask. | |
319 | * 3) ending_addr: the debugger wants to set a new ending | |
320 | * address to use with the PER event mask. | |
321 | * The user specified PER event mask and the start and end | |
322 | * addresses are used only if single stepping is not in effect. | |
323 | * Writes to any other field in per_info are ignored. | |
324 | */ | |
325 | if (addr == (addr_t) &dummy->cr9) | |
326 | /* PER event mask of the user specified per set. */ | |
327 | child->thread.per_user.control = | |
328 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
329 | else if (addr == (addr_t) &dummy->starting_addr) | |
330 | /* Starting address of the user specified per set. */ | |
331 | child->thread.per_user.start = data; | |
332 | else if (addr == (addr_t) &dummy->ending_addr) | |
333 | /* Ending address of the user specified per set. */ | |
334 | child->thread.per_user.end = data; | |
335 | } | |
336 | ||
63506c41 MS |
337 | /* |
338 | * Write a word to the user area of a process at location addr. This | |
339 | * operation does have an additional problem compared to peek_user. | |
340 | * Stores to the program status word and on the floating point | |
341 | * control register needs to get checked for validity. | |
342 | */ | |
343 | static int __poke_user(struct task_struct *child, addr_t addr, addr_t data) | |
344 | { | |
345 | struct user *dummy = NULL; | |
d4e81b35 | 346 | addr_t offset; |
63506c41 | 347 | |
1da177e4 LT |
348 | if (addr < (addr_t) &dummy->regs.acrs) { |
349 | /* | |
350 | * psw and gprs are stored on the stack | |
351 | */ | |
5ebf250d HC |
352 | if (addr == (addr_t) &dummy->regs.psw.mask) { |
353 | unsigned long mask = PSW_MASK_USER; | |
354 | ||
355 | mask |= is_ri_task(child) ? PSW_MASK_RI : 0; | |
dab6cf55 MS |
356 | if ((data ^ PSW_USER_BITS) & ~mask) |
357 | /* Invalid psw mask. */ | |
358 | return -EINVAL; | |
359 | if ((data & PSW_MASK_ASC) == PSW_ASC_HOME) | |
360 | /* Invalid address-space-control bits */ | |
5ebf250d HC |
361 | return -EINVAL; |
362 | if ((data & PSW_MASK_EA) && !(data & PSW_MASK_BA)) | |
dab6cf55 | 363 | /* Invalid addressing mode bits */ |
5ebf250d HC |
364 | return -EINVAL; |
365 | } | |
c7584fb6 | 366 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; |
1da177e4 LT |
367 | |
368 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { | |
369 | /* | |
370 | * access registers are stored in the thread structure | |
371 | */ | |
372 | offset = addr - (addr_t) &dummy->regs.acrs; | |
347a8dc3 | 373 | #ifdef CONFIG_64BIT |
778959db MS |
374 | /* |
375 | * Very special case: old & broken 64 bit gdb writing | |
376 | * to acrs[15] with a 64 bit value. Ignore the lower | |
377 | * half of the value and write the upper 32 bit to | |
378 | * acrs[15]. Sick... | |
379 | */ | |
380 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
381 | child->thread.acrs[15] = (unsigned int) (data >> 32); | |
382 | else | |
383 | #endif | |
1da177e4 LT |
384 | *(addr_t *)((addr_t) &child->thread.acrs + offset) = data; |
385 | ||
386 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
387 | /* | |
388 | * orig_gpr2 is stored on the kernel stack | |
389 | */ | |
c7584fb6 | 390 | task_pt_regs(child)->orig_gpr2 = data; |
1da177e4 | 391 | |
3d6e48f4 JW |
392 | } else if (addr < (addr_t) &dummy->regs.fp_regs) { |
393 | /* | |
394 | * prevent writes of padding hole between | |
395 | * orig_gpr2 and fp_regs on s390. | |
396 | */ | |
397 | return 0; | |
398 | ||
86c558e8 MS |
399 | } else if (addr == (addr_t) &dummy->regs.fp_regs.fpc) { |
400 | /* | |
401 | * floating point control reg. is in the thread structure | |
402 | */ | |
403 | if ((unsigned int) data != 0 || | |
404 | test_fp_ctl(data >> (BITS_PER_LONG - 32))) | |
405 | return -EINVAL; | |
406 | child->thread.fp_regs.fpc = data >> (BITS_PER_LONG - 32); | |
407 | ||
1da177e4 LT |
408 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { |
409 | /* | |
86c558e8 MS |
410 | * floating point regs. are either in child->thread.fp_regs |
411 | * or the child->thread.vxrs array | |
1da177e4 | 412 | */ |
86c558e8 MS |
413 | offset = addr - (addr_t) &dummy->regs.fp_regs.fprs; |
414 | #ifdef CONFIG_64BIT | |
415 | if (child->thread.vxrs) | |
416 | *(addr_t *)((addr_t) | |
417 | child->thread.vxrs + 2*offset) = data; | |
418 | else | |
419 | #endif | |
420 | *(addr_t *)((addr_t) | |
421 | &child->thread.fp_regs.fprs + offset) = data; | |
1da177e4 LT |
422 | |
423 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
424 | /* | |
5e9a2692 | 425 | * Handle access to the per_info structure. |
1da177e4 | 426 | */ |
5e9a2692 MS |
427 | addr -= (addr_t) &dummy->regs.per_info; |
428 | __poke_user_per(child, addr, data); | |
1da177e4 LT |
429 | |
430 | } | |
431 | ||
1da177e4 LT |
432 | return 0; |
433 | } | |
434 | ||
5e9a2692 | 435 | static int poke_user(struct task_struct *child, addr_t addr, addr_t data) |
63506c41 | 436 | { |
63506c41 MS |
437 | addr_t mask; |
438 | ||
439 | /* | |
440 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
441 | * an alignment of 4. Programmers from hell indeed... | |
442 | */ | |
443 | mask = __ADDR_MASK; | |
444 | #ifdef CONFIG_64BIT | |
547e3cec MS |
445 | if (addr >= (addr_t) &((struct user *) NULL)->regs.acrs && |
446 | addr < (addr_t) &((struct user *) NULL)->regs.orig_gpr2) | |
63506c41 MS |
447 | mask = 3; |
448 | #endif | |
449 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) | |
450 | return -EIO; | |
451 | ||
452 | return __poke_user(child, addr, data); | |
453 | } | |
454 | ||
9b05a69e NK |
455 | long arch_ptrace(struct task_struct *child, long request, |
456 | unsigned long addr, unsigned long data) | |
1da177e4 | 457 | { |
1da177e4 LT |
458 | ptrace_area parea; |
459 | int copied, ret; | |
460 | ||
461 | switch (request) { | |
1da177e4 LT |
462 | case PTRACE_PEEKUSR: |
463 | /* read the word at location addr in the USER area. */ | |
464 | return peek_user(child, addr, data); | |
465 | ||
1da177e4 LT |
466 | case PTRACE_POKEUSR: |
467 | /* write the word at location addr in the USER area */ | |
468 | return poke_user(child, addr, data); | |
469 | ||
470 | case PTRACE_PEEKUSR_AREA: | |
471 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 472 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
473 | sizeof(parea))) |
474 | return -EFAULT; | |
475 | addr = parea.kernel_addr; | |
476 | data = parea.process_addr; | |
477 | copied = 0; | |
478 | while (copied < parea.len) { | |
479 | if (request == PTRACE_PEEKUSR_AREA) | |
480 | ret = peek_user(child, addr, data); | |
481 | else { | |
2b67fc46 HC |
482 | addr_t utmp; |
483 | if (get_user(utmp, | |
484 | (addr_t __force __user *) data)) | |
1da177e4 | 485 | return -EFAULT; |
2b67fc46 | 486 | ret = poke_user(child, addr, utmp); |
1da177e4 LT |
487 | } |
488 | if (ret) | |
489 | return ret; | |
490 | addr += sizeof(unsigned long); | |
491 | data += sizeof(unsigned long); | |
492 | copied += sizeof(unsigned long); | |
493 | } | |
494 | return 0; | |
86f2552b MS |
495 | case PTRACE_GET_LAST_BREAK: |
496 | put_user(task_thread_info(child)->last_break, | |
497 | (unsigned long __user *) data); | |
498 | return 0; | |
d35339a4 MS |
499 | case PTRACE_ENABLE_TE: |
500 | if (!MACHINE_HAS_TE) | |
501 | return -EIO; | |
502 | child->thread.per_flags &= ~PER_FLAG_NO_TE; | |
503 | return 0; | |
504 | case PTRACE_DISABLE_TE: | |
505 | if (!MACHINE_HAS_TE) | |
506 | return -EIO; | |
507 | child->thread.per_flags |= PER_FLAG_NO_TE; | |
64597f9d MM |
508 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; |
509 | return 0; | |
510 | case PTRACE_TE_ABORT_RAND: | |
511 | if (!MACHINE_HAS_TE || (child->thread.per_flags & PER_FLAG_NO_TE)) | |
512 | return -EIO; | |
513 | switch (data) { | |
514 | case 0UL: | |
515 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND; | |
516 | break; | |
517 | case 1UL: | |
518 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
519 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND_TEND; | |
520 | break; | |
521 | case 2UL: | |
522 | child->thread.per_flags |= PER_FLAG_TE_ABORT_RAND; | |
523 | child->thread.per_flags &= ~PER_FLAG_TE_ABORT_RAND_TEND; | |
524 | break; | |
525 | default: | |
526 | return -EINVAL; | |
527 | } | |
d35339a4 | 528 | return 0; |
07805ac8 CB |
529 | default: |
530 | /* Removing high order bit from addr (only for 31 bit). */ | |
531 | addr &= PSW_ADDR_INSN; | |
532 | return ptrace_request(child, request, addr, data); | |
1da177e4 | 533 | } |
1da177e4 LT |
534 | } |
535 | ||
347a8dc3 | 536 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
537 | /* |
538 | * Now the fun part starts... a 31 bit program running in the | |
539 | * 31 bit emulation tracing another program. PTRACE_PEEKTEXT, | |
540 | * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy | |
541 | * to handle, the difference to the 64 bit versions of the requests | |
542 | * is that the access is done in multiples of 4 byte instead of | |
543 | * 8 bytes (sizeof(unsigned long) on 31/64 bit). | |
544 | * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA, | |
545 | * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program | |
546 | * is a 31 bit program too, the content of struct user can be | |
547 | * emulated. A 31 bit program peeking into the struct user of | |
548 | * a 64 bit program is a no-no. | |
549 | */ | |
550 | ||
5e9a2692 MS |
551 | /* |
552 | * Same as peek_user_per but for a 31 bit program. | |
553 | */ | |
554 | static inline __u32 __peek_user_per_compat(struct task_struct *child, | |
555 | addr_t addr) | |
556 | { | |
557 | struct compat_per_struct_kernel *dummy32 = NULL; | |
558 | ||
559 | if (addr == (addr_t) &dummy32->cr9) | |
560 | /* Control bits of the active per set. */ | |
561 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
562 | PER_EVENT_IFETCH : child->thread.per_user.control; | |
563 | else if (addr == (addr_t) &dummy32->cr10) | |
564 | /* Start address of the active per set. */ | |
565 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
566 | 0 : child->thread.per_user.start; | |
567 | else if (addr == (addr_t) &dummy32->cr11) | |
568 | /* End address of the active per set. */ | |
569 | return test_thread_flag(TIF_SINGLE_STEP) ? | |
570 | PSW32_ADDR_INSN : child->thread.per_user.end; | |
571 | else if (addr == (addr_t) &dummy32->bits) | |
572 | /* Single-step bit. */ | |
573 | return (__u32) test_thread_flag(TIF_SINGLE_STEP) ? | |
574 | 0x80000000 : 0; | |
575 | else if (addr == (addr_t) &dummy32->starting_addr) | |
576 | /* Start address of the user specified per set. */ | |
577 | return (__u32) child->thread.per_user.start; | |
578 | else if (addr == (addr_t) &dummy32->ending_addr) | |
579 | /* End address of the user specified per set. */ | |
580 | return (__u32) child->thread.per_user.end; | |
581 | else if (addr == (addr_t) &dummy32->perc_atmid) | |
582 | /* PER code, ATMID and AI of the last PER trap */ | |
583 | return (__u32) child->thread.per_event.cause << 16; | |
584 | else if (addr == (addr_t) &dummy32->address) | |
585 | /* Address of the last PER trap */ | |
586 | return (__u32) child->thread.per_event.address; | |
587 | else if (addr == (addr_t) &dummy32->access_id) | |
588 | /* Access id of the last PER trap */ | |
589 | return (__u32) child->thread.per_event.paid << 24; | |
590 | return 0; | |
591 | } | |
592 | ||
1da177e4 LT |
593 | /* |
594 | * Same as peek_user but for a 31 bit program. | |
595 | */ | |
63506c41 | 596 | static u32 __peek_user_compat(struct task_struct *child, addr_t addr) |
1da177e4 | 597 | { |
5e9a2692 | 598 | struct compat_user *dummy32 = NULL; |
1da177e4 LT |
599 | addr_t offset; |
600 | __u32 tmp; | |
601 | ||
1da177e4 | 602 | if (addr < (addr_t) &dummy32->regs.acrs) { |
b50511e4 | 603 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
604 | /* |
605 | * psw and gprs are stored on the stack | |
606 | */ | |
607 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
608 | /* Fake a 31 bit psw mask. */ | |
b50511e4 | 609 | tmp = (__u32)(regs->psw.mask >> 32); |
5ebf250d | 610 | tmp &= PSW32_MASK_USER | PSW32_MASK_RI; |
f26946d7 | 611 | tmp |= PSW32_USER_BITS; |
1da177e4 LT |
612 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
613 | /* Fake a 31 bit psw address. */ | |
d4e81b35 MS |
614 | tmp = (__u32) regs->psw.addr | |
615 | (__u32)(regs->psw.mask & PSW_MASK_BA); | |
1da177e4 LT |
616 | } else { |
617 | /* gpr 0-15 */ | |
b50511e4 | 618 | tmp = *(__u32 *)((addr_t) ®s->psw + addr*2 + 4); |
1da177e4 LT |
619 | } |
620 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
621 | /* | |
622 | * access registers are stored in the thread structure | |
623 | */ | |
624 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
625 | tmp = *(__u32*)((addr_t) &child->thread.acrs + offset); | |
626 | ||
627 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
628 | /* | |
629 | * orig_gpr2 is stored on the kernel stack | |
630 | */ | |
c7584fb6 | 631 | tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4); |
1da177e4 | 632 | |
3d6e48f4 JW |
633 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
634 | /* | |
635 | * prevent reads of padding hole between | |
636 | * orig_gpr2 and fp_regs on s390. | |
637 | */ | |
638 | tmp = 0; | |
639 | ||
86c558e8 MS |
640 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
641 | /* | |
642 | * floating point control reg. is in the thread structure | |
643 | */ | |
644 | tmp = child->thread.fp_regs.fpc; | |
645 | ||
1da177e4 LT |
646 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { |
647 | /* | |
86c558e8 MS |
648 | * floating point regs. are either in child->thread.fp_regs |
649 | * or the child->thread.vxrs array | |
1da177e4 | 650 | */ |
86c558e8 MS |
651 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; |
652 | #ifdef CONFIG_64BIT | |
653 | if (child->thread.vxrs) | |
654 | tmp = *(__u32 *) | |
655 | ((addr_t) child->thread.vxrs + 2*offset); | |
656 | else | |
657 | #endif | |
658 | tmp = *(__u32 *) | |
659 | ((addr_t) &child->thread.fp_regs.fprs + offset); | |
1da177e4 LT |
660 | |
661 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
662 | /* | |
5e9a2692 | 663 | * Handle access to the per_info structure. |
1da177e4 | 664 | */ |
5e9a2692 MS |
665 | addr -= (addr_t) &dummy32->regs.per_info; |
666 | tmp = __peek_user_per_compat(child, addr); | |
1da177e4 LT |
667 | |
668 | } else | |
669 | tmp = 0; | |
670 | ||
63506c41 MS |
671 | return tmp; |
672 | } | |
673 | ||
674 | static int peek_user_compat(struct task_struct *child, | |
675 | addr_t addr, addr_t data) | |
676 | { | |
677 | __u32 tmp; | |
678 | ||
7757591a | 679 | if (!is_compat_task() || (addr & 3) || addr > sizeof(struct user) - 3) |
63506c41 MS |
680 | return -EIO; |
681 | ||
682 | tmp = __peek_user_compat(child, addr); | |
1da177e4 LT |
683 | return put_user(tmp, (__u32 __user *) data); |
684 | } | |
685 | ||
5e9a2692 MS |
686 | /* |
687 | * Same as poke_user_per but for a 31 bit program. | |
688 | */ | |
689 | static inline void __poke_user_per_compat(struct task_struct *child, | |
690 | addr_t addr, __u32 data) | |
691 | { | |
692 | struct compat_per_struct_kernel *dummy32 = NULL; | |
693 | ||
694 | if (addr == (addr_t) &dummy32->cr9) | |
695 | /* PER event mask of the user specified per set. */ | |
696 | child->thread.per_user.control = | |
697 | data & (PER_EVENT_MASK | PER_CONTROL_MASK); | |
698 | else if (addr == (addr_t) &dummy32->starting_addr) | |
699 | /* Starting address of the user specified per set. */ | |
700 | child->thread.per_user.start = data; | |
701 | else if (addr == (addr_t) &dummy32->ending_addr) | |
702 | /* Ending address of the user specified per set. */ | |
703 | child->thread.per_user.end = data; | |
704 | } | |
705 | ||
1da177e4 LT |
706 | /* |
707 | * Same as poke_user but for a 31 bit program. | |
708 | */ | |
63506c41 MS |
709 | static int __poke_user_compat(struct task_struct *child, |
710 | addr_t addr, addr_t data) | |
1da177e4 | 711 | { |
5e9a2692 | 712 | struct compat_user *dummy32 = NULL; |
63506c41 | 713 | __u32 tmp = (__u32) data; |
1da177e4 | 714 | addr_t offset; |
1da177e4 LT |
715 | |
716 | if (addr < (addr_t) &dummy32->regs.acrs) { | |
b50511e4 | 717 | struct pt_regs *regs = task_pt_regs(child); |
1da177e4 LT |
718 | /* |
719 | * psw, gprs, acrs and orig_gpr2 are stored on the stack | |
720 | */ | |
721 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
5ebf250d HC |
722 | __u32 mask = PSW32_MASK_USER; |
723 | ||
724 | mask |= is_ri_task(child) ? PSW32_MASK_RI : 0; | |
1da177e4 | 725 | /* Build a 64 bit psw mask from 31 bit mask. */ |
dab6cf55 | 726 | if ((tmp ^ PSW32_USER_BITS) & ~mask) |
1da177e4 LT |
727 | /* Invalid psw mask. */ |
728 | return -EINVAL; | |
dab6cf55 MS |
729 | if ((data & PSW32_MASK_ASC) == PSW32_ASC_HOME) |
730 | /* Invalid address-space-control bits */ | |
731 | return -EINVAL; | |
b50511e4 | 732 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_USER) | |
d4e81b35 | 733 | (regs->psw.mask & PSW_MASK_BA) | |
5ebf250d | 734 | (__u64)(tmp & mask) << 32; |
1da177e4 LT |
735 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
736 | /* Build a 64 bit psw address from 31 bit address. */ | |
b50511e4 | 737 | regs->psw.addr = (__u64) tmp & PSW32_ADDR_INSN; |
d4e81b35 MS |
738 | /* Transfer 31 bit amode bit to psw mask. */ |
739 | regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) | | |
740 | (__u64)(tmp & PSW32_ADDR_AMODE); | |
1da177e4 LT |
741 | } else { |
742 | /* gpr 0-15 */ | |
b50511e4 | 743 | *(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp; |
1da177e4 LT |
744 | } |
745 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
746 | /* | |
747 | * access registers are stored in the thread structure | |
748 | */ | |
749 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
750 | *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp; | |
751 | ||
752 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
753 | /* | |
754 | * orig_gpr2 is stored on the kernel stack | |
755 | */ | |
c7584fb6 | 756 | *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp; |
1da177e4 | 757 | |
3d6e48f4 JW |
758 | } else if (addr < (addr_t) &dummy32->regs.fp_regs) { |
759 | /* | |
760 | * prevent writess of padding hole between | |
761 | * orig_gpr2 and fp_regs on s390. | |
762 | */ | |
763 | return 0; | |
764 | ||
86c558e8 | 765 | } else if (addr == (addr_t) &dummy32->regs.fp_regs.fpc) { |
1da177e4 | 766 | /* |
86c558e8 | 767 | * floating point control reg. is in the thread structure |
1da177e4 | 768 | */ |
86c558e8 | 769 | if (test_fp_ctl(tmp)) |
1da177e4 | 770 | return -EINVAL; |
86c558e8 MS |
771 | child->thread.fp_regs.fpc = data; |
772 | ||
773 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { | |
774 | /* | |
775 | * floating point regs. are either in child->thread.fp_regs | |
776 | * or the child->thread.vxrs array | |
777 | */ | |
778 | offset = addr - (addr_t) &dummy32->regs.fp_regs.fprs; | |
779 | #ifdef CONFIG_64BIT | |
780 | if (child->thread.vxrs) | |
781 | *(__u32 *)((addr_t) | |
782 | child->thread.vxrs + 2*offset) = tmp; | |
783 | else | |
784 | #endif | |
785 | *(__u32 *)((addr_t) | |
786 | &child->thread.fp_regs.fprs + offset) = tmp; | |
1da177e4 LT |
787 | |
788 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
789 | /* | |
5e9a2692 | 790 | * Handle access to the per_info structure. |
1da177e4 | 791 | */ |
5e9a2692 MS |
792 | addr -= (addr_t) &dummy32->regs.per_info; |
793 | __poke_user_per_compat(child, addr, data); | |
1da177e4 LT |
794 | } |
795 | ||
1da177e4 LT |
796 | return 0; |
797 | } | |
798 | ||
63506c41 MS |
799 | static int poke_user_compat(struct task_struct *child, |
800 | addr_t addr, addr_t data) | |
801 | { | |
5e9a2692 MS |
802 | if (!is_compat_task() || (addr & 3) || |
803 | addr > sizeof(struct compat_user) - 3) | |
63506c41 MS |
804 | return -EIO; |
805 | ||
806 | return __poke_user_compat(child, addr, data); | |
807 | } | |
808 | ||
b499d76b RM |
809 | long compat_arch_ptrace(struct task_struct *child, compat_long_t request, |
810 | compat_ulong_t caddr, compat_ulong_t cdata) | |
1da177e4 | 811 | { |
b499d76b RM |
812 | unsigned long addr = caddr; |
813 | unsigned long data = cdata; | |
5e9a2692 | 814 | compat_ptrace_area parea; |
1da177e4 LT |
815 | int copied, ret; |
816 | ||
817 | switch (request) { | |
1da177e4 LT |
818 | case PTRACE_PEEKUSR: |
819 | /* read the word at location addr in the USER area. */ | |
63506c41 | 820 | return peek_user_compat(child, addr, data); |
1da177e4 | 821 | |
1da177e4 LT |
822 | case PTRACE_POKEUSR: |
823 | /* write the word at location addr in the USER area */ | |
63506c41 | 824 | return poke_user_compat(child, addr, data); |
1da177e4 LT |
825 | |
826 | case PTRACE_PEEKUSR_AREA: | |
827 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 828 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
829 | sizeof(parea))) |
830 | return -EFAULT; | |
831 | addr = parea.kernel_addr; | |
832 | data = parea.process_addr; | |
833 | copied = 0; | |
834 | while (copied < parea.len) { | |
835 | if (request == PTRACE_PEEKUSR_AREA) | |
63506c41 | 836 | ret = peek_user_compat(child, addr, data); |
1da177e4 | 837 | else { |
2b67fc46 HC |
838 | __u32 utmp; |
839 | if (get_user(utmp, | |
840 | (__u32 __force __user *) data)) | |
1da177e4 | 841 | return -EFAULT; |
63506c41 | 842 | ret = poke_user_compat(child, addr, utmp); |
1da177e4 LT |
843 | } |
844 | if (ret) | |
845 | return ret; | |
846 | addr += sizeof(unsigned int); | |
847 | data += sizeof(unsigned int); | |
848 | copied += sizeof(unsigned int); | |
849 | } | |
850 | return 0; | |
86f2552b MS |
851 | case PTRACE_GET_LAST_BREAK: |
852 | put_user(task_thread_info(child)->last_break, | |
853 | (unsigned int __user *) data); | |
854 | return 0; | |
1da177e4 | 855 | } |
b499d76b | 856 | return compat_ptrace_request(child, request, addr, data); |
1da177e4 LT |
857 | } |
858 | #endif | |
859 | ||
753c4dd6 | 860 | asmlinkage long do_syscall_trace_enter(struct pt_regs *regs) |
1da177e4 | 861 | { |
545c174d | 862 | long ret = 0; |
1da177e4 | 863 | |
bcf5cef7 | 864 | /* Do the secure computing check first. */ |
a4412fc9 | 865 | if (secure_computing()) { |
c63cb468 HC |
866 | /* seccomp failures shouldn't expose any additional code. */ |
867 | ret = -1; | |
868 | goto out; | |
869 | } | |
bcf5cef7 | 870 | |
c5c3a6d8 | 871 | /* |
753c4dd6 MS |
872 | * The sysc_tracesys code in entry.S stored the system |
873 | * call number to gprs[2]. | |
c5c3a6d8 | 874 | */ |
753c4dd6 MS |
875 | if (test_thread_flag(TIF_SYSCALL_TRACE) && |
876 | (tracehook_report_syscall_entry(regs) || | |
877 | regs->gprs[2] >= NR_syscalls)) { | |
878 | /* | |
879 | * Tracing decided this syscall should not happen or the | |
880 | * debugger stored an invalid system call number. Skip | |
881 | * the system call and the system call restart handling. | |
882 | */ | |
d3a73acb | 883 | clear_pt_regs_flag(regs, PIF_SYSCALL); |
753c4dd6 | 884 | ret = -1; |
1da177e4 | 885 | } |
753c4dd6 | 886 | |
66700001 | 887 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 888 | trace_sys_enter(regs, regs->gprs[2]); |
9bf1226b | 889 | |
91397401 | 890 | audit_syscall_entry(regs->gprs[2], regs->orig_gpr2, |
b05d8447 EP |
891 | regs->gprs[3], regs->gprs[4], |
892 | regs->gprs[5]); | |
c63cb468 | 893 | out: |
545c174d | 894 | return ret ?: regs->gprs[2]; |
753c4dd6 MS |
895 | } |
896 | ||
897 | asmlinkage void do_syscall_trace_exit(struct pt_regs *regs) | |
898 | { | |
d7e7528b | 899 | audit_syscall_exit(regs); |
753c4dd6 | 900 | |
66700001 | 901 | if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT))) |
1c569f02 | 902 | trace_sys_exit(regs, regs->gprs[2]); |
9bf1226b | 903 | |
753c4dd6 MS |
904 | if (test_thread_flag(TIF_SYSCALL_TRACE)) |
905 | tracehook_report_syscall_exit(regs, 0); | |
1da177e4 | 906 | } |
63506c41 MS |
907 | |
908 | /* | |
909 | * user_regset definitions. | |
910 | */ | |
911 | ||
912 | static int s390_regs_get(struct task_struct *target, | |
913 | const struct user_regset *regset, | |
914 | unsigned int pos, unsigned int count, | |
915 | void *kbuf, void __user *ubuf) | |
916 | { | |
917 | if (target == current) | |
918 | save_access_regs(target->thread.acrs); | |
919 | ||
920 | if (kbuf) { | |
921 | unsigned long *k = kbuf; | |
922 | while (count > 0) { | |
923 | *k++ = __peek_user(target, pos); | |
924 | count -= sizeof(*k); | |
925 | pos += sizeof(*k); | |
926 | } | |
927 | } else { | |
928 | unsigned long __user *u = ubuf; | |
929 | while (count > 0) { | |
930 | if (__put_user(__peek_user(target, pos), u++)) | |
931 | return -EFAULT; | |
932 | count -= sizeof(*u); | |
933 | pos += sizeof(*u); | |
934 | } | |
935 | } | |
936 | return 0; | |
937 | } | |
938 | ||
939 | static int s390_regs_set(struct task_struct *target, | |
940 | const struct user_regset *regset, | |
941 | unsigned int pos, unsigned int count, | |
942 | const void *kbuf, const void __user *ubuf) | |
943 | { | |
944 | int rc = 0; | |
945 | ||
946 | if (target == current) | |
947 | save_access_regs(target->thread.acrs); | |
948 | ||
949 | if (kbuf) { | |
950 | const unsigned long *k = kbuf; | |
951 | while (count > 0 && !rc) { | |
952 | rc = __poke_user(target, pos, *k++); | |
953 | count -= sizeof(*k); | |
954 | pos += sizeof(*k); | |
955 | } | |
956 | } else { | |
957 | const unsigned long __user *u = ubuf; | |
958 | while (count > 0 && !rc) { | |
959 | unsigned long word; | |
960 | rc = __get_user(word, u++); | |
961 | if (rc) | |
962 | break; | |
963 | rc = __poke_user(target, pos, word); | |
964 | count -= sizeof(*u); | |
965 | pos += sizeof(*u); | |
966 | } | |
967 | } | |
968 | ||
969 | if (rc == 0 && target == current) | |
970 | restore_access_regs(target->thread.acrs); | |
971 | ||
972 | return rc; | |
973 | } | |
974 | ||
975 | static int s390_fpregs_get(struct task_struct *target, | |
976 | const struct user_regset *regset, unsigned int pos, | |
977 | unsigned int count, void *kbuf, void __user *ubuf) | |
978 | { | |
4725c860 MS |
979 | if (target == current) { |
980 | save_fp_ctl(&target->thread.fp_regs.fpc); | |
981 | save_fp_regs(target->thread.fp_regs.fprs); | |
982 | } | |
80703617 MS |
983 | #ifdef CONFIG_64BIT |
984 | else if (target->thread.vxrs) { | |
985 | int i; | |
63506c41 | 986 | |
80703617 MS |
987 | for (i = 0; i < __NUM_VXRS_LOW; i++) |
988 | target->thread.fp_regs.fprs[i] = | |
989 | *(freg_t *)(target->thread.vxrs + i); | |
990 | } | |
991 | #endif | |
63506c41 MS |
992 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, |
993 | &target->thread.fp_regs, 0, -1); | |
994 | } | |
995 | ||
996 | static int s390_fpregs_set(struct task_struct *target, | |
997 | const struct user_regset *regset, unsigned int pos, | |
998 | unsigned int count, const void *kbuf, | |
999 | const void __user *ubuf) | |
1000 | { | |
1001 | int rc = 0; | |
1002 | ||
4725c860 MS |
1003 | if (target == current) { |
1004 | save_fp_ctl(&target->thread.fp_regs.fpc); | |
1005 | save_fp_regs(target->thread.fp_regs.fprs); | |
1006 | } | |
63506c41 MS |
1007 | |
1008 | /* If setting FPC, must validate it first. */ | |
1009 | if (count > 0 && pos < offsetof(s390_fp_regs, fprs)) { | |
4725c860 MS |
1010 | u32 ufpc[2] = { target->thread.fp_regs.fpc, 0 }; |
1011 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ufpc, | |
63506c41 MS |
1012 | 0, offsetof(s390_fp_regs, fprs)); |
1013 | if (rc) | |
1014 | return rc; | |
4725c860 | 1015 | if (ufpc[1] != 0 || test_fp_ctl(ufpc[0])) |
63506c41 | 1016 | return -EINVAL; |
4725c860 | 1017 | target->thread.fp_regs.fpc = ufpc[0]; |
63506c41 MS |
1018 | } |
1019 | ||
1020 | if (rc == 0 && count > 0) | |
1021 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
1022 | target->thread.fp_regs.fprs, | |
1023 | offsetof(s390_fp_regs, fprs), -1); | |
1024 | ||
80703617 MS |
1025 | if (rc == 0) { |
1026 | if (target == current) { | |
1027 | restore_fp_ctl(&target->thread.fp_regs.fpc); | |
1028 | restore_fp_regs(target->thread.fp_regs.fprs); | |
1029 | } | |
1030 | #ifdef CONFIG_64BIT | |
1031 | else if (target->thread.vxrs) { | |
1032 | int i; | |
1033 | ||
1034 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1035 | *(freg_t *)(target->thread.vxrs + i) = | |
1036 | target->thread.fp_regs.fprs[i]; | |
1037 | } | |
1038 | #endif | |
4725c860 | 1039 | } |
63506c41 MS |
1040 | |
1041 | return rc; | |
1042 | } | |
1043 | ||
86f2552b MS |
1044 | #ifdef CONFIG_64BIT |
1045 | ||
1046 | static int s390_last_break_get(struct task_struct *target, | |
1047 | const struct user_regset *regset, | |
1048 | unsigned int pos, unsigned int count, | |
1049 | void *kbuf, void __user *ubuf) | |
1050 | { | |
1051 | if (count > 0) { | |
1052 | if (kbuf) { | |
1053 | unsigned long *k = kbuf; | |
1054 | *k = task_thread_info(target)->last_break; | |
1055 | } else { | |
1056 | unsigned long __user *u = ubuf; | |
1057 | if (__put_user(task_thread_info(target)->last_break, u)) | |
1058 | return -EFAULT; | |
1059 | } | |
1060 | } | |
1061 | return 0; | |
1062 | } | |
1063 | ||
b934069c MS |
1064 | static int s390_last_break_set(struct task_struct *target, |
1065 | const struct user_regset *regset, | |
1066 | unsigned int pos, unsigned int count, | |
1067 | const void *kbuf, const void __user *ubuf) | |
1068 | { | |
1069 | return 0; | |
1070 | } | |
1071 | ||
d35339a4 MS |
1072 | static int s390_tdb_get(struct task_struct *target, |
1073 | const struct user_regset *regset, | |
1074 | unsigned int pos, unsigned int count, | |
1075 | void *kbuf, void __user *ubuf) | |
1076 | { | |
1077 | struct pt_regs *regs = task_pt_regs(target); | |
1078 | unsigned char *data; | |
1079 | ||
1080 | if (!(regs->int_code & 0x200)) | |
1081 | return -ENODATA; | |
1082 | data = target->thread.trap_tdb; | |
1083 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, data, 0, 256); | |
1084 | } | |
1085 | ||
1086 | static int s390_tdb_set(struct task_struct *target, | |
1087 | const struct user_regset *regset, | |
1088 | unsigned int pos, unsigned int count, | |
1089 | const void *kbuf, const void __user *ubuf) | |
1090 | { | |
1091 | return 0; | |
1092 | } | |
1093 | ||
80703617 MS |
1094 | static int s390_vxrs_active(struct task_struct *target, |
1095 | const struct user_regset *regset) | |
1096 | { | |
1097 | return !!target->thread.vxrs; | |
1098 | } | |
1099 | ||
1100 | static int s390_vxrs_low_get(struct task_struct *target, | |
1101 | const struct user_regset *regset, | |
1102 | unsigned int pos, unsigned int count, | |
1103 | void *kbuf, void __user *ubuf) | |
1104 | { | |
1105 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1106 | int i; | |
1107 | ||
1108 | if (target->thread.vxrs) { | |
1109 | if (target == current) | |
1110 | save_vx_regs(target->thread.vxrs); | |
1111 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1112 | vxrs[i] = *((__u64 *)(target->thread.vxrs + i) + 1); | |
1113 | } else | |
1114 | memset(vxrs, 0, sizeof(vxrs)); | |
1115 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); | |
1116 | } | |
1117 | ||
1118 | static int s390_vxrs_low_set(struct task_struct *target, | |
1119 | const struct user_regset *regset, | |
1120 | unsigned int pos, unsigned int count, | |
1121 | const void *kbuf, const void __user *ubuf) | |
1122 | { | |
1123 | __u64 vxrs[__NUM_VXRS_LOW]; | |
1124 | int i, rc; | |
1125 | ||
1126 | if (!target->thread.vxrs) { | |
1127 | rc = alloc_vector_registers(target); | |
1128 | if (rc) | |
1129 | return rc; | |
1130 | } else if (target == current) | |
1131 | save_vx_regs(target->thread.vxrs); | |
1132 | ||
1133 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); | |
1134 | if (rc == 0) { | |
1135 | for (i = 0; i < __NUM_VXRS_LOW; i++) | |
1136 | *((__u64 *)(target->thread.vxrs + i) + 1) = vxrs[i]; | |
1137 | if (target == current) | |
1138 | restore_vx_regs(target->thread.vxrs); | |
1139 | } | |
1140 | ||
1141 | return rc; | |
1142 | } | |
1143 | ||
1144 | static int s390_vxrs_high_get(struct task_struct *target, | |
1145 | const struct user_regset *regset, | |
1146 | unsigned int pos, unsigned int count, | |
1147 | void *kbuf, void __user *ubuf) | |
1148 | { | |
1149 | __vector128 vxrs[__NUM_VXRS_HIGH]; | |
1150 | ||
1151 | if (target->thread.vxrs) { | |
1152 | if (target == current) | |
1153 | save_vx_regs(target->thread.vxrs); | |
1154 | memcpy(vxrs, target->thread.vxrs + __NUM_VXRS_LOW, | |
1155 | sizeof(vxrs)); | |
1156 | } else | |
1157 | memset(vxrs, 0, sizeof(vxrs)); | |
1158 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, vxrs, 0, -1); | |
1159 | } | |
1160 | ||
1161 | static int s390_vxrs_high_set(struct task_struct *target, | |
1162 | const struct user_regset *regset, | |
1163 | unsigned int pos, unsigned int count, | |
1164 | const void *kbuf, const void __user *ubuf) | |
1165 | { | |
1166 | int rc; | |
1167 | ||
1168 | if (!target->thread.vxrs) { | |
1169 | rc = alloc_vector_registers(target); | |
1170 | if (rc) | |
1171 | return rc; | |
1172 | } else if (target == current) | |
1173 | save_vx_regs(target->thread.vxrs); | |
1174 | ||
1175 | rc = user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
1176 | target->thread.vxrs + __NUM_VXRS_LOW, 0, -1); | |
1177 | if (rc == 0 && target == current) | |
1178 | restore_vx_regs(target->thread.vxrs); | |
1179 | ||
1180 | return rc; | |
1181 | } | |
1182 | ||
86f2552b MS |
1183 | #endif |
1184 | ||
20b40a79 MS |
1185 | static int s390_system_call_get(struct task_struct *target, |
1186 | const struct user_regset *regset, | |
1187 | unsigned int pos, unsigned int count, | |
1188 | void *kbuf, void __user *ubuf) | |
1189 | { | |
1190 | unsigned int *data = &task_thread_info(target)->system_call; | |
1191 | return user_regset_copyout(&pos, &count, &kbuf, &ubuf, | |
1192 | data, 0, sizeof(unsigned int)); | |
1193 | } | |
1194 | ||
1195 | static int s390_system_call_set(struct task_struct *target, | |
1196 | const struct user_regset *regset, | |
1197 | unsigned int pos, unsigned int count, | |
1198 | const void *kbuf, const void __user *ubuf) | |
1199 | { | |
1200 | unsigned int *data = &task_thread_info(target)->system_call; | |
1201 | return user_regset_copyin(&pos, &count, &kbuf, &ubuf, | |
1202 | data, 0, sizeof(unsigned int)); | |
1203 | } | |
1204 | ||
63506c41 | 1205 | static const struct user_regset s390_regsets[] = { |
80703617 | 1206 | { |
63506c41 MS |
1207 | .core_note_type = NT_PRSTATUS, |
1208 | .n = sizeof(s390_regs) / sizeof(long), | |
1209 | .size = sizeof(long), | |
1210 | .align = sizeof(long), | |
1211 | .get = s390_regs_get, | |
1212 | .set = s390_regs_set, | |
1213 | }, | |
80703617 | 1214 | { |
63506c41 MS |
1215 | .core_note_type = NT_PRFPREG, |
1216 | .n = sizeof(s390_fp_regs) / sizeof(long), | |
1217 | .size = sizeof(long), | |
1218 | .align = sizeof(long), | |
1219 | .get = s390_fpregs_get, | |
1220 | .set = s390_fpregs_set, | |
1221 | }, | |
80703617 MS |
1222 | { |
1223 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1224 | .n = 1, | |
1225 | .size = sizeof(unsigned int), | |
1226 | .align = sizeof(unsigned int), | |
1227 | .get = s390_system_call_get, | |
1228 | .set = s390_system_call_set, | |
1229 | }, | |
86f2552b | 1230 | #ifdef CONFIG_64BIT |
80703617 | 1231 | { |
86f2552b MS |
1232 | .core_note_type = NT_S390_LAST_BREAK, |
1233 | .n = 1, | |
1234 | .size = sizeof(long), | |
1235 | .align = sizeof(long), | |
1236 | .get = s390_last_break_get, | |
b934069c | 1237 | .set = s390_last_break_set, |
86f2552b | 1238 | }, |
80703617 | 1239 | { |
d35339a4 MS |
1240 | .core_note_type = NT_S390_TDB, |
1241 | .n = 1, | |
1242 | .size = 256, | |
1243 | .align = 1, | |
1244 | .get = s390_tdb_get, | |
1245 | .set = s390_tdb_set, | |
1246 | }, | |
80703617 MS |
1247 | { |
1248 | .core_note_type = NT_S390_VXRS_LOW, | |
1249 | .n = __NUM_VXRS_LOW, | |
1250 | .size = sizeof(__u64), | |
1251 | .align = sizeof(__u64), | |
1252 | .active = s390_vxrs_active, | |
1253 | .get = s390_vxrs_low_get, | |
1254 | .set = s390_vxrs_low_set, | |
20b40a79 | 1255 | }, |
80703617 MS |
1256 | { |
1257 | .core_note_type = NT_S390_VXRS_HIGH, | |
1258 | .n = __NUM_VXRS_HIGH, | |
1259 | .size = sizeof(__vector128), | |
1260 | .align = sizeof(__vector128), | |
1261 | .active = s390_vxrs_active, | |
1262 | .get = s390_vxrs_high_get, | |
1263 | .set = s390_vxrs_high_set, | |
20b40a79 | 1264 | }, |
80703617 | 1265 | #endif |
63506c41 MS |
1266 | }; |
1267 | ||
1268 | static const struct user_regset_view user_s390_view = { | |
1269 | .name = UTS_MACHINE, | |
1270 | .e_machine = EM_S390, | |
1271 | .regsets = s390_regsets, | |
1272 | .n = ARRAY_SIZE(s390_regsets) | |
1273 | }; | |
1274 | ||
1275 | #ifdef CONFIG_COMPAT | |
1276 | static int s390_compat_regs_get(struct task_struct *target, | |
1277 | const struct user_regset *regset, | |
1278 | unsigned int pos, unsigned int count, | |
1279 | void *kbuf, void __user *ubuf) | |
1280 | { | |
1281 | if (target == current) | |
1282 | save_access_regs(target->thread.acrs); | |
1283 | ||
1284 | if (kbuf) { | |
1285 | compat_ulong_t *k = kbuf; | |
1286 | while (count > 0) { | |
1287 | *k++ = __peek_user_compat(target, pos); | |
1288 | count -= sizeof(*k); | |
1289 | pos += sizeof(*k); | |
1290 | } | |
1291 | } else { | |
1292 | compat_ulong_t __user *u = ubuf; | |
1293 | while (count > 0) { | |
1294 | if (__put_user(__peek_user_compat(target, pos), u++)) | |
1295 | return -EFAULT; | |
1296 | count -= sizeof(*u); | |
1297 | pos += sizeof(*u); | |
1298 | } | |
1299 | } | |
1300 | return 0; | |
1301 | } | |
1302 | ||
1303 | static int s390_compat_regs_set(struct task_struct *target, | |
1304 | const struct user_regset *regset, | |
1305 | unsigned int pos, unsigned int count, | |
1306 | const void *kbuf, const void __user *ubuf) | |
1307 | { | |
1308 | int rc = 0; | |
1309 | ||
1310 | if (target == current) | |
1311 | save_access_regs(target->thread.acrs); | |
1312 | ||
1313 | if (kbuf) { | |
1314 | const compat_ulong_t *k = kbuf; | |
1315 | while (count > 0 && !rc) { | |
1316 | rc = __poke_user_compat(target, pos, *k++); | |
1317 | count -= sizeof(*k); | |
1318 | pos += sizeof(*k); | |
1319 | } | |
1320 | } else { | |
1321 | const compat_ulong_t __user *u = ubuf; | |
1322 | while (count > 0 && !rc) { | |
1323 | compat_ulong_t word; | |
1324 | rc = __get_user(word, u++); | |
1325 | if (rc) | |
1326 | break; | |
1327 | rc = __poke_user_compat(target, pos, word); | |
1328 | count -= sizeof(*u); | |
1329 | pos += sizeof(*u); | |
1330 | } | |
1331 | } | |
1332 | ||
1333 | if (rc == 0 && target == current) | |
1334 | restore_access_regs(target->thread.acrs); | |
1335 | ||
1336 | return rc; | |
1337 | } | |
1338 | ||
ea2a4d3a HC |
1339 | static int s390_compat_regs_high_get(struct task_struct *target, |
1340 | const struct user_regset *regset, | |
1341 | unsigned int pos, unsigned int count, | |
1342 | void *kbuf, void __user *ubuf) | |
1343 | { | |
1344 | compat_ulong_t *gprs_high; | |
1345 | ||
1346 | gprs_high = (compat_ulong_t *) | |
1347 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1348 | if (kbuf) { | |
1349 | compat_ulong_t *k = kbuf; | |
1350 | while (count > 0) { | |
1351 | *k++ = *gprs_high; | |
1352 | gprs_high += 2; | |
1353 | count -= sizeof(*k); | |
1354 | } | |
1355 | } else { | |
1356 | compat_ulong_t __user *u = ubuf; | |
1357 | while (count > 0) { | |
1358 | if (__put_user(*gprs_high, u++)) | |
1359 | return -EFAULT; | |
1360 | gprs_high += 2; | |
1361 | count -= sizeof(*u); | |
1362 | } | |
1363 | } | |
1364 | return 0; | |
1365 | } | |
1366 | ||
1367 | static int s390_compat_regs_high_set(struct task_struct *target, | |
1368 | const struct user_regset *regset, | |
1369 | unsigned int pos, unsigned int count, | |
1370 | const void *kbuf, const void __user *ubuf) | |
1371 | { | |
1372 | compat_ulong_t *gprs_high; | |
1373 | int rc = 0; | |
1374 | ||
1375 | gprs_high = (compat_ulong_t *) | |
1376 | &task_pt_regs(target)->gprs[pos / sizeof(compat_ulong_t)]; | |
1377 | if (kbuf) { | |
1378 | const compat_ulong_t *k = kbuf; | |
1379 | while (count > 0) { | |
1380 | *gprs_high = *k++; | |
1381 | *gprs_high += 2; | |
1382 | count -= sizeof(*k); | |
1383 | } | |
1384 | } else { | |
1385 | const compat_ulong_t __user *u = ubuf; | |
1386 | while (count > 0 && !rc) { | |
1387 | unsigned long word; | |
1388 | rc = __get_user(word, u++); | |
1389 | if (rc) | |
1390 | break; | |
1391 | *gprs_high = word; | |
1392 | *gprs_high += 2; | |
1393 | count -= sizeof(*u); | |
1394 | } | |
1395 | } | |
1396 | ||
1397 | return rc; | |
1398 | } | |
1399 | ||
86f2552b MS |
1400 | static int s390_compat_last_break_get(struct task_struct *target, |
1401 | const struct user_regset *regset, | |
1402 | unsigned int pos, unsigned int count, | |
1403 | void *kbuf, void __user *ubuf) | |
1404 | { | |
1405 | compat_ulong_t last_break; | |
1406 | ||
1407 | if (count > 0) { | |
1408 | last_break = task_thread_info(target)->last_break; | |
1409 | if (kbuf) { | |
1410 | unsigned long *k = kbuf; | |
1411 | *k = last_break; | |
1412 | } else { | |
1413 | unsigned long __user *u = ubuf; | |
1414 | if (__put_user(last_break, u)) | |
1415 | return -EFAULT; | |
1416 | } | |
1417 | } | |
1418 | return 0; | |
1419 | } | |
1420 | ||
b934069c MS |
1421 | static int s390_compat_last_break_set(struct task_struct *target, |
1422 | const struct user_regset *regset, | |
1423 | unsigned int pos, unsigned int count, | |
1424 | const void *kbuf, const void __user *ubuf) | |
1425 | { | |
1426 | return 0; | |
1427 | } | |
1428 | ||
63506c41 | 1429 | static const struct user_regset s390_compat_regsets[] = { |
80703617 | 1430 | { |
63506c41 MS |
1431 | .core_note_type = NT_PRSTATUS, |
1432 | .n = sizeof(s390_compat_regs) / sizeof(compat_long_t), | |
1433 | .size = sizeof(compat_long_t), | |
1434 | .align = sizeof(compat_long_t), | |
1435 | .get = s390_compat_regs_get, | |
1436 | .set = s390_compat_regs_set, | |
1437 | }, | |
80703617 | 1438 | { |
63506c41 MS |
1439 | .core_note_type = NT_PRFPREG, |
1440 | .n = sizeof(s390_fp_regs) / sizeof(compat_long_t), | |
1441 | .size = sizeof(compat_long_t), | |
1442 | .align = sizeof(compat_long_t), | |
1443 | .get = s390_fpregs_get, | |
1444 | .set = s390_fpregs_set, | |
1445 | }, | |
80703617 MS |
1446 | { |
1447 | .core_note_type = NT_S390_SYSTEM_CALL, | |
1448 | .n = 1, | |
1449 | .size = sizeof(compat_uint_t), | |
1450 | .align = sizeof(compat_uint_t), | |
1451 | .get = s390_system_call_get, | |
1452 | .set = s390_system_call_set, | |
1453 | }, | |
1454 | { | |
86f2552b MS |
1455 | .core_note_type = NT_S390_LAST_BREAK, |
1456 | .n = 1, | |
1457 | .size = sizeof(long), | |
1458 | .align = sizeof(long), | |
1459 | .get = s390_compat_last_break_get, | |
b934069c | 1460 | .set = s390_compat_last_break_set, |
86f2552b | 1461 | }, |
80703617 | 1462 | { |
d35339a4 MS |
1463 | .core_note_type = NT_S390_TDB, |
1464 | .n = 1, | |
1465 | .size = 256, | |
1466 | .align = 1, | |
1467 | .get = s390_tdb_get, | |
1468 | .set = s390_tdb_set, | |
1469 | }, | |
80703617 MS |
1470 | { |
1471 | .core_note_type = NT_S390_VXRS_LOW, | |
1472 | .n = __NUM_VXRS_LOW, | |
1473 | .size = sizeof(__u64), | |
1474 | .align = sizeof(__u64), | |
1475 | .active = s390_vxrs_active, | |
1476 | .get = s390_vxrs_low_get, | |
1477 | .set = s390_vxrs_low_set, | |
1478 | }, | |
1479 | { | |
1480 | .core_note_type = NT_S390_VXRS_HIGH, | |
1481 | .n = __NUM_VXRS_HIGH, | |
1482 | .size = sizeof(__vector128), | |
1483 | .align = sizeof(__vector128), | |
1484 | .active = s390_vxrs_active, | |
1485 | .get = s390_vxrs_high_get, | |
1486 | .set = s390_vxrs_high_set, | |
20b40a79 | 1487 | }, |
80703617 | 1488 | { |
622e99bf | 1489 | .core_note_type = NT_S390_HIGH_GPRS, |
ea2a4d3a HC |
1490 | .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), |
1491 | .size = sizeof(compat_long_t), | |
1492 | .align = sizeof(compat_long_t), | |
1493 | .get = s390_compat_regs_high_get, | |
1494 | .set = s390_compat_regs_high_set, | |
1495 | }, | |
63506c41 MS |
1496 | }; |
1497 | ||
1498 | static const struct user_regset_view user_s390_compat_view = { | |
1499 | .name = "s390", | |
1500 | .e_machine = EM_S390, | |
1501 | .regsets = s390_compat_regsets, | |
1502 | .n = ARRAY_SIZE(s390_compat_regsets) | |
1503 | }; | |
1504 | #endif | |
1505 | ||
1506 | const struct user_regset_view *task_user_regset_view(struct task_struct *task) | |
1507 | { | |
1508 | #ifdef CONFIG_COMPAT | |
1509 | if (test_tsk_thread_flag(task, TIF_31BIT)) | |
1510 | return &user_s390_compat_view; | |
1511 | #endif | |
1512 | return &user_s390_view; | |
1513 | } | |
952974ac HC |
1514 | |
1515 | static const char *gpr_names[NUM_GPRS] = { | |
1516 | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", | |
1517 | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", | |
1518 | }; | |
1519 | ||
1520 | unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset) | |
1521 | { | |
1522 | if (offset >= NUM_GPRS) | |
1523 | return 0; | |
1524 | return regs->gprs[offset]; | |
1525 | } | |
1526 | ||
1527 | int regs_query_register_offset(const char *name) | |
1528 | { | |
1529 | unsigned long offset; | |
1530 | ||
1531 | if (!name || *name != 'r') | |
1532 | return -EINVAL; | |
958d9072 | 1533 | if (kstrtoul(name + 1, 10, &offset)) |
952974ac HC |
1534 | return -EINVAL; |
1535 | if (offset >= NUM_GPRS) | |
1536 | return -EINVAL; | |
1537 | return offset; | |
1538 | } | |
1539 | ||
1540 | const char *regs_query_register_name(unsigned int offset) | |
1541 | { | |
1542 | if (offset >= NUM_GPRS) | |
1543 | return NULL; | |
1544 | return gpr_names[offset]; | |
1545 | } | |
1546 | ||
1547 | static int regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr) | |
1548 | { | |
1549 | unsigned long ksp = kernel_stack_pointer(regs); | |
1550 | ||
1551 | return (addr & ~(THREAD_SIZE - 1)) == (ksp & ~(THREAD_SIZE - 1)); | |
1552 | } | |
1553 | ||
1554 | /** | |
1555 | * regs_get_kernel_stack_nth() - get Nth entry of the stack | |
1556 | * @regs:pt_regs which contains kernel stack pointer. | |
1557 | * @n:stack entry number. | |
1558 | * | |
1559 | * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which | |
1560 | * is specifined by @regs. If the @n th entry is NOT in the kernel stack, | |
1561 | * this returns 0. | |
1562 | */ | |
1563 | unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n) | |
1564 | { | |
1565 | unsigned long addr; | |
1566 | ||
1567 | addr = kernel_stack_pointer(regs) + n * sizeof(long); | |
1568 | if (!regs_within_kernel_stack(regs, addr)) | |
1569 | return 0; | |
1570 | return *(unsigned long *)addr; | |
1571 | } |