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1da177e4 LT |
1 | /* |
2 | * arch/s390/kernel/ptrace.c | |
3 | * | |
4 | * S390 version | |
5 | * Copyright (C) 1999,2000 IBM Deutschland Entwicklung GmbH, IBM Corporation | |
6 | * Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com), | |
7 | * Martin Schwidefsky (schwidefsky@de.ibm.com) | |
8 | * | |
9 | * Based on PowerPC version | |
10 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
11 | * | |
12 | * Derived from "arch/m68k/kernel/ptrace.c" | |
13 | * Copyright (C) 1994 by Hamish Macdonald | |
14 | * Taken from linux/kernel/ptrace.c and modified for M680x0. | |
15 | * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds | |
16 | * | |
17 | * Modified by Cort Dougan (cort@cs.nmt.edu) | |
18 | * | |
19 | * | |
20 | * This file is subject to the terms and conditions of the GNU General | |
21 | * Public License. See the file README.legal in the main directory of | |
22 | * this archive for more details. | |
23 | */ | |
24 | ||
25 | #include <linux/kernel.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/mm.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/smp_lock.h> | |
30 | #include <linux/errno.h> | |
31 | #include <linux/ptrace.h> | |
32 | #include <linux/user.h> | |
33 | #include <linux/security.h> | |
34 | #include <linux/audit.h> | |
7ed20e1a | 35 | #include <linux/signal.h> |
1da177e4 LT |
36 | |
37 | #include <asm/segment.h> | |
38 | #include <asm/page.h> | |
39 | #include <asm/pgtable.h> | |
40 | #include <asm/pgalloc.h> | |
41 | #include <asm/system.h> | |
42 | #include <asm/uaccess.h> | |
778959db | 43 | #include <asm/unistd.h> |
1da177e4 | 44 | |
347a8dc3 | 45 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
46 | #include "compat_ptrace.h" |
47 | #endif | |
48 | ||
49 | static void | |
50 | FixPerRegisters(struct task_struct *task) | |
51 | { | |
52 | struct pt_regs *regs; | |
53 | per_struct *per_info; | |
54 | ||
c7584fb6 | 55 | regs = task_pt_regs(task); |
1da177e4 LT |
56 | per_info = (per_struct *) &task->thread.per_info; |
57 | per_info->control_regs.bits.em_instruction_fetch = | |
58 | per_info->single_step | per_info->instruction_fetch; | |
59 | ||
60 | if (per_info->single_step) { | |
61 | per_info->control_regs.bits.starting_addr = 0; | |
347a8dc3 | 62 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
63 | if (test_thread_flag(TIF_31BIT)) |
64 | per_info->control_regs.bits.ending_addr = 0x7fffffffUL; | |
65 | else | |
66 | #endif | |
67 | per_info->control_regs.bits.ending_addr = PSW_ADDR_INSN; | |
68 | } else { | |
69 | per_info->control_regs.bits.starting_addr = | |
70 | per_info->starting_addr; | |
71 | per_info->control_regs.bits.ending_addr = | |
72 | per_info->ending_addr; | |
73 | } | |
74 | /* | |
75 | * if any of the control reg tracing bits are on | |
76 | * we switch on per in the psw | |
77 | */ | |
78 | if (per_info->control_regs.words.cr[0] & PER_EM_MASK) | |
79 | regs->psw.mask |= PSW_MASK_PER; | |
80 | else | |
81 | regs->psw.mask &= ~PSW_MASK_PER; | |
82 | ||
83 | if (per_info->control_regs.bits.em_storage_alteration) | |
84 | per_info->control_regs.bits.storage_alt_space_ctl = 1; | |
85 | else | |
86 | per_info->control_regs.bits.storage_alt_space_ctl = 0; | |
87 | } | |
88 | ||
2b67fc46 | 89 | static void set_single_step(struct task_struct *task) |
1da177e4 LT |
90 | { |
91 | task->thread.per_info.single_step = 1; | |
92 | FixPerRegisters(task); | |
93 | } | |
94 | ||
2b67fc46 | 95 | static void clear_single_step(struct task_struct *task) |
1da177e4 LT |
96 | { |
97 | task->thread.per_info.single_step = 0; | |
98 | FixPerRegisters(task); | |
99 | } | |
100 | ||
101 | /* | |
102 | * Called by kernel/ptrace.c when detaching.. | |
103 | * | |
104 | * Make sure single step bits etc are not set. | |
105 | */ | |
106 | void | |
107 | ptrace_disable(struct task_struct *child) | |
108 | { | |
109 | /* make sure the single step bit is not set. */ | |
110 | clear_single_step(child); | |
111 | } | |
112 | ||
347a8dc3 | 113 | #ifndef CONFIG_64BIT |
1da177e4 LT |
114 | # define __ADDR_MASK 3 |
115 | #else | |
116 | # define __ADDR_MASK 7 | |
117 | #endif | |
118 | ||
119 | /* | |
120 | * Read the word at offset addr from the user area of a process. The | |
121 | * trouble here is that the information is littered over different | |
122 | * locations. The process registers are found on the kernel stack, | |
123 | * the floating point stuff and the trace settings are stored in | |
124 | * the task structure. In addition the different structures in | |
125 | * struct user contain pad bytes that should be read as zeroes. | |
126 | * Lovely... | |
127 | */ | |
128 | static int | |
129 | peek_user(struct task_struct *child, addr_t addr, addr_t data) | |
130 | { | |
131 | struct user *dummy = NULL; | |
778959db | 132 | addr_t offset, tmp, mask; |
1da177e4 LT |
133 | |
134 | /* | |
135 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
136 | * an alignment of 4. Programmers from hell... | |
137 | */ | |
778959db | 138 | mask = __ADDR_MASK; |
347a8dc3 | 139 | #ifdef CONFIG_64BIT |
778959db MS |
140 | if (addr >= (addr_t) &dummy->regs.acrs && |
141 | addr < (addr_t) &dummy->regs.orig_gpr2) | |
142 | mask = 3; | |
143 | #endif | |
144 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) | |
1da177e4 LT |
145 | return -EIO; |
146 | ||
147 | if (addr < (addr_t) &dummy->regs.acrs) { | |
148 | /* | |
149 | * psw and gprs are stored on the stack | |
150 | */ | |
c7584fb6 | 151 | tmp = *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr); |
1da177e4 LT |
152 | if (addr == (addr_t) &dummy->regs.psw.mask) |
153 | /* Remove per bit from user psw. */ | |
154 | tmp &= ~PSW_MASK_PER; | |
155 | ||
156 | } else if (addr < (addr_t) &dummy->regs.orig_gpr2) { | |
157 | /* | |
158 | * access registers are stored in the thread structure | |
159 | */ | |
160 | offset = addr - (addr_t) &dummy->regs.acrs; | |
347a8dc3 | 161 | #ifdef CONFIG_64BIT |
778959db MS |
162 | /* |
163 | * Very special case: old & broken 64 bit gdb reading | |
164 | * from acrs[15]. Result is a 64 bit value. Read the | |
165 | * 32 bit acrs[15] value and shift it by 32. Sick... | |
166 | */ | |
167 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
168 | tmp = ((unsigned long) child->thread.acrs[15]) << 32; | |
169 | else | |
170 | #endif | |
1da177e4 LT |
171 | tmp = *(addr_t *)((addr_t) &child->thread.acrs + offset); |
172 | ||
173 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
174 | /* | |
175 | * orig_gpr2 is stored on the kernel stack | |
176 | */ | |
c7584fb6 | 177 | tmp = (addr_t) task_pt_regs(child)->orig_gpr2; |
1da177e4 LT |
178 | |
179 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { | |
180 | /* | |
181 | * floating point regs. are stored in the thread structure | |
182 | */ | |
183 | offset = addr - (addr_t) &dummy->regs.fp_regs; | |
184 | tmp = *(addr_t *)((addr_t) &child->thread.fp_regs + offset); | |
778959db MS |
185 | if (addr == (addr_t) &dummy->regs.fp_regs.fpc) |
186 | tmp &= (unsigned long) FPC_VALID_MASK | |
187 | << (BITS_PER_LONG - 32); | |
1da177e4 LT |
188 | |
189 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
190 | /* | |
191 | * per_info is found in the thread structure | |
192 | */ | |
193 | offset = addr - (addr_t) &dummy->regs.per_info; | |
194 | tmp = *(addr_t *)((addr_t) &child->thread.per_info + offset); | |
195 | ||
196 | } else | |
197 | tmp = 0; | |
198 | ||
199 | return put_user(tmp, (addr_t __user *) data); | |
200 | } | |
201 | ||
202 | /* | |
203 | * Write a word to the user area of a process at location addr. This | |
204 | * operation does have an additional problem compared to peek_user. | |
205 | * Stores to the program status word and on the floating point | |
206 | * control register needs to get checked for validity. | |
207 | */ | |
208 | static int | |
209 | poke_user(struct task_struct *child, addr_t addr, addr_t data) | |
210 | { | |
211 | struct user *dummy = NULL; | |
778959db | 212 | addr_t offset, mask; |
1da177e4 LT |
213 | |
214 | /* | |
215 | * Stupid gdb peeks/pokes the access registers in 64 bit with | |
216 | * an alignment of 4. Programmers from hell indeed... | |
217 | */ | |
778959db | 218 | mask = __ADDR_MASK; |
347a8dc3 | 219 | #ifdef CONFIG_64BIT |
778959db MS |
220 | if (addr >= (addr_t) &dummy->regs.acrs && |
221 | addr < (addr_t) &dummy->regs.orig_gpr2) | |
222 | mask = 3; | |
223 | #endif | |
224 | if ((addr & mask) || addr > sizeof(struct user) - __ADDR_MASK) | |
1da177e4 LT |
225 | return -EIO; |
226 | ||
227 | if (addr < (addr_t) &dummy->regs.acrs) { | |
228 | /* | |
229 | * psw and gprs are stored on the stack | |
230 | */ | |
231 | if (addr == (addr_t) &dummy->regs.psw.mask && | |
347a8dc3 | 232 | #ifdef CONFIG_COMPAT |
c1821c2e | 233 | data != PSW_MASK_MERGE(psw_user32_bits, data) && |
1da177e4 | 234 | #endif |
c1821c2e | 235 | data != PSW_MASK_MERGE(psw_user_bits, data)) |
1da177e4 LT |
236 | /* Invalid psw mask. */ |
237 | return -EINVAL; | |
347a8dc3 | 238 | #ifndef CONFIG_64BIT |
1da177e4 LT |
239 | if (addr == (addr_t) &dummy->regs.psw.addr) |
240 | /* I'd like to reject addresses without the | |
241 | high order bit but older gdb's rely on it */ | |
242 | data |= PSW_ADDR_AMODE; | |
243 | #endif | |
c7584fb6 | 244 | *(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data; |
1da177e4 LT |
245 | |
246 | } else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) { | |
247 | /* | |
248 | * access registers are stored in the thread structure | |
249 | */ | |
250 | offset = addr - (addr_t) &dummy->regs.acrs; | |
347a8dc3 | 251 | #ifdef CONFIG_64BIT |
778959db MS |
252 | /* |
253 | * Very special case: old & broken 64 bit gdb writing | |
254 | * to acrs[15] with a 64 bit value. Ignore the lower | |
255 | * half of the value and write the upper 32 bit to | |
256 | * acrs[15]. Sick... | |
257 | */ | |
258 | if (addr == (addr_t) &dummy->regs.acrs[15]) | |
259 | child->thread.acrs[15] = (unsigned int) (data >> 32); | |
260 | else | |
261 | #endif | |
1da177e4 LT |
262 | *(addr_t *)((addr_t) &child->thread.acrs + offset) = data; |
263 | ||
264 | } else if (addr == (addr_t) &dummy->regs.orig_gpr2) { | |
265 | /* | |
266 | * orig_gpr2 is stored on the kernel stack | |
267 | */ | |
c7584fb6 | 268 | task_pt_regs(child)->orig_gpr2 = data; |
1da177e4 LT |
269 | |
270 | } else if (addr < (addr_t) (&dummy->regs.fp_regs + 1)) { | |
271 | /* | |
272 | * floating point regs. are stored in the thread structure | |
273 | */ | |
274 | if (addr == (addr_t) &dummy->regs.fp_regs.fpc && | |
778959db MS |
275 | (data & ~((unsigned long) FPC_VALID_MASK |
276 | << (BITS_PER_LONG - 32))) != 0) | |
1da177e4 LT |
277 | return -EINVAL; |
278 | offset = addr - (addr_t) &dummy->regs.fp_regs; | |
279 | *(addr_t *)((addr_t) &child->thread.fp_regs + offset) = data; | |
280 | ||
281 | } else if (addr < (addr_t) (&dummy->regs.per_info + 1)) { | |
282 | /* | |
283 | * per_info is found in the thread structure | |
284 | */ | |
285 | offset = addr - (addr_t) &dummy->regs.per_info; | |
286 | *(addr_t *)((addr_t) &child->thread.per_info + offset) = data; | |
287 | ||
288 | } | |
289 | ||
290 | FixPerRegisters(child); | |
291 | return 0; | |
292 | } | |
293 | ||
294 | static int | |
295 | do_ptrace_normal(struct task_struct *child, long request, long addr, long data) | |
296 | { | |
1da177e4 LT |
297 | ptrace_area parea; |
298 | int copied, ret; | |
299 | ||
300 | switch (request) { | |
301 | case PTRACE_PEEKTEXT: | |
302 | case PTRACE_PEEKDATA: | |
303 | /* Remove high order bit from address (only for 31 bit). */ | |
304 | addr &= PSW_ADDR_INSN; | |
305 | /* read word at location addr. */ | |
76647323 | 306 | return generic_ptrace_peekdata(child, addr, data); |
1da177e4 LT |
307 | |
308 | case PTRACE_PEEKUSR: | |
309 | /* read the word at location addr in the USER area. */ | |
310 | return peek_user(child, addr, data); | |
311 | ||
312 | case PTRACE_POKETEXT: | |
313 | case PTRACE_POKEDATA: | |
314 | /* Remove high order bit from address (only for 31 bit). */ | |
315 | addr &= PSW_ADDR_INSN; | |
316 | /* write the word at location addr. */ | |
f284ce72 | 317 | return generic_ptrace_pokedata(child, addr, data); |
1da177e4 LT |
318 | |
319 | case PTRACE_POKEUSR: | |
320 | /* write the word at location addr in the USER area */ | |
321 | return poke_user(child, addr, data); | |
322 | ||
323 | case PTRACE_PEEKUSR_AREA: | |
324 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 325 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
326 | sizeof(parea))) |
327 | return -EFAULT; | |
328 | addr = parea.kernel_addr; | |
329 | data = parea.process_addr; | |
330 | copied = 0; | |
331 | while (copied < parea.len) { | |
332 | if (request == PTRACE_PEEKUSR_AREA) | |
333 | ret = peek_user(child, addr, data); | |
334 | else { | |
2b67fc46 HC |
335 | addr_t utmp; |
336 | if (get_user(utmp, | |
337 | (addr_t __force __user *) data)) | |
1da177e4 | 338 | return -EFAULT; |
2b67fc46 | 339 | ret = poke_user(child, addr, utmp); |
1da177e4 LT |
340 | } |
341 | if (ret) | |
342 | return ret; | |
343 | addr += sizeof(unsigned long); | |
344 | data += sizeof(unsigned long); | |
345 | copied += sizeof(unsigned long); | |
346 | } | |
347 | return 0; | |
348 | } | |
349 | return ptrace_request(child, request, addr, data); | |
350 | } | |
351 | ||
347a8dc3 | 352 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
353 | /* |
354 | * Now the fun part starts... a 31 bit program running in the | |
355 | * 31 bit emulation tracing another program. PTRACE_PEEKTEXT, | |
356 | * PTRACE_PEEKDATA, PTRACE_POKETEXT and PTRACE_POKEDATA are easy | |
357 | * to handle, the difference to the 64 bit versions of the requests | |
358 | * is that the access is done in multiples of 4 byte instead of | |
359 | * 8 bytes (sizeof(unsigned long) on 31/64 bit). | |
360 | * The ugly part are PTRACE_PEEKUSR, PTRACE_PEEKUSR_AREA, | |
361 | * PTRACE_POKEUSR and PTRACE_POKEUSR_AREA. If the traced program | |
362 | * is a 31 bit program too, the content of struct user can be | |
363 | * emulated. A 31 bit program peeking into the struct user of | |
364 | * a 64 bit program is a no-no. | |
365 | */ | |
366 | ||
367 | /* | |
368 | * Same as peek_user but for a 31 bit program. | |
369 | */ | |
370 | static int | |
371 | peek_user_emu31(struct task_struct *child, addr_t addr, addr_t data) | |
372 | { | |
373 | struct user32 *dummy32 = NULL; | |
374 | per_struct32 *dummy_per32 = NULL; | |
375 | addr_t offset; | |
376 | __u32 tmp; | |
377 | ||
378 | if (!test_thread_flag(TIF_31BIT) || | |
379 | (addr & 3) || addr > sizeof(struct user) - 3) | |
380 | return -EIO; | |
381 | ||
382 | if (addr < (addr_t) &dummy32->regs.acrs) { | |
383 | /* | |
384 | * psw and gprs are stored on the stack | |
385 | */ | |
386 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
387 | /* Fake a 31 bit psw mask. */ | |
c7584fb6 | 388 | tmp = (__u32)(task_pt_regs(child)->psw.mask >> 32); |
c1821c2e | 389 | tmp = PSW32_MASK_MERGE(psw32_user_bits, tmp); |
1da177e4 LT |
390 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
391 | /* Fake a 31 bit psw address. */ | |
c7584fb6 | 392 | tmp = (__u32) task_pt_regs(child)->psw.addr | |
1da177e4 LT |
393 | PSW32_ADDR_AMODE31; |
394 | } else { | |
395 | /* gpr 0-15 */ | |
c7584fb6 | 396 | tmp = *(__u32 *)((addr_t) &task_pt_regs(child)->psw + |
1da177e4 LT |
397 | addr*2 + 4); |
398 | } | |
399 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
400 | /* | |
401 | * access registers are stored in the thread structure | |
402 | */ | |
403 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
404 | tmp = *(__u32*)((addr_t) &child->thread.acrs + offset); | |
405 | ||
406 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
407 | /* | |
408 | * orig_gpr2 is stored on the kernel stack | |
409 | */ | |
c7584fb6 | 410 | tmp = *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4); |
1da177e4 LT |
411 | |
412 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { | |
413 | /* | |
414 | * floating point regs. are stored in the thread structure | |
415 | */ | |
416 | offset = addr - (addr_t) &dummy32->regs.fp_regs; | |
417 | tmp = *(__u32 *)((addr_t) &child->thread.fp_regs + offset); | |
418 | ||
419 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
420 | /* | |
421 | * per_info is found in the thread structure | |
422 | */ | |
423 | offset = addr - (addr_t) &dummy32->regs.per_info; | |
424 | /* This is magic. See per_struct and per_struct32. */ | |
425 | if ((offset >= (addr_t) &dummy_per32->control_regs && | |
426 | offset < (addr_t) (&dummy_per32->control_regs + 1)) || | |
427 | (offset >= (addr_t) &dummy_per32->starting_addr && | |
428 | offset <= (addr_t) &dummy_per32->ending_addr) || | |
429 | offset == (addr_t) &dummy_per32->lowcore.words.address) | |
430 | offset = offset*2 + 4; | |
431 | else | |
432 | offset = offset*2; | |
433 | tmp = *(__u32 *)((addr_t) &child->thread.per_info + offset); | |
434 | ||
435 | } else | |
436 | tmp = 0; | |
437 | ||
438 | return put_user(tmp, (__u32 __user *) data); | |
439 | } | |
440 | ||
441 | /* | |
442 | * Same as poke_user but for a 31 bit program. | |
443 | */ | |
444 | static int | |
445 | poke_user_emu31(struct task_struct *child, addr_t addr, addr_t data) | |
446 | { | |
447 | struct user32 *dummy32 = NULL; | |
448 | per_struct32 *dummy_per32 = NULL; | |
449 | addr_t offset; | |
450 | __u32 tmp; | |
451 | ||
452 | if (!test_thread_flag(TIF_31BIT) || | |
453 | (addr & 3) || addr > sizeof(struct user32) - 3) | |
454 | return -EIO; | |
455 | ||
456 | tmp = (__u32) data; | |
457 | ||
458 | if (addr < (addr_t) &dummy32->regs.acrs) { | |
459 | /* | |
460 | * psw, gprs, acrs and orig_gpr2 are stored on the stack | |
461 | */ | |
462 | if (addr == (addr_t) &dummy32->regs.psw.mask) { | |
463 | /* Build a 64 bit psw mask from 31 bit mask. */ | |
c1821c2e | 464 | if (tmp != PSW32_MASK_MERGE(psw32_user_bits, tmp)) |
1da177e4 LT |
465 | /* Invalid psw mask. */ |
466 | return -EINVAL; | |
c7584fb6 | 467 | task_pt_regs(child)->psw.mask = |
c1821c2e | 468 | PSW_MASK_MERGE(psw_user32_bits, (__u64) tmp << 32); |
1da177e4 LT |
469 | } else if (addr == (addr_t) &dummy32->regs.psw.addr) { |
470 | /* Build a 64 bit psw address from 31 bit address. */ | |
c7584fb6 | 471 | task_pt_regs(child)->psw.addr = |
1da177e4 LT |
472 | (__u64) tmp & PSW32_ADDR_INSN; |
473 | } else { | |
474 | /* gpr 0-15 */ | |
c7584fb6 | 475 | *(__u32*)((addr_t) &task_pt_regs(child)->psw |
1da177e4 LT |
476 | + addr*2 + 4) = tmp; |
477 | } | |
478 | } else if (addr < (addr_t) (&dummy32->regs.orig_gpr2)) { | |
479 | /* | |
480 | * access registers are stored in the thread structure | |
481 | */ | |
482 | offset = addr - (addr_t) &dummy32->regs.acrs; | |
483 | *(__u32*)((addr_t) &child->thread.acrs + offset) = tmp; | |
484 | ||
485 | } else if (addr == (addr_t) (&dummy32->regs.orig_gpr2)) { | |
486 | /* | |
487 | * orig_gpr2 is stored on the kernel stack | |
488 | */ | |
c7584fb6 | 489 | *(__u32*)((addr_t) &task_pt_regs(child)->orig_gpr2 + 4) = tmp; |
1da177e4 LT |
490 | |
491 | } else if (addr < (addr_t) (&dummy32->regs.fp_regs + 1)) { | |
492 | /* | |
493 | * floating point regs. are stored in the thread structure | |
494 | */ | |
495 | if (addr == (addr_t) &dummy32->regs.fp_regs.fpc && | |
496 | (tmp & ~FPC_VALID_MASK) != 0) | |
497 | /* Invalid floating point control. */ | |
498 | return -EINVAL; | |
499 | offset = addr - (addr_t) &dummy32->regs.fp_regs; | |
500 | *(__u32 *)((addr_t) &child->thread.fp_regs + offset) = tmp; | |
501 | ||
502 | } else if (addr < (addr_t) (&dummy32->regs.per_info + 1)) { | |
503 | /* | |
504 | * per_info is found in the thread structure. | |
505 | */ | |
506 | offset = addr - (addr_t) &dummy32->regs.per_info; | |
507 | /* | |
508 | * This is magic. See per_struct and per_struct32. | |
509 | * By incident the offsets in per_struct are exactly | |
510 | * twice the offsets in per_struct32 for all fields. | |
511 | * The 8 byte fields need special handling though, | |
512 | * because the second half (bytes 4-7) is needed and | |
513 | * not the first half. | |
514 | */ | |
515 | if ((offset >= (addr_t) &dummy_per32->control_regs && | |
516 | offset < (addr_t) (&dummy_per32->control_regs + 1)) || | |
517 | (offset >= (addr_t) &dummy_per32->starting_addr && | |
518 | offset <= (addr_t) &dummy_per32->ending_addr) || | |
519 | offset == (addr_t) &dummy_per32->lowcore.words.address) | |
520 | offset = offset*2 + 4; | |
521 | else | |
522 | offset = offset*2; | |
523 | *(__u32 *)((addr_t) &child->thread.per_info + offset) = tmp; | |
524 | ||
525 | } | |
526 | ||
527 | FixPerRegisters(child); | |
528 | return 0; | |
529 | } | |
530 | ||
531 | static int | |
532 | do_ptrace_emu31(struct task_struct *child, long request, long addr, long data) | |
533 | { | |
534 | unsigned int tmp; /* 4 bytes !! */ | |
535 | ptrace_area_emu31 parea; | |
536 | int copied, ret; | |
537 | ||
538 | switch (request) { | |
539 | case PTRACE_PEEKTEXT: | |
540 | case PTRACE_PEEKDATA: | |
541 | /* read word at location addr. */ | |
542 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0); | |
543 | if (copied != sizeof(tmp)) | |
544 | return -EIO; | |
2b67fc46 | 545 | return put_user(tmp, (unsigned int __force __user *) data); |
1da177e4 LT |
546 | |
547 | case PTRACE_PEEKUSR: | |
548 | /* read the word at location addr in the USER area. */ | |
549 | return peek_user_emu31(child, addr, data); | |
550 | ||
551 | case PTRACE_POKETEXT: | |
552 | case PTRACE_POKEDATA: | |
553 | /* write the word at location addr. */ | |
554 | tmp = data; | |
555 | copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 1); | |
556 | if (copied != sizeof(tmp)) | |
557 | return -EIO; | |
558 | return 0; | |
559 | ||
560 | case PTRACE_POKEUSR: | |
561 | /* write the word at location addr in the USER area */ | |
562 | return poke_user_emu31(child, addr, data); | |
563 | ||
564 | case PTRACE_PEEKUSR_AREA: | |
565 | case PTRACE_POKEUSR_AREA: | |
2b67fc46 | 566 | if (copy_from_user(&parea, (void __force __user *) addr, |
1da177e4 LT |
567 | sizeof(parea))) |
568 | return -EFAULT; | |
569 | addr = parea.kernel_addr; | |
570 | data = parea.process_addr; | |
571 | copied = 0; | |
572 | while (copied < parea.len) { | |
573 | if (request == PTRACE_PEEKUSR_AREA) | |
574 | ret = peek_user_emu31(child, addr, data); | |
575 | else { | |
2b67fc46 HC |
576 | __u32 utmp; |
577 | if (get_user(utmp, | |
578 | (__u32 __force __user *) data)) | |
1da177e4 | 579 | return -EFAULT; |
2b67fc46 | 580 | ret = poke_user_emu31(child, addr, utmp); |
1da177e4 LT |
581 | } |
582 | if (ret) | |
583 | return ret; | |
584 | addr += sizeof(unsigned int); | |
585 | data += sizeof(unsigned int); | |
586 | copied += sizeof(unsigned int); | |
587 | } | |
588 | return 0; | |
589 | case PTRACE_GETEVENTMSG: | |
590 | return put_user((__u32) child->ptrace_message, | |
2b67fc46 | 591 | (unsigned int __force __user *) data); |
1da177e4 LT |
592 | case PTRACE_GETSIGINFO: |
593 | if (child->last_siginfo == NULL) | |
594 | return -EINVAL; | |
2b67fc46 HC |
595 | return copy_siginfo_to_user32((compat_siginfo_t |
596 | __force __user *) data, | |
1da177e4 LT |
597 | child->last_siginfo); |
598 | case PTRACE_SETSIGINFO: | |
599 | if (child->last_siginfo == NULL) | |
600 | return -EINVAL; | |
601 | return copy_siginfo_from_user32(child->last_siginfo, | |
2b67fc46 HC |
602 | (compat_siginfo_t |
603 | __force __user *) data); | |
1da177e4 LT |
604 | } |
605 | return ptrace_request(child, request, addr, data); | |
606 | } | |
607 | #endif | |
608 | ||
609 | #define PT32_IEEE_IP 0x13c | |
610 | ||
611 | static int | |
612 | do_ptrace(struct task_struct *child, long request, long addr, long data) | |
613 | { | |
614 | int ret; | |
615 | ||
616 | if (request == PTRACE_ATTACH) | |
617 | return ptrace_attach(child); | |
618 | ||
619 | /* | |
620 | * Special cases to get/store the ieee instructions pointer. | |
621 | */ | |
622 | if (child == current) { | |
623 | if (request == PTRACE_PEEKUSR && addr == PT_IEEE_IP) | |
624 | return peek_user(child, addr, data); | |
625 | if (request == PTRACE_POKEUSR && addr == PT_IEEE_IP) | |
626 | return poke_user(child, addr, data); | |
347a8dc3 | 627 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
628 | if (request == PTRACE_PEEKUSR && |
629 | addr == PT32_IEEE_IP && test_thread_flag(TIF_31BIT)) | |
630 | return peek_user_emu31(child, addr, data); | |
631 | if (request == PTRACE_POKEUSR && | |
632 | addr == PT32_IEEE_IP && test_thread_flag(TIF_31BIT)) | |
633 | return poke_user_emu31(child, addr, data); | |
634 | #endif | |
635 | } | |
636 | ||
637 | ret = ptrace_check_attach(child, request == PTRACE_KILL); | |
638 | if (ret < 0) | |
639 | return ret; | |
640 | ||
641 | switch (request) { | |
642 | case PTRACE_SYSCALL: | |
643 | /* continue and stop at next (return from) syscall */ | |
644 | case PTRACE_CONT: | |
645 | /* restart after signal. */ | |
7ed20e1a | 646 | if (!valid_signal(data)) |
1da177e4 LT |
647 | return -EIO; |
648 | if (request == PTRACE_SYSCALL) | |
649 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
650 | else | |
651 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
652 | child->exit_code = data; | |
653 | /* make sure the single step bit is not set. */ | |
654 | clear_single_step(child); | |
655 | wake_up_process(child); | |
656 | return 0; | |
657 | ||
658 | case PTRACE_KILL: | |
659 | /* | |
660 | * make the child exit. Best I can do is send it a sigkill. | |
661 | * perhaps it should be put in the status that it wants to | |
662 | * exit. | |
663 | */ | |
664 | if (child->exit_state == EXIT_ZOMBIE) /* already dead */ | |
665 | return 0; | |
666 | child->exit_code = SIGKILL; | |
667 | /* make sure the single step bit is not set. */ | |
668 | clear_single_step(child); | |
669 | wake_up_process(child); | |
670 | return 0; | |
671 | ||
672 | case PTRACE_SINGLESTEP: | |
673 | /* set the trap flag. */ | |
7ed20e1a | 674 | if (!valid_signal(data)) |
1da177e4 LT |
675 | return -EIO; |
676 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
677 | child->exit_code = data; | |
678 | if (data) | |
679 | set_tsk_thread_flag(child, TIF_SINGLE_STEP); | |
680 | else | |
681 | set_single_step(child); | |
682 | /* give it a chance to run. */ | |
683 | wake_up_process(child); | |
684 | return 0; | |
685 | ||
1da177e4 LT |
686 | /* Do requests that differ for 31/64 bit */ |
687 | default: | |
347a8dc3 | 688 | #ifdef CONFIG_COMPAT |
1da177e4 LT |
689 | if (test_thread_flag(TIF_31BIT)) |
690 | return do_ptrace_emu31(child, request, addr, data); | |
691 | #endif | |
692 | return do_ptrace_normal(child, request, addr, data); | |
693 | } | |
694 | /* Not reached. */ | |
695 | return -EIO; | |
696 | } | |
697 | ||
698 | asmlinkage long | |
699 | sys_ptrace(long request, long pid, long addr, long data) | |
700 | { | |
701 | struct task_struct *child; | |
702 | int ret; | |
703 | ||
704 | lock_kernel(); | |
1da177e4 | 705 | if (request == PTRACE_TRACEME) { |
6b9c7ed8 CH |
706 | ret = ptrace_traceme(); |
707 | goto out; | |
1da177e4 LT |
708 | } |
709 | ||
6b9c7ed8 CH |
710 | child = ptrace_get_task_struct(pid); |
711 | if (IS_ERR(child)) { | |
712 | ret = PTR_ERR(child); | |
1da177e4 | 713 | goto out; |
6b9c7ed8 | 714 | } |
1da177e4 LT |
715 | |
716 | ret = do_ptrace(child, request, addr, data); | |
1da177e4 LT |
717 | put_task_struct(child); |
718 | out: | |
719 | unlock_kernel(); | |
720 | return ret; | |
721 | } | |
722 | ||
723 | asmlinkage void | |
724 | syscall_trace(struct pt_regs *regs, int entryexit) | |
725 | { | |
2fd6f58b | 726 | if (unlikely(current->audit_context) && entryexit) |
5411be59 | 727 | audit_syscall_exit(AUDITSC_RESULT(regs->gprs[2]), regs->gprs[2]); |
2fd6f58b | 728 | |
1da177e4 | 729 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) |
2fd6f58b | 730 | goto out; |
1da177e4 | 731 | if (!(current->ptrace & PT_PTRACED)) |
2fd6f58b | 732 | goto out; |
1da177e4 LT |
733 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) |
734 | ? 0x80 : 0)); | |
735 | ||
c5c3a6d8 BS |
736 | /* |
737 | * If the debuffer has set an invalid system call number, | |
738 | * we prepare to skip the system call restart handling. | |
739 | */ | |
740 | if (!entryexit && regs->gprs[2] >= NR_syscalls) | |
741 | regs->trap = -1; | |
742 | ||
1da177e4 LT |
743 | /* |
744 | * this isn't the same as continuing with a signal, but it will do | |
745 | * for normal use. strace only continues with a signal if the | |
746 | * stopping signal is not SIGTRAP. -brl | |
747 | */ | |
748 | if (current->exit_code) { | |
749 | send_sig(current->exit_code, current, 1); | |
750 | current->exit_code = 0; | |
751 | } | |
2fd6f58b | 752 | out: |
753 | if (unlikely(current->audit_context) && !entryexit) | |
5411be59 | 754 | audit_syscall_entry(test_thread_flag(TIF_31BIT)?AUDIT_ARCH_S390:AUDIT_ARCH_S390X, |
2fd6f58b | 755 | regs->gprs[2], regs->orig_gpr2, regs->gprs[3], |
756 | regs->gprs[4], regs->gprs[5]); | |
1da177e4 | 757 | } |