Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
395d31d4 | 2 | /* |
395d31d4 MS |
3 | * Copyright IBM Corp. 2008 |
4 | * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com) | |
5 | */ | |
6 | ||
7 | #define KMSG_COMPONENT "cpu" | |
8 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | |
9 | ||
4ecf0a43 | 10 | #include <linux/stop_machine.h> |
157467ba | 11 | #include <linux/bitops.h> |
395d31d4 | 12 | #include <linux/kernel.h> |
f17a6d5d | 13 | #include <linux/random.h> |
68e21be2 | 14 | #include <linux/sched/mm.h> |
395d31d4 | 15 | #include <linux/init.h> |
395d31d4 | 16 | #include <linux/seq_file.h> |
589ee628 | 17 | #include <linux/mm_types.h> |
395d31d4 | 18 | #include <linux/delay.h> |
19726cec | 19 | #include <linux/cpu.h> |
68e21be2 | 20 | |
1ec2772e | 21 | #include <asm/diag.h> |
097a116c | 22 | #include <asm/facility.h> |
395d31d4 MS |
23 | #include <asm/elf.h> |
24 | #include <asm/lowcore.h> | |
25 | #include <asm/param.h> | |
f17a6d5d | 26 | #include <asm/sclp.h> |
4d92f502 | 27 | #include <asm/smp.h> |
395d31d4 | 28 | |
f17a6d5d HC |
29 | unsigned long __read_mostly elf_hwcap; |
30 | char elf_platform[ELF_PLATFORM_SIZE]; | |
31 | ||
097a116c HC |
32 | struct cpu_info { |
33 | unsigned int cpu_mhz_dynamic; | |
34 | unsigned int cpu_mhz_static; | |
35 | struct cpuid cpu_id; | |
36 | }; | |
37 | ||
38 | static DEFINE_PER_CPU(struct cpu_info, cpu_info); | |
38f2c691 | 39 | static DEFINE_PER_CPU(int, cpu_relax_retry); |
097a116c HC |
40 | |
41 | static bool machine_has_cpu_mhz; | |
42 | ||
43 | void __init cpu_detect_mhz_feature(void) | |
44 | { | |
45 | if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL) | |
970ba6ac | 46 | machine_has_cpu_mhz = true; |
097a116c HC |
47 | } |
48 | ||
49 | static void update_cpu_mhz(void *arg) | |
50 | { | |
51 | unsigned long mhz; | |
52 | struct cpu_info *c; | |
53 | ||
54 | mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0); | |
55 | c = this_cpu_ptr(&cpu_info); | |
56 | c->cpu_mhz_dynamic = mhz >> 32; | |
57 | c->cpu_mhz_static = mhz & 0xffffffff; | |
58 | } | |
59 | ||
60 | void s390_update_cpu_mhz(void) | |
61 | { | |
62 | s390_adjust_jiffies(); | |
63 | if (machine_has_cpu_mhz) | |
64 | on_each_cpu(update_cpu_mhz, NULL, 0); | |
65 | } | |
94038a99 | 66 | |
4ecf0a43 | 67 | void notrace stop_machine_yield(const struct cpumask *cpumask) |
4d92f502 | 68 | { |
38f2c691 MS |
69 | int cpu, this_cpu; |
70 | ||
71 | this_cpu = smp_processor_id(); | |
72 | if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) { | |
73 | __this_cpu_write(cpu_relax_retry, 0); | |
74 | cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false); | |
75 | if (cpu >= nr_cpu_ids) | |
76 | return; | |
77 | if (arch_vcpu_is_preempted(cpu)) | |
78 | smp_yield_cpu(cpu); | |
1ec2772e | 79 | } |
4d92f502 | 80 | } |
4d92f502 | 81 | |
94038a99 MS |
82 | /* |
83 | * cpu_init - initializes state that is per-CPU. | |
84 | */ | |
e2741f17 | 85 | void cpu_init(void) |
94038a99 | 86 | { |
097a116c | 87 | struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id); |
94038a99 MS |
88 | |
89 | get_cpu_id(id); | |
097a116c HC |
90 | if (machine_has_cpu_mhz) |
91 | update_cpu_mhz(NULL); | |
f1f10076 | 92 | mmgrab(&init_mm); |
94038a99 MS |
93 | current->active_mm = &init_mm; |
94 | BUG_ON(current->mm); | |
95 | enter_lazy_tlb(&init_mm, current); | |
96 | } | |
97 | ||
157467ba HC |
98 | static void show_facilities(struct seq_file *m) |
99 | { | |
100 | unsigned int bit; | |
157467ba | 101 | |
157467ba | 102 | seq_puts(m, "facilities :"); |
17e89e13 | 103 | for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT) |
157467ba HC |
104 | seq_printf(m, " %d", bit); |
105 | seq_putc(m, '\n'); | |
106 | } | |
107 | ||
219a21b3 | 108 | static void show_cpu_summary(struct seq_file *m, void *v) |
395d31d4 | 109 | { |
fbf3c542 | 110 | static const char *hwcap_str[] = { |
95655495 HC |
111 | [HWCAP_NR_ESAN3] = "esan3", |
112 | [HWCAP_NR_ZARCH] = "zarch", | |
113 | [HWCAP_NR_STFLE] = "stfle", | |
114 | [HWCAP_NR_MSA] = "msa", | |
115 | [HWCAP_NR_LDISP] = "ldisp", | |
116 | [HWCAP_NR_EIMM] = "eimm", | |
117 | [HWCAP_NR_DFP] = "dfp", | |
118 | [HWCAP_NR_HPAGE] = "edat", | |
119 | [HWCAP_NR_ETF3EH] = "etf3eh", | |
120 | [HWCAP_NR_HIGH_GPRS] = "highgprs", | |
121 | [HWCAP_NR_TE] = "te", | |
122 | [HWCAP_NR_VXRS] = "vx", | |
123 | [HWCAP_NR_VXRS_BCD] = "vxd", | |
124 | [HWCAP_NR_VXRS_EXT] = "vxe", | |
125 | [HWCAP_NR_GS] = "gs", | |
126 | [HWCAP_NR_VXRS_EXT2] = "vxe2", | |
127 | [HWCAP_NR_VXRS_PDE] = "vxp", | |
128 | [HWCAP_NR_SORT] = "sort", | |
129 | [HWCAP_NR_DFLT] = "dflt", | |
130 | [HWCAP_NR_VXRS_PDE2] = "vxp2", | |
131 | [HWCAP_NR_NNPA] = "nnpa", | |
132 | [HWCAP_NR_PCI_MIO] = "pcimio", | |
7e82523f | 133 | [HWCAP_NR_SIE] = "sie", |
7f16d7e7 | 134 | }; |
219a21b3 HC |
135 | int i, cpu; |
136 | ||
c68d4632 | 137 | BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX); |
219a21b3 HC |
138 | seq_printf(m, "vendor_id : IBM/S390\n" |
139 | "# processors : %i\n" | |
140 | "bogomips per cpu: %lu.%02lu\n", | |
141 | num_online_cpus(), loops_per_jiffy/(500000/HZ), | |
142 | (loops_per_jiffy/(5000/HZ))%100); | |
10f4954a | 143 | seq_printf(m, "max thread id : %d\n", smp_cpu_mtid); |
219a21b3 HC |
144 | seq_puts(m, "features\t: "); |
145 | for (i = 0; i < ARRAY_SIZE(hwcap_str); i++) | |
146 | if (hwcap_str[i] && (elf_hwcap & (1UL << i))) | |
147 | seq_printf(m, "%s ", hwcap_str[i]); | |
219a21b3 | 148 | seq_puts(m, "\n"); |
157467ba | 149 | show_facilities(m); |
219a21b3 HC |
150 | show_cacheinfo(m); |
151 | for_each_online_cpu(cpu) { | |
097a116c | 152 | struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu); |
219a21b3 HC |
153 | |
154 | seq_printf(m, "processor %d: " | |
7b468488 MS |
155 | "version = %02X, " |
156 | "identification = %06X, " | |
157 | "machine = %04X\n", | |
219a21b3 | 158 | cpu, id->version, id->ident, id->machine); |
7b468488 | 159 | } |
219a21b3 HC |
160 | } |
161 | ||
f17a6d5d HC |
162 | static int __init setup_hwcaps(void) |
163 | { | |
251527c9 | 164 | /* instructions named N3, "backported" to esa-mode */ |
4efd417f | 165 | elf_hwcap |= HWCAP_ESAN3; |
251527c9 HC |
166 | |
167 | /* z/Architecture mode active */ | |
487dff56 | 168 | elf_hwcap |= HWCAP_ZARCH; |
251527c9 HC |
169 | |
170 | /* store-facility-list-extended */ | |
171 | if (test_facility(7)) | |
172 | elf_hwcap |= HWCAP_STFLE; | |
173 | ||
174 | /* message-security assist */ | |
175 | if (test_facility(17)) | |
176 | elf_hwcap |= HWCAP_MSA; | |
177 | ||
178 | /* long-displacement */ | |
179 | if (test_facility(19)) | |
180 | elf_hwcap |= HWCAP_LDISP; | |
181 | ||
182 | /* extended-immediate */ | |
4efd417f | 183 | elf_hwcap |= HWCAP_EIMM; |
f17a6d5d | 184 | |
449fbd71 | 185 | /* extended-translation facility 3 enhancement */ |
f17a6d5d HC |
186 | if (test_facility(22) && test_facility(30)) |
187 | elf_hwcap |= HWCAP_ETF3EH; | |
188 | ||
449fbd71 | 189 | /* decimal floating point & perform floating point operation */ |
98ac9169 | 190 | if (test_facility(42) && test_facility(44)) |
f17a6d5d HC |
191 | elf_hwcap |= HWCAP_DFP; |
192 | ||
449fbd71 | 193 | /* huge page support */ |
f17a6d5d HC |
194 | if (MACHINE_HAS_EDAT1) |
195 | elf_hwcap |= HWCAP_HPAGE; | |
196 | ||
449fbd71 | 197 | /* 64-bit register support for 31-bit processes */ |
f17a6d5d HC |
198 | elf_hwcap |= HWCAP_HIGH_GPRS; |
199 | ||
449fbd71 | 200 | /* transactional execution */ |
f17a6d5d HC |
201 | if (MACHINE_HAS_TE) |
202 | elf_hwcap |= HWCAP_TE; | |
203 | ||
18564756 HC |
204 | /* vector */ |
205 | if (test_facility(129)) { | |
f17a6d5d HC |
206 | elf_hwcap |= HWCAP_VXRS; |
207 | if (test_facility(134)) | |
208 | elf_hwcap |= HWCAP_VXRS_BCD; | |
209 | if (test_facility(135)) | |
210 | elf_hwcap |= HWCAP_VXRS_EXT; | |
211 | if (test_facility(148)) | |
212 | elf_hwcap |= HWCAP_VXRS_EXT2; | |
213 | if (test_facility(152)) | |
214 | elf_hwcap |= HWCAP_VXRS_PDE; | |
215 | if (test_facility(192)) | |
216 | elf_hwcap |= HWCAP_VXRS_PDE2; | |
217 | } | |
449fbd71 | 218 | |
f17a6d5d HC |
219 | if (test_facility(150)) |
220 | elf_hwcap |= HWCAP_SORT; | |
449fbd71 | 221 | |
f17a6d5d HC |
222 | if (test_facility(151)) |
223 | elf_hwcap |= HWCAP_DFLT; | |
449fbd71 | 224 | |
f17a6d5d HC |
225 | if (test_facility(165)) |
226 | elf_hwcap |= HWCAP_NNPA; | |
227 | ||
449fbd71 | 228 | /* guarded storage */ |
f17a6d5d HC |
229 | if (MACHINE_HAS_GS) |
230 | elf_hwcap |= HWCAP_GS; | |
449fbd71 | 231 | |
f17a6d5d HC |
232 | if (MACHINE_HAS_PCI_MIO) |
233 | elf_hwcap |= HWCAP_PCI_MIO; | |
234 | ||
449fbd71 | 235 | /* virtualization support */ |
873129ca | 236 | if (sclp.has_sief2) |
7e82523f | 237 | elf_hwcap |= HWCAP_SIE; |
873129ca HC |
238 | |
239 | return 0; | |
240 | } | |
241 | arch_initcall(setup_hwcaps); | |
242 | ||
243 | static int __init setup_elf_platform(void) | |
244 | { | |
245 | struct cpuid cpu_id; | |
246 | ||
f17a6d5d HC |
247 | get_cpu_id(&cpu_id); |
248 | add_device_randomness(&cpu_id, sizeof(cpu_id)); | |
249 | switch (cpu_id.machine) { | |
4efd417f | 250 | default: /* Use "z10" as default. */ |
f17a6d5d HC |
251 | strcpy(elf_platform, "z10"); |
252 | break; | |
253 | case 0x2817: | |
254 | case 0x2818: | |
255 | strcpy(elf_platform, "z196"); | |
256 | break; | |
257 | case 0x2827: | |
258 | case 0x2828: | |
259 | strcpy(elf_platform, "zEC12"); | |
260 | break; | |
261 | case 0x2964: | |
262 | case 0x2965: | |
263 | strcpy(elf_platform, "z13"); | |
264 | break; | |
265 | case 0x3906: | |
266 | case 0x3907: | |
267 | strcpy(elf_platform, "z14"); | |
268 | break; | |
269 | case 0x8561: | |
270 | case 0x8562: | |
271 | strcpy(elf_platform, "z15"); | |
272 | break; | |
6203ac30 HC |
273 | case 0x3931: |
274 | case 0x3932: | |
275 | strcpy(elf_platform, "z16"); | |
276 | break; | |
f17a6d5d | 277 | } |
f17a6d5d HC |
278 | return 0; |
279 | } | |
873129ca | 280 | arch_initcall(setup_elf_platform); |
f17a6d5d | 281 | |
fb835102 AG |
282 | static void show_cpu_topology(struct seq_file *m, unsigned long n) |
283 | { | |
284 | #ifdef CONFIG_SCHED_TOPOLOGY | |
285 | seq_printf(m, "physical id : %d\n", topology_physical_package_id(n)); | |
286 | seq_printf(m, "core id : %d\n", topology_core_id(n)); | |
287 | seq_printf(m, "book id : %d\n", topology_book_id(n)); | |
288 | seq_printf(m, "drawer id : %d\n", topology_drawer_id(n)); | |
289 | seq_printf(m, "dedicated : %d\n", topology_cpu_dedicated(n)); | |
42d211a1 | 290 | seq_printf(m, "address : %d\n", smp_cpu_get_cpu_address(n)); |
2db52dc3 | 291 | seq_printf(m, "siblings : %d\n", cpumask_weight(topology_core_cpumask(n))); |
95968497 | 292 | seq_printf(m, "cpu cores : %d\n", topology_booted_cores(n)); |
fb835102 AG |
293 | #endif /* CONFIG_SCHED_TOPOLOGY */ |
294 | } | |
295 | ||
296 | static void show_cpu_ids(struct seq_file *m, unsigned long n) | |
297 | { | |
298 | struct cpuid *id = &per_cpu(cpu_info.cpu_id, n); | |
299 | ||
300 | seq_printf(m, "version : %02X\n", id->version); | |
301 | seq_printf(m, "identification : %06X\n", id->ident); | |
302 | seq_printf(m, "machine : %04X\n", id->machine); | |
303 | } | |
304 | ||
097a116c HC |
305 | static void show_cpu_mhz(struct seq_file *m, unsigned long n) |
306 | { | |
307 | struct cpu_info *c = per_cpu_ptr(&cpu_info, n); | |
308 | ||
1b648dfd AG |
309 | if (!machine_has_cpu_mhz) |
310 | return; | |
097a116c HC |
311 | seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic); |
312 | seq_printf(m, "cpu MHz static : %d\n", c->cpu_mhz_static); | |
313 | } | |
314 | ||
219a21b3 HC |
315 | /* |
316 | * show_cpuinfo - Get information on one CPU for use by procfs. | |
317 | */ | |
318 | static int show_cpuinfo(struct seq_file *m, void *v) | |
319 | { | |
320 | unsigned long n = (unsigned long) v - 1; | |
872f2710 | 321 | unsigned long first = cpumask_first(cpu_online_mask); |
219a21b3 | 322 | |
872f2710 | 323 | if (n == first) |
219a21b3 | 324 | show_cpu_summary(m, v); |
109ab954 | 325 | seq_printf(m, "\ncpu number : %ld\n", n); |
fb835102 AG |
326 | show_cpu_topology(m, n); |
327 | show_cpu_ids(m, n); | |
097a116c | 328 | show_cpu_mhz(m, n); |
7b468488 | 329 | return 0; |
395d31d4 MS |
330 | } |
331 | ||
281eaa8c HC |
332 | static inline void *c_update(loff_t *pos) |
333 | { | |
334 | if (*pos) | |
335 | *pos = cpumask_next(*pos - 1, cpu_online_mask); | |
872f2710 AG |
336 | else |
337 | *pos = cpumask_first(cpu_online_mask); | |
281eaa8c HC |
338 | return *pos < nr_cpu_ids ? (void *)*pos + 1 : NULL; |
339 | } | |
340 | ||
395d31d4 MS |
341 | static void *c_start(struct seq_file *m, loff_t *pos) |
342 | { | |
a73de293 | 343 | cpus_read_lock(); |
281eaa8c | 344 | return c_update(pos); |
395d31d4 MS |
345 | } |
346 | ||
347 | static void *c_next(struct seq_file *m, void *v, loff_t *pos) | |
348 | { | |
349 | ++*pos; | |
281eaa8c | 350 | return c_update(pos); |
395d31d4 MS |
351 | } |
352 | ||
353 | static void c_stop(struct seq_file *m, void *v) | |
354 | { | |
a73de293 | 355 | cpus_read_unlock(); |
395d31d4 MS |
356 | } |
357 | ||
358 | const struct seq_operations cpuinfo_op = { | |
359 | .start = c_start, | |
360 | .next = c_next, | |
361 | .stop = c_stop, | |
362 | .show = show_cpuinfo, | |
363 | }; |