[linux-block.git] / arch / s390 / kernel / processor.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  Copyright IBM Corp. 2008
 *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
 */

#define KMSG_COMPONENT "cpu"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt

#include <linux/stop_machine.h>
#include <linux/cpufeature.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/random.h>
#include <linux/sched/mm.h>
#include <linux/init.h>
#include <linux/seq_file.h>
#include <linux/mm_types.h>
#include <linux/delay.h>
#include <linux/cpu.h>

#include <asm/diag.h>
#include <asm/facility.h>
#include <asm/elf.h>
#include <asm/lowcore.h>
#include <asm/param.h>
#include <asm/sclp.h>
#include <asm/smp.h>

unsigned long __read_mostly elf_hwcap;
char elf_platform[ELF_PLATFORM_SIZE];

struct cpu_info {
	unsigned int cpu_mhz_dynamic;
	unsigned int cpu_mhz_static;
	struct cpuid cpu_id;
};

static DEFINE_PER_CPU(struct cpu_info, cpu_info);
static DEFINE_PER_CPU(int, cpu_relax_retry);

static bool machine_has_cpu_mhz;

void __init cpu_detect_mhz_feature(void)
{
	if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL)
		machine_has_cpu_mhz = true;
}

static void update_cpu_mhz(void *arg)
{
	unsigned long mhz;
	struct cpu_info *c;

	mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
	c = this_cpu_ptr(&cpu_info);
	c->cpu_mhz_dynamic = mhz >> 32;
	c->cpu_mhz_static = mhz & 0xffffffff;
}

void s390_update_cpu_mhz(void)
{
	s390_adjust_jiffies();
	if (machine_has_cpu_mhz)
		on_each_cpu(update_cpu_mhz, NULL, 0);
}

void notrace stop_machine_yield(const struct cpumask *cpumask)
{
	int cpu, this_cpu;

	this_cpu = smp_processor_id();
	if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) {
		__this_cpu_write(cpu_relax_retry, 0);
		cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false);
		if (cpu >= nr_cpu_ids)
			return;
		if (arch_vcpu_is_preempted(cpu))
			smp_yield_cpu(cpu);
	}
}

/*
 * cpu_init - initializes state that is per-CPU.
 */
void cpu_init(void)
{
	struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id);

	get_cpu_id(id);
	if (machine_has_cpu_mhz)
		update_cpu_mhz(NULL);
	mmgrab(&init_mm);
	current->active_mm = &init_mm;
	BUG_ON(current->mm);
	enter_lazy_tlb(&init_mm, current);
}

/*
 * cpu_have_feature - Test CPU features on module initialization
 */
int cpu_have_feature(unsigned int num)
{
	return elf_hwcap & (1UL << num);
}
EXPORT_SYMBOL(cpu_have_feature);

static void show_facilities(struct seq_file *m)
{
	unsigned int bit;

	seq_puts(m, "facilities      :");
	for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT)
		seq_printf(m, " %d", bit);
	seq_putc(m, '\n');
}

static void show_cpu_summary(struct seq_file *m, void *v)
{
	static const char *hwcap_str[] = {
		[HWCAP_NR_ESAN3]	= "esan3",
		[HWCAP_NR_ZARCH]	= "zarch",
		[HWCAP_NR_STFLE]	= "stfle",
		[HWCAP_NR_MSA]		= "msa",
		[HWCAP_NR_LDISP]	= "ldisp",
		[HWCAP_NR_EIMM]		= "eimm",
		[HWCAP_NR_DFP]		= "dfp",
		[HWCAP_NR_HPAGE]	= "edat",
		[HWCAP_NR_ETF3EH]	= "etf3eh",
		[HWCAP_NR_HIGH_GPRS]	= "highgprs",
		[HWCAP_NR_TE]		= "te",
		[HWCAP_NR_VXRS]		= "vx",
		[HWCAP_NR_VXRS_BCD]	= "vxd",
		[HWCAP_NR_VXRS_EXT]	= "vxe",
		[HWCAP_NR_GS]		= "gs",
		[HWCAP_NR_VXRS_EXT2]	= "vxe2",
		[HWCAP_NR_VXRS_PDE]	= "vxp",
		[HWCAP_NR_SORT]		= "sort",
		[HWCAP_NR_DFLT]		= "dflt",
		[HWCAP_NR_VXRS_PDE2]	= "vxp2",
		[HWCAP_NR_NNPA]		= "nnpa",
		[HWCAP_NR_PCI_MIO]	= "pcimio",
		[HWCAP_NR_SIE]		= "sie",
	};
	int i, cpu;

	BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX);
	seq_printf(m, "vendor_id       : IBM/S390\n"
		   "# processors    : %i\n"
		   "bogomips per cpu: %lu.%02lu\n",
		   num_online_cpus(), loops_per_jiffy/(500000/HZ),
		   (loops_per_jiffy/(5000/HZ))%100);
	seq_printf(m, "max thread id   : %d\n", smp_cpu_mtid);
	seq_puts(m, "features\t: ");
	for (i = 0; i < ARRAY_SIZE(hwcap_str); i++)
		if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
			seq_printf(m, "%s ", hwcap_str[i]);
	seq_puts(m, "\n");
	show_facilities(m);
	show_cacheinfo(m);
	for_each_online_cpu(cpu) {
		struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu);

		seq_printf(m, "processor %d: "
			   "version = %02X,  "
			   "identification = %06X,  "
			   "machine = %04X\n",
			   cpu, id->version, id->ident, id->machine);
	}
}

static int __init setup_hwcaps(void)
{
	/* instructions named N3, "backported" to esa-mode */
	elf_hwcap |= HWCAP_ESAN3;

	/* z/Architecture mode active */
	elf_hwcap |= HWCAP_ZARCH;

	/* store-facility-list-extended */
	if (test_facility(7))
		elf_hwcap |= HWCAP_STFLE;

	/* message-security assist */
	if (test_facility(17))
		elf_hwcap |= HWCAP_MSA;

	/* long-displacement */
	if (test_facility(19))
		elf_hwcap |= HWCAP_LDISP;

	/* extended-immediate */
	elf_hwcap |= HWCAP_EIMM;

	/* extended-translation facility 3 enhancement */
	if (test_facility(22) && test_facility(30))
		elf_hwcap |= HWCAP_ETF3EH;

	/* decimal floating point & perform floating point operation */
	if (test_facility(42) && test_facility(44))
		elf_hwcap |= HWCAP_DFP;

	/* huge page support */
	if (MACHINE_HAS_EDAT1)
		elf_hwcap |= HWCAP_HPAGE;

	/* 64-bit register support for 31-bit processes */
	elf_hwcap |= HWCAP_HIGH_GPRS;

	/* transactional execution */
	if (MACHINE_HAS_TE)
		elf_hwcap |= HWCAP_TE;

	/*
	 * Vector extension can be disabled with the "novx" parameter.
	 * Use MACHINE_HAS_VX instead of facility bit 129.
	 */
	if (MACHINE_HAS_VX) {
		elf_hwcap |= HWCAP_VXRS;
		if (test_facility(134))
			elf_hwcap |= HWCAP_VXRS_BCD;
		if (test_facility(135))
			elf_hwcap |= HWCAP_VXRS_EXT;
		if (test_facility(148))
			elf_hwcap |= HWCAP_VXRS_EXT2;
		if (test_facility(152))
			elf_hwcap |= HWCAP_VXRS_PDE;
		if (test_facility(192))
			elf_hwcap |= HWCAP_VXRS_PDE2;
	}

	if (test_facility(150))
		elf_hwcap |= HWCAP_SORT;

	if (test_facility(151))
		elf_hwcap |= HWCAP_DFLT;

	if (test_facility(165))
		elf_hwcap |= HWCAP_NNPA;

	/* guarded storage */
	if (MACHINE_HAS_GS)
		elf_hwcap |= HWCAP_GS;

	if (MACHINE_HAS_PCI_MIO)
		elf_hwcap |= HWCAP_PCI_MIO;

	/* virtualization support */
	if (sclp.has_sief2)
		elf_hwcap |= HWCAP_SIE;

	return 0;
}
arch_initcall(setup_hwcaps);

static int __init setup_elf_platform(void)
{
	struct cpuid cpu_id;

	get_cpu_id(&cpu_id);
	add_device_randomness(&cpu_id, sizeof(cpu_id));
	switch (cpu_id.machine) {
	default:	/* Use "z10" as default. */
		strcpy(elf_platform, "z10");
		break;
	case 0x2817:
	case 0x2818:
		strcpy(elf_platform, "z196");
		break;
	case 0x2827:
	case 0x2828:
		strcpy(elf_platform, "zEC12");
		break;
	case 0x2964:
	case 0x2965:
		strcpy(elf_platform, "z13");
		break;
	case 0x3906:
	case 0x3907:
		strcpy(elf_platform, "z14");
		break;
	case 0x8561:
	case 0x8562:
		strcpy(elf_platform, "z15");
		break;
	case 0x3931:
	case 0x3932:
		strcpy(elf_platform, "z16");
		break;
	}
	return 0;
}
arch_initcall(setup_elf_platform);

static void show_cpu_topology(struct seq_file *m, unsigned long n)
{
#ifdef CONFIG_SCHED_TOPOLOGY
	seq_printf(m, "physical id     : %d\n", topology_physical_package_id(n));
	seq_printf(m, "core id         : %d\n", topology_core_id(n));
	seq_printf(m, "book id         : %d\n", topology_book_id(n));
	seq_printf(m, "drawer id       : %d\n", topology_drawer_id(n));
	seq_printf(m, "dedicated       : %d\n", topology_cpu_dedicated(n));
	seq_printf(m, "address         : %d\n", smp_cpu_get_cpu_address(n));
	seq_printf(m, "siblings        : %d\n", cpumask_weight(topology_core_cpumask(n)));
	seq_printf(m, "cpu cores       : %d\n", topology_booted_cores(n));
#endif /* CONFIG_SCHED_TOPOLOGY */
}

static void show_cpu_ids(struct seq_file *m, unsigned long n)
{
	struct cpuid *id = &per_cpu(cpu_info.cpu_id, n);

	seq_printf(m, "version         : %02X\n", id->version);
	seq_printf(m, "identification  : %06X\n", id->ident);
	seq_printf(m, "machine         : %04X\n", id->machine);
}

static void show_cpu_mhz(struct seq_file *m, unsigned long n)
{
	struct cpu_info *c = per_cpu_ptr(&cpu_info, n);

	if (!machine_has_cpu_mhz)
		return;
	seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic);
	seq_printf(m, "cpu MHz static  : %d\n", c->cpu_mhz_static);
}

/*
 * show_cpuinfo - Get information on one CPU for use by procfs.
 */
static int show_cpuinfo(struct seq_file *m, void *v)
{
	unsigned long n = (unsigned long) v - 1;
	unsigned long first = cpumask_first(cpu_online_mask);

	if (n == first)
		show_cpu_summary(m, v);
	seq_printf(m, "\ncpu number      : %ld\n", n);
	show_cpu_topology(m, n);
	show_cpu_ids(m, n);
	show_cpu_mhz(m, n);
	return 0;
}

static inline void *c_update(loff_t *pos)
{
	if (*pos)
		*pos = cpumask_next(*pos - 1, cpu_online_mask);
	else
		*pos = cpumask_first(cpu_online_mask);
	return *pos < nr_cpu_ids ? (void *)*pos + 1 : NULL;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	cpus_read_lock();
	return c_update(pos);
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_update(pos);
}

static void c_stop(struct seq_file *m, void *v)
{
	cpus_read_unlock();
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= show_cpuinfo,
};

int s390_isolate_bp(void)
{
	if (!test_facility(82))
		return -EOPNOTSUPP;
	set_thread_flag(TIF_ISOLATE_BP);
	return 0;
}
EXPORT_SYMBOL(s390_isolate_bp);

int s390_isolate_bp_guest(void)
{
	if (!test_facility(82))
		return -EOPNOTSUPP;
	set_thread_flag(TIF_ISOLATE_BP_GUEST);
	return 0;
}
EXPORT_SYMBOL(s390_isolate_bp_guest);
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
395d31d4	2	/*
395d31d4 MS	3	* Copyright IBM Corp. 2008
	4	* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
	5	*/
	6
	7	#define KMSG_COMPONENT "cpu"
	8	#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
	9
4ecf0a43	10	#include <linux/stop_machine.h>
ca21872e	11	#include <linux/cpufeature.h>
157467ba	12	#include <linux/bitops.h>
395d31d4	13	#include <linux/kernel.h>
f17a6d5d	14	#include <linux/random.h>
68e21be2	15	#include <linux/sched/mm.h>
395d31d4	16	#include <linux/init.h>
395d31d4	17	#include <linux/seq_file.h>
589ee628	18	#include <linux/mm_types.h>
395d31d4	19	#include <linux/delay.h>
19726cec	20	#include <linux/cpu.h>
68e21be2	21
1ec2772e	22	#include <asm/diag.h>
097a116c	23	#include <asm/facility.h>
395d31d4 MS	24	#include <asm/elf.h>
	25	#include <asm/lowcore.h>
	26	#include <asm/param.h>
f17a6d5d	27	#include <asm/sclp.h>
4d92f502	28	#include <asm/smp.h>
395d31d4	29
f17a6d5d HC	30	unsigned long __read_mostly elf_hwcap;
	31	char elf_platform[ELF_PLATFORM_SIZE];
	32
097a116c HC	33	struct cpu_info {
	34	unsigned int cpu_mhz_dynamic;
	35	unsigned int cpu_mhz_static;
	36	struct cpuid cpu_id;
	37	};
	38
	39	static DEFINE_PER_CPU(struct cpu_info, cpu_info);
38f2c691	40	static DEFINE_PER_CPU(int, cpu_relax_retry);
097a116c HC	41
	42	static bool machine_has_cpu_mhz;
	43
	44	void __init cpu_detect_mhz_feature(void)
	45	{
	46	if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL)
970ba6ac	47	machine_has_cpu_mhz = true;
097a116c HC	48	}
	49
	50	static void update_cpu_mhz(void *arg)
	51	{
	52	unsigned long mhz;
	53	struct cpu_info *c;
	54
	55	mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
	56	c = this_cpu_ptr(&cpu_info);
	57	c->cpu_mhz_dynamic = mhz >> 32;
	58	c->cpu_mhz_static = mhz & 0xffffffff;
	59	}
	60
	61	void s390_update_cpu_mhz(void)
	62	{
	63	s390_adjust_jiffies();
	64	if (machine_has_cpu_mhz)
	65	on_each_cpu(update_cpu_mhz, NULL, 0);
	66	}
94038a99	67
4ecf0a43	68	void notrace stop_machine_yield(const struct cpumask *cpumask)
4d92f502	69	{
38f2c691 MS	70	int cpu, this_cpu;
	71
	72	this_cpu = smp_processor_id();
	73	if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) {
	74	__this_cpu_write(cpu_relax_retry, 0);
	75	cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false);
	76	if (cpu >= nr_cpu_ids)
	77	return;
	78	if (arch_vcpu_is_preempted(cpu))
	79	smp_yield_cpu(cpu);
1ec2772e	80	}
4d92f502	81	}
4d92f502	82
94038a99 MS	83	/*
	84	* cpu_init - initializes state that is per-CPU.
	85	*/
e2741f17	86	void cpu_init(void)
94038a99	87	{
097a116c	88	struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id);
94038a99 MS	89
94038a99 MS	90	get_cpu_id(id);
097a116c HC	91	if (machine_has_cpu_mhz)
097a116c HC	92	update_cpu_mhz(NULL);
f1f10076	93	mmgrab(&init_mm);
94038a99 MS	94	current->active_mm = &init_mm;
	95	BUG_ON(current->mm);
	96	enter_lazy_tlb(&init_mm, current);
	97	}
	98
8f00b3e2 HB	99	/*
	100	* cpu_have_feature - Test CPU features on module initialization
	101	*/
	102	int cpu_have_feature(unsigned int num)
	103	{
	104	return elf_hwcap & (1UL << num);
	105	}
	106	EXPORT_SYMBOL(cpu_have_feature);
	107
157467ba HC	108	static void show_facilities(struct seq_file *m)
	109	{
	110	unsigned int bit;
157467ba	111
157467ba	112	seq_puts(m, "facilities :");
17e89e13	113	for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT)
157467ba HC	114	seq_printf(m, " %d", bit);
	115	seq_putc(m, '\n');
	116	}
	117
219a21b3	118	static void show_cpu_summary(struct seq_file m, void v)
395d31d4	119	{
fbf3c542	120	static const char *hwcap_str[] = {
95655495 HC	121	[HWCAP_NR_ESAN3] = "esan3",
	122	[HWCAP_NR_ZARCH] = "zarch",
	123	[HWCAP_NR_STFLE] = "stfle",
	124	[HWCAP_NR_MSA] = "msa",
	125	[HWCAP_NR_LDISP] = "ldisp",
	126	[HWCAP_NR_EIMM] = "eimm",
	127	[HWCAP_NR_DFP] = "dfp",
	128	[HWCAP_NR_HPAGE] = "edat",
	129	[HWCAP_NR_ETF3EH] = "etf3eh",
	130	[HWCAP_NR_HIGH_GPRS] = "highgprs",
	131	[HWCAP_NR_TE] = "te",
	132	[HWCAP_NR_VXRS] = "vx",
	133	[HWCAP_NR_VXRS_BCD] = "vxd",
	134	[HWCAP_NR_VXRS_EXT] = "vxe",
	135	[HWCAP_NR_GS] = "gs",
	136	[HWCAP_NR_VXRS_EXT2] = "vxe2",
	137	[HWCAP_NR_VXRS_PDE] = "vxp",
	138	[HWCAP_NR_SORT] = "sort",
	139	[HWCAP_NR_DFLT] = "dflt",
	140	[HWCAP_NR_VXRS_PDE2] = "vxp2",
	141	[HWCAP_NR_NNPA] = "nnpa",
	142	[HWCAP_NR_PCI_MIO] = "pcimio",
7e82523f	143	[HWCAP_NR_SIE] = "sie",
7f16d7e7	144	};
219a21b3 HC	145	int i, cpu;
219a21b3 HC	146
c68d4632	147	BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX);
219a21b3 HC	148	seq_printf(m, "vendor_id : IBM/S390\n"
	149	"# processors : %i\n"
	150	"bogomips per cpu: %lu.%02lu\n",
	151	num_online_cpus(), loops_per_jiffy/(500000/HZ),
	152	(loops_per_jiffy/(5000/HZ))%100);
10f4954a	153	seq_printf(m, "max thread id : %d\n", smp_cpu_mtid);
219a21b3 HC	154	seq_puts(m, "features\t: ");
	155	for (i = 0; i < ARRAY_SIZE(hwcap_str); i++)
	156	if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
	157	seq_printf(m, "%s ", hwcap_str[i]);
219a21b3	158	seq_puts(m, "\n");
157467ba	159	show_facilities(m);
219a21b3 HC	160	show_cacheinfo(m);
219a21b3 HC	161	for_each_online_cpu(cpu) {
097a116c	162	struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu);
219a21b3 HC	163
219a21b3 HC	164	seq_printf(m, "processor %d: "
7b468488 MS	165	"version = %02X, "
	166	"identification = %06X, "
	167	"machine = %04X\n",
219a21b3	168	cpu, id->version, id->ident, id->machine);
7b468488	169	}
219a21b3 HC	170	}
219a21b3 HC	171
f17a6d5d HC	172	static int __init setup_hwcaps(void)
f17a6d5d HC	173	{
251527c9	174	/* instructions named N3, "backported" to esa-mode */
4efd417f	175	elf_hwcap \|= HWCAP_ESAN3;
251527c9 HC	176
251527c9 HC	177	/* z/Architecture mode active */
487dff56	178	elf_hwcap \|= HWCAP_ZARCH;
251527c9 HC	179
	180	/* store-facility-list-extended */
	181	if (test_facility(7))
	182	elf_hwcap \|= HWCAP_STFLE;
	183
	184	/* message-security assist */
	185	if (test_facility(17))
	186	elf_hwcap \|= HWCAP_MSA;
	187
	188	/* long-displacement */
	189	if (test_facility(19))
	190	elf_hwcap \|= HWCAP_LDISP;
	191
	192	/* extended-immediate */
4efd417f	193	elf_hwcap \|= HWCAP_EIMM;
f17a6d5d	194
449fbd71	195	/* extended-translation facility 3 enhancement */
f17a6d5d HC	196	if (test_facility(22) && test_facility(30))
	197	elf_hwcap \|= HWCAP_ETF3EH;
	198
449fbd71	199	/* decimal floating point & perform floating point operation */
98ac9169	200	if (test_facility(42) && test_facility(44))
f17a6d5d HC	201	elf_hwcap \|= HWCAP_DFP;
f17a6d5d HC	202
449fbd71	203	/* huge page support */
f17a6d5d HC	204	if (MACHINE_HAS_EDAT1)
	205	elf_hwcap \|= HWCAP_HPAGE;
	206
449fbd71	207	/* 64-bit register support for 31-bit processes */
f17a6d5d HC	208	elf_hwcap \|= HWCAP_HIGH_GPRS;
f17a6d5d HC	209
449fbd71	210	/* transactional execution */
f17a6d5d HC	211	if (MACHINE_HAS_TE)
	212	elf_hwcap \|= HWCAP_TE;
	213
	214	/*
449fbd71 HC	215	* Vector extension can be disabled with the "novx" parameter.
449fbd71 HC	216	* Use MACHINE_HAS_VX instead of facility bit 129.
f17a6d5d HC	217	*/
	218	if (MACHINE_HAS_VX) {
	219	elf_hwcap \|= HWCAP_VXRS;
	220	if (test_facility(134))
	221	elf_hwcap \|= HWCAP_VXRS_BCD;
	222	if (test_facility(135))
	223	elf_hwcap \|= HWCAP_VXRS_EXT;
	224	if (test_facility(148))
	225	elf_hwcap \|= HWCAP_VXRS_EXT2;
	226	if (test_facility(152))
	227	elf_hwcap \|= HWCAP_VXRS_PDE;
	228	if (test_facility(192))
	229	elf_hwcap \|= HWCAP_VXRS_PDE2;
	230	}
449fbd71	231
f17a6d5d HC	232	if (test_facility(150))
f17a6d5d HC	233	elf_hwcap \|= HWCAP_SORT;
449fbd71	234
f17a6d5d HC	235	if (test_facility(151))
f17a6d5d HC	236	elf_hwcap \|= HWCAP_DFLT;
449fbd71	237
f17a6d5d HC	238	if (test_facility(165))
	239	elf_hwcap \|= HWCAP_NNPA;
	240
449fbd71	241	/* guarded storage */
f17a6d5d HC	242	if (MACHINE_HAS_GS)
f17a6d5d HC	243	elf_hwcap \|= HWCAP_GS;
449fbd71	244
f17a6d5d HC	245	if (MACHINE_HAS_PCI_MIO)
	246	elf_hwcap \|= HWCAP_PCI_MIO;
	247
449fbd71	248	/* virtualization support */
873129ca	249	if (sclp.has_sief2)
7e82523f	250	elf_hwcap \|= HWCAP_SIE;
873129ca HC	251
	252	return 0;
	253	}
	254	arch_initcall(setup_hwcaps);
	255
	256	static int __init setup_elf_platform(void)
	257	{
	258	struct cpuid cpu_id;
	259
f17a6d5d HC	260	get_cpu_id(&cpu_id);
	261	add_device_randomness(&cpu_id, sizeof(cpu_id));
	262	switch (cpu_id.machine) {
4efd417f	263	default: /* Use "z10" as default. */
f17a6d5d HC	264	strcpy(elf_platform, "z10");
	265	break;
	266	case 0x2817:
	267	case 0x2818:
	268	strcpy(elf_platform, "z196");
	269	break;
	270	case 0x2827:
	271	case 0x2828:
	272	strcpy(elf_platform, "zEC12");
	273	break;
	274	case 0x2964:
	275	case 0x2965:
	276	strcpy(elf_platform, "z13");
	277	break;
	278	case 0x3906:
	279	case 0x3907:
	280	strcpy(elf_platform, "z14");
	281	break;
	282	case 0x8561:
	283	case 0x8562:
	284	strcpy(elf_platform, "z15");
	285	break;
6203ac30 HC	286	case 0x3931:
	287	case 0x3932:
	288	strcpy(elf_platform, "z16");
	289	break;
f17a6d5d	290	}
f17a6d5d HC	291	return 0;
f17a6d5d HC	292	}
873129ca	293	arch_initcall(setup_elf_platform);
f17a6d5d	294
fb835102 AG	295	static void show_cpu_topology(struct seq_file *m, unsigned long n)
	296	{
	297	#ifdef CONFIG_SCHED_TOPOLOGY
	298	seq_printf(m, "physical id : %d\n", topology_physical_package_id(n));
	299	seq_printf(m, "core id : %d\n", topology_core_id(n));
	300	seq_printf(m, "book id : %d\n", topology_book_id(n));
	301	seq_printf(m, "drawer id : %d\n", topology_drawer_id(n));
	302	seq_printf(m, "dedicated : %d\n", topology_cpu_dedicated(n));
42d211a1	303	seq_printf(m, "address : %d\n", smp_cpu_get_cpu_address(n));
2db52dc3	304	seq_printf(m, "siblings : %d\n", cpumask_weight(topology_core_cpumask(n)));
95968497	305	seq_printf(m, "cpu cores : %d\n", topology_booted_cores(n));
fb835102 AG	306	#endif /* CONFIG_SCHED_TOPOLOGY */
	307	}
	308
	309	static void show_cpu_ids(struct seq_file *m, unsigned long n)
	310	{
	311	struct cpuid *id = &per_cpu(cpu_info.cpu_id, n);
	312
	313	seq_printf(m, "version : %02X\n", id->version);
	314	seq_printf(m, "identification : %06X\n", id->ident);
	315	seq_printf(m, "machine : %04X\n", id->machine);
	316	}
	317
097a116c HC	318	static void show_cpu_mhz(struct seq_file *m, unsigned long n)
	319	{
	320	struct cpu_info *c = per_cpu_ptr(&cpu_info, n);
	321
1b648dfd AG	322	if (!machine_has_cpu_mhz)
1b648dfd AG	323	return;
097a116c HC	324	seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic);
	325	seq_printf(m, "cpu MHz static : %d\n", c->cpu_mhz_static);
	326	}
	327
219a21b3 HC	328	/*
	329	* show_cpuinfo - Get information on one CPU for use by procfs.
	330	*/
	331	static int show_cpuinfo(struct seq_file m, void v)
	332	{
	333	unsigned long n = (unsigned long) v - 1;
872f2710	334	unsigned long first = cpumask_first(cpu_online_mask);
219a21b3	335
872f2710	336	if (n == first)
219a21b3	337	show_cpu_summary(m, v);
109ab954	338	seq_printf(m, "\ncpu number : %ld\n", n);
fb835102 AG	339	show_cpu_topology(m, n);
fb835102 AG	340	show_cpu_ids(m, n);
097a116c	341	show_cpu_mhz(m, n);
7b468488	342	return 0;
395d31d4 MS	343	}
395d31d4 MS	344
281eaa8c HC	345	static inline void c_update(loff_t pos)
	346	{
	347	if (*pos)
	348	pos = cpumask_next(pos - 1, cpu_online_mask);
872f2710 AG	349	else
872f2710 AG	350	*pos = cpumask_first(cpu_online_mask);
281eaa8c HC	351	return pos < nr_cpu_ids ? (void )*pos + 1 : NULL;
	352	}
	353
395d31d4 MS	354	static void c_start(struct seq_file m, loff_t *pos)
395d31d4 MS	355	{
a73de293	356	cpus_read_lock();
281eaa8c	357	return c_update(pos);
395d31d4 MS	358	}
	359
	360	static void c_next(struct seq_file m, void v, loff_t pos)
	361	{
	362	++*pos;
281eaa8c	363	return c_update(pos);
395d31d4 MS	364	}
	365
	366	static void c_stop(struct seq_file m, void v)
	367	{
a73de293	368	cpus_read_unlock();
395d31d4 MS	369	}
	370
	371	const struct seq_operations cpuinfo_op = {
	372	.start = c_start,
	373	.next = c_next,
	374	.stop = c_stop,
	375	.show = show_cpuinfo,
	376	};
6b73044b MS	377
	378	int s390_isolate_bp(void)
	379	{
	380	if (!test_facility(82))
	381	return -EOPNOTSUPP;
	382	set_thread_flag(TIF_ISOLATE_BP);
	383	return 0;
	384	}
	385	EXPORT_SYMBOL(s390_isolate_bp);
	386
	387	int s390_isolate_bp_guest(void)
	388	{
	389	if (!test_facility(82))
	390	return -EOPNOTSUPP;
	391	set_thread_flag(TIF_ISOLATE_BP_GUEST);
	392	return 0;
	393	}
	394	EXPORT_SYMBOL(s390_isolate_bp_guest);