[linux-block.git] / arch / s390 / kernel / processor.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  Copyright IBM Corp. 2008
 *  Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
 */

#define KMSG_COMPONENT "cpu"
#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt

#include <linux/stop_machine.h>
#include <linux/bitops.h>
#include <linux/kernel.h>
#include <linux/random.h>
#include <linux/sched/mm.h>
#include <linux/init.h>
#include <linux/seq_file.h>
#include <linux/mm_types.h>
#include <linux/delay.h>
#include <linux/cpu.h>

#include <asm/diag.h>
#include <asm/facility.h>
#include <asm/elf.h>
#include <asm/lowcore.h>
#include <asm/param.h>
#include <asm/sclp.h>
#include <asm/smp.h>

unsigned long __read_mostly elf_hwcap;
char elf_platform[ELF_PLATFORM_SIZE];

struct cpu_info {
	unsigned int cpu_mhz_dynamic;
	unsigned int cpu_mhz_static;
	struct cpuid cpu_id;
};

static DEFINE_PER_CPU(struct cpu_info, cpu_info);
static DEFINE_PER_CPU(int, cpu_relax_retry);

static bool machine_has_cpu_mhz;

void __init cpu_detect_mhz_feature(void)
{
	if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL)
		machine_has_cpu_mhz = true;
}

static void update_cpu_mhz(void *arg)
{
	unsigned long mhz;
	struct cpu_info *c;

	mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
	c = this_cpu_ptr(&cpu_info);
	c->cpu_mhz_dynamic = mhz >> 32;
	c->cpu_mhz_static = mhz & 0xffffffff;
}

void s390_update_cpu_mhz(void)
{
	s390_adjust_jiffies();
	if (machine_has_cpu_mhz)
		on_each_cpu(update_cpu_mhz, NULL, 0);
}

void notrace stop_machine_yield(const struct cpumask *cpumask)
{
	int cpu, this_cpu;

	this_cpu = smp_processor_id();
	if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) {
		__this_cpu_write(cpu_relax_retry, 0);
		cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false);
		if (cpu >= nr_cpu_ids)
			return;
		if (arch_vcpu_is_preempted(cpu))
			smp_yield_cpu(cpu);
	}
}

/*
 * cpu_init - initializes state that is per-CPU.
 */
void cpu_init(void)
{
	struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id);

	get_cpu_id(id);
	if (machine_has_cpu_mhz)
		update_cpu_mhz(NULL);
	mmgrab(&init_mm);
	current->active_mm = &init_mm;
	BUG_ON(current->mm);
	enter_lazy_tlb(&init_mm, current);
}

static void show_facilities(struct seq_file *m)
{
	unsigned int bit;

	seq_puts(m, "facilities      :");
	for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT)
		seq_printf(m, " %d", bit);
	seq_putc(m, '\n');
}

static void show_cpu_summary(struct seq_file *m, void *v)
{
	static const char *hwcap_str[] = {
		[HWCAP_NR_ESAN3]	= "esan3",
		[HWCAP_NR_ZARCH]	= "zarch",
		[HWCAP_NR_STFLE]	= "stfle",
		[HWCAP_NR_MSA]		= "msa",
		[HWCAP_NR_LDISP]	= "ldisp",
		[HWCAP_NR_EIMM]		= "eimm",
		[HWCAP_NR_DFP]		= "dfp",
		[HWCAP_NR_HPAGE]	= "edat",
		[HWCAP_NR_ETF3EH]	= "etf3eh",
		[HWCAP_NR_HIGH_GPRS]	= "highgprs",
		[HWCAP_NR_TE]		= "te",
		[HWCAP_NR_VXRS]		= "vx",
		[HWCAP_NR_VXRS_BCD]	= "vxd",
		[HWCAP_NR_VXRS_EXT]	= "vxe",
		[HWCAP_NR_GS]		= "gs",
		[HWCAP_NR_VXRS_EXT2]	= "vxe2",
		[HWCAP_NR_VXRS_PDE]	= "vxp",
		[HWCAP_NR_SORT]		= "sort",
		[HWCAP_NR_DFLT]		= "dflt",
		[HWCAP_NR_VXRS_PDE2]	= "vxp2",
		[HWCAP_NR_NNPA]		= "nnpa",
		[HWCAP_NR_PCI_MIO]	= "pcimio",
		[HWCAP_NR_SIE]		= "sie",
	};
	int i, cpu;

	BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX);
	seq_printf(m, "vendor_id       : IBM/S390\n"
		   "# processors    : %i\n"
		   "bogomips per cpu: %lu.%02lu\n",
		   num_online_cpus(), loops_per_jiffy/(500000/HZ),
		   (loops_per_jiffy/(5000/HZ))%100);
	seq_printf(m, "max thread id   : %d\n", smp_cpu_mtid);
	seq_puts(m, "features\t: ");
	for (i = 0; i < ARRAY_SIZE(hwcap_str); i++)
		if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
			seq_printf(m, "%s ", hwcap_str[i]);
	seq_puts(m, "\n");
	show_facilities(m);
	show_cacheinfo(m);
	for_each_online_cpu(cpu) {
		struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu);

		seq_printf(m, "processor %d: "
			   "version = %02X,  "
			   "identification = %06X,  "
			   "machine = %04X\n",
			   cpu, id->version, id->ident, id->machine);
	}
}

static int __init setup_hwcaps(void)
{
	/* instructions named N3, "backported" to esa-mode */
	elf_hwcap |= HWCAP_ESAN3;

	/* z/Architecture mode active */
	elf_hwcap |= HWCAP_ZARCH;

	/* store-facility-list-extended */
	if (test_facility(7))
		elf_hwcap |= HWCAP_STFLE;

	/* message-security assist */
	if (test_facility(17))
		elf_hwcap |= HWCAP_MSA;

	/* long-displacement */
	if (test_facility(19))
		elf_hwcap |= HWCAP_LDISP;

	/* extended-immediate */
	elf_hwcap |= HWCAP_EIMM;

	/* extended-translation facility 3 enhancement */
	if (test_facility(22) && test_facility(30))
		elf_hwcap |= HWCAP_ETF3EH;

	/* decimal floating point & perform floating point operation */
	if (test_facility(42) && test_facility(44))
		elf_hwcap |= HWCAP_DFP;

	/* huge page support */
	if (MACHINE_HAS_EDAT1)
		elf_hwcap |= HWCAP_HPAGE;

	/* 64-bit register support for 31-bit processes */
	elf_hwcap |= HWCAP_HIGH_GPRS;

	/* transactional execution */
	if (MACHINE_HAS_TE)
		elf_hwcap |= HWCAP_TE;

	/*
	 * Vector extension can be disabled with the "novx" parameter.
	 * Use MACHINE_HAS_VX instead of facility bit 129.
	 */
	if (MACHINE_HAS_VX) {
		elf_hwcap |= HWCAP_VXRS;
		if (test_facility(134))
			elf_hwcap |= HWCAP_VXRS_BCD;
		if (test_facility(135))
			elf_hwcap |= HWCAP_VXRS_EXT;
		if (test_facility(148))
			elf_hwcap |= HWCAP_VXRS_EXT2;
		if (test_facility(152))
			elf_hwcap |= HWCAP_VXRS_PDE;
		if (test_facility(192))
			elf_hwcap |= HWCAP_VXRS_PDE2;
	}

	if (test_facility(150))
		elf_hwcap |= HWCAP_SORT;

	if (test_facility(151))
		elf_hwcap |= HWCAP_DFLT;

	if (test_facility(165))
		elf_hwcap |= HWCAP_NNPA;

	/* guarded storage */
	if (MACHINE_HAS_GS)
		elf_hwcap |= HWCAP_GS;

	if (MACHINE_HAS_PCI_MIO)
		elf_hwcap |= HWCAP_PCI_MIO;

	/* virtualization support */
	if (sclp.has_sief2)
		elf_hwcap |= HWCAP_SIE;

	return 0;
}
arch_initcall(setup_hwcaps);

static int __init setup_elf_platform(void)
{
	struct cpuid cpu_id;

	get_cpu_id(&cpu_id);
	add_device_randomness(&cpu_id, sizeof(cpu_id));
	switch (cpu_id.machine) {
	default:	/* Use "z10" as default. */
		strcpy(elf_platform, "z10");
		break;
	case 0x2817:
	case 0x2818:
		strcpy(elf_platform, "z196");
		break;
	case 0x2827:
	case 0x2828:
		strcpy(elf_platform, "zEC12");
		break;
	case 0x2964:
	case 0x2965:
		strcpy(elf_platform, "z13");
		break;
	case 0x3906:
	case 0x3907:
		strcpy(elf_platform, "z14");
		break;
	case 0x8561:
	case 0x8562:
		strcpy(elf_platform, "z15");
		break;
	case 0x3931:
	case 0x3932:
		strcpy(elf_platform, "z16");
		break;
	}
	return 0;
}
arch_initcall(setup_elf_platform);

static void show_cpu_topology(struct seq_file *m, unsigned long n)
{
#ifdef CONFIG_SCHED_TOPOLOGY
	seq_printf(m, "physical id     : %d\n", topology_physical_package_id(n));
	seq_printf(m, "core id         : %d\n", topology_core_id(n));
	seq_printf(m, "book id         : %d\n", topology_book_id(n));
	seq_printf(m, "drawer id       : %d\n", topology_drawer_id(n));
	seq_printf(m, "dedicated       : %d\n", topology_cpu_dedicated(n));
	seq_printf(m, "address         : %d\n", smp_cpu_get_cpu_address(n));
	seq_printf(m, "siblings        : %d\n", cpumask_weight(topology_core_cpumask(n)));
	seq_printf(m, "cpu cores       : %d\n", topology_booted_cores(n));
#endif /* CONFIG_SCHED_TOPOLOGY */
}

static void show_cpu_ids(struct seq_file *m, unsigned long n)
{
	struct cpuid *id = &per_cpu(cpu_info.cpu_id, n);

	seq_printf(m, "version         : %02X\n", id->version);
	seq_printf(m, "identification  : %06X\n", id->ident);
	seq_printf(m, "machine         : %04X\n", id->machine);
}

static void show_cpu_mhz(struct seq_file *m, unsigned long n)
{
	struct cpu_info *c = per_cpu_ptr(&cpu_info, n);

	if (!machine_has_cpu_mhz)
		return;
	seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic);
	seq_printf(m, "cpu MHz static  : %d\n", c->cpu_mhz_static);
}

/*
 * show_cpuinfo - Get information on one CPU for use by procfs.
 */
static int show_cpuinfo(struct seq_file *m, void *v)
{
	unsigned long n = (unsigned long) v - 1;
	unsigned long first = cpumask_first(cpu_online_mask);

	if (n == first)
		show_cpu_summary(m, v);
	seq_printf(m, "\ncpu number      : %ld\n", n);
	show_cpu_topology(m, n);
	show_cpu_ids(m, n);
	show_cpu_mhz(m, n);
	return 0;
}

static inline void *c_update(loff_t *pos)
{
	if (*pos)
		*pos = cpumask_next(*pos - 1, cpu_online_mask);
	else
		*pos = cpumask_first(cpu_online_mask);
	return *pos < nr_cpu_ids ? (void *)*pos + 1 : NULL;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	cpus_read_lock();
	return c_update(pos);
}

static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_update(pos);
}

static void c_stop(struct seq_file *m, void *v)
{
	cpus_read_unlock();
}

const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= show_cpuinfo,
};
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
395d31d4	2	/*
395d31d4 MS	3	* Copyright IBM Corp. 2008
	4	* Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
	5	*/
	6
	7	#define KMSG_COMPONENT "cpu"
	8	#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
	9
4ecf0a43	10	#include <linux/stop_machine.h>
157467ba	11	#include <linux/bitops.h>
395d31d4	12	#include <linux/kernel.h>
f17a6d5d	13	#include <linux/random.h>
68e21be2	14	#include <linux/sched/mm.h>
395d31d4	15	#include <linux/init.h>
395d31d4	16	#include <linux/seq_file.h>
589ee628	17	#include <linux/mm_types.h>
395d31d4	18	#include <linux/delay.h>
19726cec	19	#include <linux/cpu.h>
68e21be2	20
1ec2772e	21	#include <asm/diag.h>
097a116c	22	#include <asm/facility.h>
395d31d4 MS	23	#include <asm/elf.h>
	24	#include <asm/lowcore.h>
	25	#include <asm/param.h>
f17a6d5d	26	#include <asm/sclp.h>
4d92f502	27	#include <asm/smp.h>
395d31d4	28
f17a6d5d HC	29	unsigned long __read_mostly elf_hwcap;
	30	char elf_platform[ELF_PLATFORM_SIZE];
	31
097a116c HC	32	struct cpu_info {
	33	unsigned int cpu_mhz_dynamic;
	34	unsigned int cpu_mhz_static;
	35	struct cpuid cpu_id;
	36	};
	37
	38	static DEFINE_PER_CPU(struct cpu_info, cpu_info);
38f2c691	39	static DEFINE_PER_CPU(int, cpu_relax_retry);
097a116c HC	40
	41	static bool machine_has_cpu_mhz;
	42
	43	void __init cpu_detect_mhz_feature(void)
	44	{
	45	if (test_facility(34) && __ecag(ECAG_CPU_ATTRIBUTE, 0) != -1UL)
970ba6ac	46	machine_has_cpu_mhz = true;
097a116c HC	47	}
	48
	49	static void update_cpu_mhz(void *arg)
	50	{
	51	unsigned long mhz;
	52	struct cpu_info *c;
	53
	54	mhz = __ecag(ECAG_CPU_ATTRIBUTE, 0);
	55	c = this_cpu_ptr(&cpu_info);
	56	c->cpu_mhz_dynamic = mhz >> 32;
	57	c->cpu_mhz_static = mhz & 0xffffffff;
	58	}
	59
	60	void s390_update_cpu_mhz(void)
	61	{
	62	s390_adjust_jiffies();
	63	if (machine_has_cpu_mhz)
	64	on_each_cpu(update_cpu_mhz, NULL, 0);
	65	}
94038a99	66
4ecf0a43	67	void notrace stop_machine_yield(const struct cpumask *cpumask)
4d92f502	68	{
38f2c691 MS	69	int cpu, this_cpu;
	70
	71	this_cpu = smp_processor_id();
	72	if (__this_cpu_inc_return(cpu_relax_retry) >= spin_retry) {
	73	__this_cpu_write(cpu_relax_retry, 0);
	74	cpu = cpumask_next_wrap(this_cpu, cpumask, this_cpu, false);
	75	if (cpu >= nr_cpu_ids)
	76	return;
	77	if (arch_vcpu_is_preempted(cpu))
	78	smp_yield_cpu(cpu);
1ec2772e	79	}
4d92f502	80	}
4d92f502	81
94038a99 MS	82	/*
	83	* cpu_init - initializes state that is per-CPU.
	84	*/
e2741f17	85	void cpu_init(void)
94038a99	86	{
097a116c	87	struct cpuid *id = this_cpu_ptr(&cpu_info.cpu_id);
94038a99 MS	88
94038a99 MS	89	get_cpu_id(id);
097a116c HC	90	if (machine_has_cpu_mhz)
097a116c HC	91	update_cpu_mhz(NULL);
f1f10076	92	mmgrab(&init_mm);
94038a99 MS	93	current->active_mm = &init_mm;
	94	BUG_ON(current->mm);
	95	enter_lazy_tlb(&init_mm, current);
	96	}
	97
157467ba HC	98	static void show_facilities(struct seq_file *m)
	99	{
	100	unsigned int bit;
157467ba	101
157467ba	102	seq_puts(m, "facilities :");
17e89e13	103	for_each_set_bit_inv(bit, (long *)&stfle_fac_list, MAX_FACILITY_BIT)
157467ba HC	104	seq_printf(m, " %d", bit);
	105	seq_putc(m, '\n');
	106	}
	107
219a21b3	108	static void show_cpu_summary(struct seq_file m, void v)
395d31d4	109	{
fbf3c542	110	static const char *hwcap_str[] = {
95655495 HC	111	[HWCAP_NR_ESAN3] = "esan3",
	112	[HWCAP_NR_ZARCH] = "zarch",
	113	[HWCAP_NR_STFLE] = "stfle",
	114	[HWCAP_NR_MSA] = "msa",
	115	[HWCAP_NR_LDISP] = "ldisp",
	116	[HWCAP_NR_EIMM] = "eimm",
	117	[HWCAP_NR_DFP] = "dfp",
	118	[HWCAP_NR_HPAGE] = "edat",
	119	[HWCAP_NR_ETF3EH] = "etf3eh",
	120	[HWCAP_NR_HIGH_GPRS] = "highgprs",
	121	[HWCAP_NR_TE] = "te",
	122	[HWCAP_NR_VXRS] = "vx",
	123	[HWCAP_NR_VXRS_BCD] = "vxd",
	124	[HWCAP_NR_VXRS_EXT] = "vxe",
	125	[HWCAP_NR_GS] = "gs",
	126	[HWCAP_NR_VXRS_EXT2] = "vxe2",
	127	[HWCAP_NR_VXRS_PDE] = "vxp",
	128	[HWCAP_NR_SORT] = "sort",
	129	[HWCAP_NR_DFLT] = "dflt",
	130	[HWCAP_NR_VXRS_PDE2] = "vxp2",
	131	[HWCAP_NR_NNPA] = "nnpa",
	132	[HWCAP_NR_PCI_MIO] = "pcimio",
7e82523f	133	[HWCAP_NR_SIE] = "sie",
7f16d7e7	134	};
219a21b3 HC	135	int i, cpu;
219a21b3 HC	136
c68d4632	137	BUILD_BUG_ON(ARRAY_SIZE(hwcap_str) != HWCAP_NR_MAX);
219a21b3 HC	138	seq_printf(m, "vendor_id : IBM/S390\n"
	139	"# processors : %i\n"
	140	"bogomips per cpu: %lu.%02lu\n",
	141	num_online_cpus(), loops_per_jiffy/(500000/HZ),
	142	(loops_per_jiffy/(5000/HZ))%100);
10f4954a	143	seq_printf(m, "max thread id : %d\n", smp_cpu_mtid);
219a21b3 HC	144	seq_puts(m, "features\t: ");
	145	for (i = 0; i < ARRAY_SIZE(hwcap_str); i++)
	146	if (hwcap_str[i] && (elf_hwcap & (1UL << i)))
	147	seq_printf(m, "%s ", hwcap_str[i]);
219a21b3	148	seq_puts(m, "\n");
157467ba	149	show_facilities(m);
219a21b3 HC	150	show_cacheinfo(m);
219a21b3 HC	151	for_each_online_cpu(cpu) {
097a116c	152	struct cpuid *id = &per_cpu(cpu_info.cpu_id, cpu);
219a21b3 HC	153
219a21b3 HC	154	seq_printf(m, "processor %d: "
7b468488 MS	155	"version = %02X, "
	156	"identification = %06X, "
	157	"machine = %04X\n",
219a21b3	158	cpu, id->version, id->ident, id->machine);
7b468488	159	}
219a21b3 HC	160	}
219a21b3 HC	161
f17a6d5d HC	162	static int __init setup_hwcaps(void)
f17a6d5d HC	163	{
251527c9	164	/* instructions named N3, "backported" to esa-mode */
4efd417f	165	elf_hwcap \|= HWCAP_ESAN3;
251527c9 HC	166
251527c9 HC	167	/* z/Architecture mode active */
487dff56	168	elf_hwcap \|= HWCAP_ZARCH;
251527c9 HC	169
	170	/* store-facility-list-extended */
	171	if (test_facility(7))
	172	elf_hwcap \|= HWCAP_STFLE;
	173
	174	/* message-security assist */
	175	if (test_facility(17))
	176	elf_hwcap \|= HWCAP_MSA;
	177
	178	/* long-displacement */
	179	if (test_facility(19))
	180	elf_hwcap \|= HWCAP_LDISP;
	181
	182	/* extended-immediate */
4efd417f	183	elf_hwcap \|= HWCAP_EIMM;
f17a6d5d	184
449fbd71	185	/* extended-translation facility 3 enhancement */
f17a6d5d HC	186	if (test_facility(22) && test_facility(30))
	187	elf_hwcap \|= HWCAP_ETF3EH;
	188
449fbd71	189	/* decimal floating point & perform floating point operation */
98ac9169	190	if (test_facility(42) && test_facility(44))
f17a6d5d HC	191	elf_hwcap \|= HWCAP_DFP;
f17a6d5d HC	192
449fbd71	193	/* huge page support */
f17a6d5d HC	194	if (MACHINE_HAS_EDAT1)
	195	elf_hwcap \|= HWCAP_HPAGE;
	196
449fbd71	197	/* 64-bit register support for 31-bit processes */
f17a6d5d HC	198	elf_hwcap \|= HWCAP_HIGH_GPRS;
f17a6d5d HC	199
449fbd71	200	/* transactional execution */
f17a6d5d HC	201	if (MACHINE_HAS_TE)
	202	elf_hwcap \|= HWCAP_TE;
	203
	204	/*
449fbd71 HC	205	* Vector extension can be disabled with the "novx" parameter.
449fbd71 HC	206	* Use MACHINE_HAS_VX instead of facility bit 129.
f17a6d5d HC	207	*/
	208	if (MACHINE_HAS_VX) {
	209	elf_hwcap \|= HWCAP_VXRS;
	210	if (test_facility(134))
	211	elf_hwcap \|= HWCAP_VXRS_BCD;
	212	if (test_facility(135))
	213	elf_hwcap \|= HWCAP_VXRS_EXT;
	214	if (test_facility(148))
	215	elf_hwcap \|= HWCAP_VXRS_EXT2;
	216	if (test_facility(152))
	217	elf_hwcap \|= HWCAP_VXRS_PDE;
	218	if (test_facility(192))
	219	elf_hwcap \|= HWCAP_VXRS_PDE2;
	220	}
449fbd71	221
f17a6d5d HC	222	if (test_facility(150))
f17a6d5d HC	223	elf_hwcap \|= HWCAP_SORT;
449fbd71	224
f17a6d5d HC	225	if (test_facility(151))
f17a6d5d HC	226	elf_hwcap \|= HWCAP_DFLT;
449fbd71	227
f17a6d5d HC	228	if (test_facility(165))
	229	elf_hwcap \|= HWCAP_NNPA;
	230
449fbd71	231	/* guarded storage */
f17a6d5d HC	232	if (MACHINE_HAS_GS)
f17a6d5d HC	233	elf_hwcap \|= HWCAP_GS;
449fbd71	234
f17a6d5d HC	235	if (MACHINE_HAS_PCI_MIO)
	236	elf_hwcap \|= HWCAP_PCI_MIO;
	237
449fbd71	238	/* virtualization support */
873129ca	239	if (sclp.has_sief2)
7e82523f	240	elf_hwcap \|= HWCAP_SIE;
873129ca HC	241
	242	return 0;
	243	}
	244	arch_initcall(setup_hwcaps);
	245
	246	static int __init setup_elf_platform(void)
	247	{
	248	struct cpuid cpu_id;
	249
f17a6d5d HC	250	get_cpu_id(&cpu_id);
	251	add_device_randomness(&cpu_id, sizeof(cpu_id));
	252	switch (cpu_id.machine) {
4efd417f	253	default: /* Use "z10" as default. */
f17a6d5d HC	254	strcpy(elf_platform, "z10");
	255	break;
	256	case 0x2817:
	257	case 0x2818:
	258	strcpy(elf_platform, "z196");
	259	break;
	260	case 0x2827:
	261	case 0x2828:
	262	strcpy(elf_platform, "zEC12");
	263	break;
	264	case 0x2964:
	265	case 0x2965:
	266	strcpy(elf_platform, "z13");
	267	break;
	268	case 0x3906:
	269	case 0x3907:
	270	strcpy(elf_platform, "z14");
	271	break;
	272	case 0x8561:
	273	case 0x8562:
	274	strcpy(elf_platform, "z15");
	275	break;
6203ac30 HC	276	case 0x3931:
	277	case 0x3932:
	278	strcpy(elf_platform, "z16");
	279	break;
f17a6d5d	280	}
f17a6d5d HC	281	return 0;
f17a6d5d HC	282	}
873129ca	283	arch_initcall(setup_elf_platform);
f17a6d5d	284
fb835102 AG	285	static void show_cpu_topology(struct seq_file *m, unsigned long n)
	286	{
	287	#ifdef CONFIG_SCHED_TOPOLOGY
	288	seq_printf(m, "physical id : %d\n", topology_physical_package_id(n));
	289	seq_printf(m, "core id : %d\n", topology_core_id(n));
	290	seq_printf(m, "book id : %d\n", topology_book_id(n));
	291	seq_printf(m, "drawer id : %d\n", topology_drawer_id(n));
	292	seq_printf(m, "dedicated : %d\n", topology_cpu_dedicated(n));
42d211a1	293	seq_printf(m, "address : %d\n", smp_cpu_get_cpu_address(n));
2db52dc3	294	seq_printf(m, "siblings : %d\n", cpumask_weight(topology_core_cpumask(n)));
95968497	295	seq_printf(m, "cpu cores : %d\n", topology_booted_cores(n));
fb835102 AG	296	#endif /* CONFIG_SCHED_TOPOLOGY */
	297	}
	298
	299	static void show_cpu_ids(struct seq_file *m, unsigned long n)
	300	{
	301	struct cpuid *id = &per_cpu(cpu_info.cpu_id, n);
	302
	303	seq_printf(m, "version : %02X\n", id->version);
	304	seq_printf(m, "identification : %06X\n", id->ident);
	305	seq_printf(m, "machine : %04X\n", id->machine);
	306	}
	307
097a116c HC	308	static void show_cpu_mhz(struct seq_file *m, unsigned long n)
	309	{
	310	struct cpu_info *c = per_cpu_ptr(&cpu_info, n);
	311
1b648dfd AG	312	if (!machine_has_cpu_mhz)
1b648dfd AG	313	return;
097a116c HC	314	seq_printf(m, "cpu MHz dynamic : %d\n", c->cpu_mhz_dynamic);
	315	seq_printf(m, "cpu MHz static : %d\n", c->cpu_mhz_static);
	316	}
	317
219a21b3 HC	318	/*
	319	* show_cpuinfo - Get information on one CPU for use by procfs.
	320	*/
	321	static int show_cpuinfo(struct seq_file m, void v)
	322	{
	323	unsigned long n = (unsigned long) v - 1;
872f2710	324	unsigned long first = cpumask_first(cpu_online_mask);
219a21b3	325
872f2710	326	if (n == first)
219a21b3	327	show_cpu_summary(m, v);
109ab954	328	seq_printf(m, "\ncpu number : %ld\n", n);
fb835102 AG	329	show_cpu_topology(m, n);
fb835102 AG	330	show_cpu_ids(m, n);
097a116c	331	show_cpu_mhz(m, n);
7b468488	332	return 0;
395d31d4 MS	333	}
395d31d4 MS	334
281eaa8c HC	335	static inline void c_update(loff_t pos)
	336	{
	337	if (*pos)
	338	pos = cpumask_next(pos - 1, cpu_online_mask);
872f2710 AG	339	else
872f2710 AG	340	*pos = cpumask_first(cpu_online_mask);
281eaa8c HC	341	return pos < nr_cpu_ids ? (void )*pos + 1 : NULL;
	342	}
	343
395d31d4 MS	344	static void c_start(struct seq_file m, loff_t *pos)
395d31d4 MS	345	{
a73de293	346	cpus_read_lock();
281eaa8c	347	return c_update(pos);
395d31d4 MS	348	}
	349
	350	static void c_next(struct seq_file m, void v, loff_t pos)
	351	{
	352	++*pos;
281eaa8c	353	return c_update(pos);
395d31d4 MS	354	}
	355
	356	static void c_stop(struct seq_file m, void v)
	357	{
a73de293	358	cpus_read_unlock();
395d31d4 MS	359	}
	360
	361	const struct seq_operations cpuinfo_op = {
	362	.start = c_start,
	363	.next = c_next,
	364	.stop = c_stop,
	365	.show = show_cpuinfo,
	366	};