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Merge branch 'tracing/core' of git://git.kernel.org/pub/scm/linux/kernel/git/frederic...
[linux-2.6-block.git] / arch / s390 / kernel / entry64.S
CommitLineData
1da177e4 1/*
54dfe5dd 2 * arch/s390/kernel/entry64.S
1da177e4
LT		 3 * S390 low-level entry points.
4 *
54dfe5dd 5 * Copyright (C) IBM Corp. 1999,2006
1da177e4 6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
25d83cbf
HC		 7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
77fa2245 9 * Heiko Carstens <heiko.carstens@de.ibm.com>
1da177e4
LT		 10 */
11
12#include <linux/sys.h>
13#include <linux/linkage.h>
2bc89b5e 14#include <linux/init.h>
1da177e4
LT		 15#include <asm/cache.h>
16#include <asm/lowcore.h>
17#include <asm/errno.h>
18#include <asm/ptrace.h>
19#include <asm/thread_info.h>
0013a854 20#include <asm/asm-offsets.h>
1da177e4
LT		 21#include <asm/unistd.h>
22#include <asm/page.h>
23
24/*
25 * Stack layout for the system_call stack entry.
26 * The first few entries are identical to the user_regs_struct.
27 */
25d83cbf
HC		 28SP_PTREGS = STACK_FRAME_OVERHEAD
29SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
30SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
31SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
32SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
33SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
34SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
35SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
36SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
37SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
38SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
39SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
40SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
41SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
42SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
43SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
44SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
45SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
46SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
47SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
48SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
59da2139 49SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
25d83cbf 50SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
1da177e4
LT		 51
52STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
53STACK_SIZE = 1 << STACK_SHIFT
54
753c4dd6 55_TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 56 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_SINGLE_STEP )
753c4dd6 57_TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54dfe5dd 58 _TIF_MCCK_PENDING)
9bf1226b 59_TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
66700001 60 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
1da177e4
LT		 61
62#define BASED(name) name-system_call(%r13)
63
1f194a4c
HC		 64#ifdef CONFIG_TRACE_IRQFLAGS
65 .macro TRACE_IRQS_ON
50bec4ce
HC		 66 basr %r2,%r0
67 brasl %r14,trace_hardirqs_on_caller
1f194a4c
HC		 68 .endm
69
70 .macro TRACE_IRQS_OFF
50bec4ce
HC		 71 basr %r2,%r0
72 brasl %r14,trace_hardirqs_off_caller
1f194a4c 73 .endm
523b44cf 74
411788ea 75 .macro TRACE_IRQS_CHECK
50bec4ce 76 basr %r2,%r0
411788ea
HC		 77 tm SP_PSW(%r15),0x03 # irqs enabled?
78 jz 0f
50bec4ce 79 brasl %r14,trace_hardirqs_on_caller
411788ea 80 j 1f
50bec4ce 810: brasl %r14,trace_hardirqs_off_caller
411788ea 821:
523b44cf 83 .endm
1f194a4c
HC		 84#else
85#define TRACE_IRQS_ON
86#define TRACE_IRQS_OFF
411788ea
HC		 87#define TRACE_IRQS_CHECK
88#endif
89
90#ifdef CONFIG_LOCKDEP
91 .macro LOCKDEP_SYS_EXIT
92 tm SP_PSW+1(%r15),0x01 # returning to user ?
93 jz 0f
94 brasl %r14,lockdep_sys_exit
950:
96 .endm
97#else
523b44cf 98#define LOCKDEP_SYS_EXIT
1f194a4c
HC		 99#endif
100
25d83cbf 101 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
1da177e4
LT		 102 lg %r10,\lc_from
103 slg %r10,\lc_to
104 alg %r10,\lc_sum
105 stg %r10,\lc_sum
106 .endm
1da177e4
LT		 107
108/*
109 * Register usage in interrupt handlers:
110 * R9 - pointer to current task structure
111 * R13 - pointer to literal pool
112 * R14 - return register for function calls
113 * R15 - kernel stack pointer
114 */
115
25d83cbf 116 .macro SAVE_ALL_BASE savearea
1da177e4
LT		 117 stmg %r12,%r15,\savearea
118 larl %r13,system_call
119 .endm
120
987ad70a
MS		 121 .macro SAVE_ALL_SVC psworg,savearea
122 la %r12,\psworg
123 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
124 .endm
125
63b12246 126 .macro SAVE_ALL_SYNC psworg,savearea
1da177e4 127 la %r12,\psworg
1da177e4
LT		 128 tm \psworg+1,0x01 # test problem state bit
129 jz 2f # skip stack setup save
130 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
63b12246
MS		 131#ifdef CONFIG_CHECK_STACK
132 j 3f
1332: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
134 jz stack_overflow
1353:
136#endif
1372:
138 .endm
139
140 .macro SAVE_ALL_ASYNC psworg,savearea
141 la %r12,\psworg
1da177e4
LT		 142 tm \psworg+1,0x01 # test problem state bit
143 jnz 1f # from user -> load kernel stack
144 clc \psworg+8(8),BASED(.Lcritical_end)
145 jhe 0f
146 clc \psworg+8(8),BASED(.Lcritical_start)
147 jl 0f
148 brasl %r14,cleanup_critical
6add9f7f 149 tm 1(%r12),0x01 # retest problem state after cleanup
1da177e4
LT		 150 jnz 1f
1510: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
152 slgr %r14,%r15
153 srag %r14,%r14,STACK_SHIFT
154 jz 2f
1551: lg %r15,__LC_ASYNC_STACK # load async stack
1da177e4
LT		 156#ifdef CONFIG_CHECK_STACK
157 j 3f
1582: tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
159 jz stack_overflow
1603:
161#endif
77fa2245
HC		 1622:
163 .endm
164
165 .macro CREATE_STACK_FRAME psworg,savearea
25d83cbf
HC		 166 aghi %r15,-SP_SIZE # make room for registers & psw
167 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
1da177e4 168 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
59da2139 169 icm %r12,3,__LC_SVC_ILC
1da177e4 170 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
59da2139 171 st %r12,SP_SVCNR(%r15)
1da177e4
LT		 172 mvc SP_R12(32,%r15),\savearea # move %r12-%r15 to stack
173 la %r12,0
174 stg %r12,__SF_BACKCHAIN(%r15)
25d83cbf 175 .endm
1da177e4 176
ae6aa2ea
MS		 177 .macro RESTORE_ALL psworg,sync
178 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
1da177e4 179 .if !\sync
ae6aa2ea 180 ni \psworg+1,0xfd # clear wait state bit
1da177e4 181 .endif
c742b31c
MS		 182 lg %r14,__LC_VDSO_PER_CPU
183 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
c185b783 184 stpt __LC_EXIT_TIMER
c742b31c
MS		 185 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
186 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
ae6aa2ea 187 lpswe \psworg # back to caller
1da177e4
LT		 188 .endm
189
190/*
191 * Scheduler resume function, called by switch_to
192 * gpr2 = (task_struct *) prev
193 * gpr3 = (task_struct *) next
194 * Returns:
195 * gpr2 = prev
196 */
25d83cbf 197 .globl __switch_to
1da177e4
LT		 198__switch_to:
199 tm __THREAD_per+4(%r3),0xe8 # is the new process using per ?
200 jz __switch_to_noper # if not we're fine
25d83cbf
HC		 201 stctg %c9,%c11,__SF_EMPTY(%r15)# We are using per stuff
202 clc __THREAD_per(24,%r3),__SF_EMPTY(%r15)
203 je __switch_to_noper # we got away without bashing TLB's
204 lctlg %c9,%c11,__THREAD_per(%r3) # Nope we didn't
1da177e4 205__switch_to_noper:
25d83cbf 206 lg %r4,__THREAD_info(%r2) # get thread_info of prev
77fa2245
HC		 207 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
208 jz __switch_to_no_mcck
209 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
210 lg %r4,__THREAD_info(%r3) # get thread_info of next
211 oi __TI_flags+7(%r4),_TIF_MCCK_PENDING # set it in next
212__switch_to_no_mcck:
25d83cbf 213 stmg %r6,%r15,__SF_GPRS(%r15)# store __switch_to registers of prev task
1da177e4
LT		 214 stg %r15,__THREAD_ksp(%r2) # store kernel stack to prev->tss.ksp
215 lg %r15,__THREAD_ksp(%r3) # load kernel stack from next->tss.ksp
25d83cbf 216 lmg %r6,%r15,__SF_GPRS(%r15)# load __switch_to registers of next task
1da177e4
LT		 217 stg %r3,__LC_CURRENT # __LC_CURRENT = current task struct
218 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
25d83cbf 219 lg %r3,__THREAD_info(%r3) # load thread_info from task struct
1da177e4
LT		 220 stg %r3,__LC_THREAD_INFO
221 aghi %r3,STACK_SIZE
222 stg %r3,__LC_KERNEL_STACK # __LC_KERNEL_STACK = new kernel stack
223 br %r14
224
225__critical_start:
226/*
227 * SVC interrupt handler routine. System calls are synchronous events and
228 * are executed with interrupts enabled.
229 */
230
25d83cbf 231 .globl system_call
1da177e4 232system_call:
c185b783 233 stpt __LC_SYNC_ENTER_TIMER
1da177e4
LT		 234sysc_saveall:
235 SAVE_ALL_BASE __LC_SAVE_AREA
987ad70a 236 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
25d83cbf
HC		 237 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
238 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
1da177e4 239sysc_vtime:
1da177e4
LT		 240 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
241sysc_stime:
242 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
243sysc_update:
244 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4
LT		 245sysc_do_svc:
246 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
59da2139 247 ltgr %r7,%r7 # test for svc 0
1da177e4
LT		 248 jnz sysc_nr_ok
249 # svc 0: system call number in %r1
250 cl %r1,BASED(.Lnr_syscalls)
251 jnl sysc_nr_ok
25d83cbf 252 lgfr %r7,%r1 # clear high word in r1
1da177e4
LT		 253sysc_nr_ok:
254 mvc SP_ARGS(8,%r15),SP_R7(%r15)
255sysc_do_restart:
59da2139
MS		 256 sth %r7,SP_SVCNR(%r15)
257 sllg %r7,%r7,2 # svc number * 4
25d83cbf 258 larl %r10,sys_call_table
347a8dc3 259#ifdef CONFIG_COMPAT
c563077e
HC		 260 tm __TI_flags+5(%r9),(_TIF_31BIT>>16) # running in 31 bit mode ?
261 jno sysc_noemu
25d83cbf 262 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
1da177e4
LT		 263sysc_noemu:
264#endif
bcf5cef7 265 tm __TI_flags+6(%r9),_TIF_SYSCALL
25d83cbf
HC		 266 lgf %r8,0(%r7,%r10) # load address of system call routine
267 jnz sysc_tracesys
268 basr %r14,%r8 # call sys_xxxx
269 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
1da177e4
LT		 270
271sysc_return:
1da177e4 272 tm __TI_flags+7(%r9),_TIF_WORK_SVC
25d83cbf 273 jnz sysc_work # there is work to do (signals etc.)
411788ea
HC		 274sysc_restore:
275#ifdef CONFIG_TRACE_IRQFLAGS
276 larl %r1,sysc_restore_trace_psw
277 lpswe 0(%r1)
278sysc_restore_trace:
279 TRACE_IRQS_CHECK
523b44cf 280 LOCKDEP_SYS_EXIT
411788ea 281#endif
1da177e4 282sysc_leave:
25d83cbf 283 RESTORE_ALL __LC_RETURN_PSW,1
411788ea
HC		 284sysc_done:
285
286#ifdef CONFIG_TRACE_IRQFLAGS
a8c3cb49 287 .section .data,"aw",@progbits
411788ea
HC		 288 .align 8
289 .globl sysc_restore_trace_psw
290sysc_restore_trace_psw:
291 .quad 0, sysc_restore_trace
a8c3cb49 292 .previous
411788ea 293#endif
1da177e4
LT		 294
295#
296# recheck if there is more work to do
297#
298sysc_work_loop:
299 tm __TI_flags+7(%r9),_TIF_WORK_SVC
411788ea 300 jz sysc_restore # there is no work to do
1da177e4
LT		 301#
302# One of the work bits is on. Find out which one.
303#
304sysc_work:
2688905e
MS		 305 tm SP_PSW+1(%r15),0x01 # returning to user ?
306 jno sysc_restore
77fa2245
HC		 307 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
308 jo sysc_mcck_pending
1da177e4
LT		 309 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
310 jo sysc_reschedule
02a029b3 311 tm __TI_flags+7(%r9),_TIF_SIGPENDING
54dfe5dd 312 jnz sysc_sigpending
753c4dd6
MS		 313 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
314 jnz sysc_notify_resume
1da177e4
LT		 315 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
316 jo sysc_restart
317 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
318 jo sysc_singlestep
411788ea
HC		 319 j sysc_restore
320sysc_work_done:
1da177e4
LT		 321
322#
323# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC		 324#
325sysc_reschedule:
326 larl %r14,sysc_work_loop
327 jg schedule # return point is sysc_return
1da177e4 328
77fa2245
HC		 329#
330# _TIF_MCCK_PENDING is set, call handler
331#
332sysc_mcck_pending:
333 larl %r14,sysc_work_loop
25d83cbf 334 jg s390_handle_mcck # TIF bit will be cleared by handler
77fa2245 335
1da177e4 336#
02a029b3 337# _TIF_SIGPENDING is set, call do_signal
1da177e4 338#
25d83cbf 339sysc_sigpending:
1da177e4 340 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
25d83cbf
HC		 341 la %r2,SP_PTREGS(%r15) # load pt_regs
342 brasl %r14,do_signal # call do_signal
1da177e4
LT		 343 tm __TI_flags+7(%r9),_TIF_RESTART_SVC
344 jo sysc_restart
345 tm __TI_flags+7(%r9),_TIF_SINGLE_STEP
346 jo sysc_singlestep
e1c3ad96 347 j sysc_work_loop
1da177e4 348
753c4dd6
MS		 349#
350# _TIF_NOTIFY_RESUME is set, call do_notify_resume
351#
352sysc_notify_resume:
353 la %r2,SP_PTREGS(%r15) # load pt_regs
354 larl %r14,sysc_work_loop
355 jg do_notify_resume # call do_notify_resume
356
1da177e4
LT		 357#
358# _TIF_RESTART_SVC is set, set up registers and restart svc
359#
360sysc_restart:
361 ni __TI_flags+7(%r9),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
25d83cbf 362 lg %r7,SP_R2(%r15) # load new svc number
1da177e4 363 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
25d83cbf
HC		 364 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
365 j sysc_do_restart # restart svc
1da177e4
LT		 366
367#
368# _TIF_SINGLE_STEP is set, call do_single_step
369#
370sysc_singlestep:
59da2139
MS		 371 ni __TI_flags+7(%r9),255-_TIF_SINGLE_STEP # clear TIF_SINGLE_STEP
372 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
1da177e4
LT		 373 la %r2,SP_PTREGS(%r15) # address of register-save area
374 larl %r14,sysc_return # load adr. of system return
375 jg do_single_step # branch to do_sigtrap
376
1da177e4 377#
753c4dd6
MS		 378# call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
379# and after the system call
1da177e4
LT		 380#
381sysc_tracesys:
25d83cbf 382 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 383 la %r3,0
384 srl %r7,2
25d83cbf 385 stg %r7,SP_R2(%r15)
753c4dd6 386 brasl %r14,do_syscall_trace_enter
1da177e4 387 lghi %r0,NR_syscalls
753c4dd6 388 clgr %r0,%r2
1da177e4 389 jnh sysc_tracenogo
59da2139 390 sllg %r7,%r2,2 # svc number *4
1da177e4
LT		 391 lgf %r8,0(%r7,%r10)
392sysc_tracego:
25d83cbf
HC		 393 lmg %r3,%r6,SP_R3(%r15)
394 lg %r2,SP_ORIG_R2(%r15)
395 basr %r14,%r8 # call sys_xxx
396 stg %r2,SP_R2(%r15) # store return value
1da177e4 397sysc_tracenogo:
bcf5cef7 398 tm __TI_flags+6(%r9),_TIF_SYSCALL
25d83cbf
HC		 399 jz sysc_return
400 la %r2,SP_PTREGS(%r15) # load pt_regs
25d83cbf 401 larl %r14,sysc_return # return point is sysc_return
753c4dd6 402 jg do_syscall_trace_exit
1da177e4
LT		 403
404#
405# a new process exits the kernel with ret_from_fork
406#
25d83cbf 407 .globl ret_from_fork
1da177e4
LT		 408ret_from_fork:
409 lg %r13,__LC_SVC_NEW_PSW+8
410 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
411 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
412 jo 0f
413 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
25d83cbf 4140: brasl %r14,schedule_tail
1f194a4c 415 TRACE_IRQS_ON
25d83cbf 416 stosm 24(%r15),0x03 # reenable interrupts
8f2961c3 417 j sysc_tracenogo
1da177e4
LT		 418
419#
03ff9a23
MS		 420# kernel_execve function needs to deal with pt_regs that is not
421# at the usual place
1da177e4 422#
03ff9a23
MS		 423 .globl kernel_execve
424kernel_execve:
425 stmg %r12,%r15,96(%r15)
426 lgr %r14,%r15
427 aghi %r15,-SP_SIZE
428 stg %r14,__SF_BACKCHAIN(%r15)
429 la %r12,SP_PTREGS(%r15)
430 xc 0(__PT_SIZE,%r12),0(%r12)
431 lgr %r5,%r12
432 brasl %r14,do_execve
433 ltgfr %r2,%r2
434 je 0f
435 aghi %r15,SP_SIZE
436 lmg %r12,%r15,96(%r15)
437 br %r14
438 # execve succeeded.
4390: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
440 lg %r15,__LC_KERNEL_STACK # load ksp
441 aghi %r15,-SP_SIZE # make room for registers & psw
442 lg %r13,__LC_SVC_NEW_PSW+8
443 lg %r9,__LC_THREAD_INFO
444 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
445 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
446 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
447 brasl %r14,execve_tail
448 j sysc_return
1da177e4
LT		 449
450/*
451 * Program check handler routine
452 */
453
25d83cbf 454 .globl pgm_check_handler
1da177e4
LT		 455pgm_check_handler:
456/*
457 * First we need to check for a special case:
458 * Single stepping an instruction that disables the PER event mask will
459 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
460 * For a single stepped SVC the program check handler gets control after
461 * the SVC new PSW has been loaded. But we want to execute the SVC first and
462 * then handle the PER event. Therefore we update the SVC old PSW to point
463 * to the pgm_check_handler and branch to the SVC handler after we checked
464 * if we have to load the kernel stack register.
465 * For every other possible cause for PER event without the PER mask set
466 * we just ignore the PER event (FIXME: is there anything we have to do
467 * for LPSW?).
468 */
c185b783 469 stpt __LC_SYNC_ENTER_TIMER
1da177e4 470 SAVE_ALL_BASE __LC_SAVE_AREA
25d83cbf
HC		 471 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
472 jnz pgm_per # got per exception -> special case
63b12246 473 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 474 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 475 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
476 jz pgm_no_vtime
477 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
478 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
479 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
480pgm_no_vtime:
1da177e4 481 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
9e74a6b8 482 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
411788ea 483 TRACE_IRQS_OFF
25d83cbf 484 lgf %r3,__LC_PGM_ILC # load program interruption code
1da177e4
LT		 485 lghi %r8,0x7f
486 ngr %r8,%r3
487pgm_do_call:
25d83cbf
HC		 488 sll %r8,3
489 larl %r1,pgm_check_table
490 lg %r1,0(%r8,%r1) # load address of handler routine
491 la %r2,SP_PTREGS(%r15) # address of register-save area
1da177e4 492 larl %r14,sysc_return
25d83cbf 493 br %r1 # branch to interrupt-handler
1da177e4
LT		 494
495#
496# handle per exception
497#
498pgm_per:
25d83cbf
HC		 499 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
500 jnz pgm_per_std # ok, normal per event from user space
1da177e4 501# ok its one of the special cases, now we need to find out which one
25d83cbf
HC		 502 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
503 je pgm_svcper
1da177e4
LT		 504# no interesting special case, ignore PER event
505 lmg %r12,%r15,__LC_SAVE_AREA
25d83cbf 506 lpswe __LC_PGM_OLD_PSW
1da177e4
LT		 507
508#
509# Normal per exception
510#
511pgm_per_std:
63b12246 512 SAVE_ALL_SYNC __LC_PGM_OLD_PSW,__LC_SAVE_AREA
77fa2245 513 CREATE_STACK_FRAME __LC_PGM_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 514 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
515 jz pgm_no_vtime2
516 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
517 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
518 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
519pgm_no_vtime2:
1da177e4 520 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
411788ea 521 TRACE_IRQS_OFF
1da177e4 522 lg %r1,__TI_task(%r9)
4ba069b8
MG		 523 tm SP_PSW+1(%r15),0x01 # kernel per event ?
524 jz kernel_per
1da177e4
LT		 525 mvc __THREAD_per+__PER_atmid(2,%r1),__LC_PER_ATMID
526 mvc __THREAD_per+__PER_address(8,%r1),__LC_PER_ADDRESS
527 mvc __THREAD_per+__PER_access_id(1,%r1),__LC_PER_ACCESS_ID
528 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
25d83cbf 529 lgf %r3,__LC_PGM_ILC # load program interruption code
1da177e4 530 lghi %r8,0x7f
25d83cbf 531 ngr %r8,%r3 # clear per-event-bit and ilc
1da177e4
LT		 532 je sysc_return
533 j pgm_do_call
534
535#
536# it was a single stepped SVC that is causing all the trouble
537#
538pgm_svcper:
63b12246 539 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 540 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
1da177e4
LT		 541 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
542 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
543 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
25d83cbf 544 llgh %r7,__LC_SVC_INT_CODE # get svc number from lowcore
1da177e4 545 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
bcc6525f
CB		 546 lg %r8,__TI_task(%r9)
547 mvc __THREAD_per+__PER_atmid(2,%r8),__LC_PER_ATMID
548 mvc __THREAD_per+__PER_address(8,%r8),__LC_PER_ADDRESS
549 mvc __THREAD_per+__PER_access_id(1,%r8),__LC_PER_ACCESS_ID
1da177e4 550 oi __TI_flags+7(%r9),_TIF_SINGLE_STEP # set TIF_SINGLE_STEP
1f194a4c 551 TRACE_IRQS_ON
21ec7f6d 552 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
1da177e4
LT		 553 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
554 j sysc_do_svc
555
4ba069b8
MG		 556#
557# per was called from kernel, must be kprobes
558#
559kernel_per:
59da2139 560 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
4ba069b8 561 la %r2,SP_PTREGS(%r15) # address of register-save area
411788ea 562 larl %r14,sysc_restore # load adr. of system ret, no work
4ba069b8
MG		 563 jg do_single_step # branch to do_single_step
564
1da177e4
LT		 565/*
566 * IO interrupt handler routine
567 */
25d83cbf 568 .globl io_int_handler
1da177e4 569io_int_handler:
1da177e4 570 stck __LC_INT_CLOCK
9cfb9b3c 571 stpt __LC_ASYNC_ENTER_TIMER
1da177e4 572 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 573 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 574 CREATE_STACK_FRAME __LC_IO_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 575 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
576 jz io_no_vtime
577 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
578 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
579 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
580io_no_vtime:
1da177e4 581 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 582 TRACE_IRQS_OFF
25d83cbf
HC		 583 la %r2,SP_PTREGS(%r15) # address of register-save area
584 brasl %r14,do_IRQ # call standard irq handler
1da177e4 585io_return:
1da177e4 586 tm __TI_flags+7(%r9),_TIF_WORK_INT
25d83cbf 587 jnz io_work # there is work to do (signals etc.)
411788ea
HC		 588io_restore:
589#ifdef CONFIG_TRACE_IRQFLAGS
590 larl %r1,io_restore_trace_psw
591 lpswe 0(%r1)
592io_restore_trace:
593 TRACE_IRQS_CHECK
523b44cf 594 LOCKDEP_SYS_EXIT
411788ea 595#endif
1da177e4 596io_leave:
25d83cbf 597 RESTORE_ALL __LC_RETURN_PSW,0
ae6aa2ea 598io_done:
1da177e4 599
411788ea 600#ifdef CONFIG_TRACE_IRQFLAGS
a8c3cb49 601 .section .data,"aw",@progbits
411788ea
HC		 602 .align 8
603 .globl io_restore_trace_psw
604io_restore_trace_psw:
605 .quad 0, io_restore_trace
a8c3cb49 606 .previous
411788ea
HC		 607#endif
608
2688905e 609#
0eaeafa1
CB		 610# There is work todo, we need to check if we return to userspace, then
611# check, if we are in SIE, if yes leave it
2688905e
MS		 612#
613io_work:
614 tm SP_PSW+1(%r15),0x01 # returning to user ?
615#ifndef CONFIG_PREEMPT
0eaeafa1
CB		 616#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
617 jnz io_work_user # yes -> no need to check for SIE
618 la %r1, BASED(sie_opcode) # we return to kernel here
619 lg %r2, SP_PSW+8(%r15)
620 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
621 jne io_restore # no-> return to kernel
622 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
623 aghi %r1, 4
624 stg %r1, SP_PSW+8(%r15)
625 j io_restore # return to kernel
626#else
2688905e 627 jno io_restore # no-> skip resched & signal
0eaeafa1 628#endif
2688905e
MS		 629#else
630 jnz io_work_user # yes -> do resched & signal
0eaeafa1
CB		 631#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
632 la %r1, BASED(sie_opcode)
633 lg %r2, SP_PSW+8(%r15)
634 clc 0(2,%r1), 0(%r2) # is current instruction = SIE?
635 jne 0f # no -> leave PSW alone
636 lg %r1, SP_PSW+8(%r15) # yes-> add 4 bytes to leave SIE
637 aghi %r1, 4
638 stg %r1, SP_PSW+8(%r15)
6390:
640#endif
2688905e 641 # check for preemptive scheduling
25d83cbf 642 icm %r0,15,__TI_precount(%r9)
2688905e 643 jnz io_restore # preemption is disabled
1da177e4
LT		 644 # switch to kernel stack
645 lg %r1,SP_R15(%r15)
646 aghi %r1,-SP_SIZE
647 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 648 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4
LT		 649 lgr %r15,%r1
650io_resume_loop:
651 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
411788ea 652 jno io_restore
b8e7a54c
HC		 653 larl %r14,io_resume_loop
654 jg preempt_schedule_irq
1da177e4
LT		 655#endif
656
2688905e 657io_work_user:
1da177e4
LT		 658 lg %r1,__LC_KERNEL_STACK
659 aghi %r1,-SP_SIZE
660 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
25d83cbf 661 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
1da177e4
LT		 662 lgr %r15,%r1
663#
664# One of the work bits is on. Find out which one.
54dfe5dd
HC		 665# Checked are: _TIF_SIGPENDING, _TIF_RESTORE_SIGPENDING, _TIF_NEED_RESCHED
666# and _TIF_MCCK_PENDING
1da177e4
LT		 667#
668io_work_loop:
77fa2245
HC		 669 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
670 jo io_mcck_pending
1da177e4
LT		 671 tm __TI_flags+7(%r9),_TIF_NEED_RESCHED
672 jo io_reschedule
02a029b3 673 tm __TI_flags+7(%r9),_TIF_SIGPENDING
54dfe5dd 674 jnz io_sigpending
753c4dd6
MS		 675 tm __TI_flags+7(%r9),_TIF_NOTIFY_RESUME
676 jnz io_notify_resume
411788ea
HC		 677 j io_restore
678io_work_done:
1da177e4 679
0eaeafa1
CB		 680#if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
681sie_opcode:
682 .long 0xb2140000
683#endif
684
77fa2245
HC		 685#
686# _TIF_MCCK_PENDING is set, call handler
687#
688io_mcck_pending:
b771aeac 689 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
b771aeac 690 j io_work_loop
77fa2245 691
1da177e4
LT		 692#
693# _TIF_NEED_RESCHED is set, call schedule
25d83cbf
HC		 694#
695io_reschedule:
411788ea 696 TRACE_IRQS_ON
25d83cbf
HC		 697 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
698 brasl %r14,schedule # call scheduler
699 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 700 TRACE_IRQS_OFF
1da177e4 701 tm __TI_flags+7(%r9),_TIF_WORK_INT
411788ea 702 jz io_restore # there is no work to do
1da177e4
LT		 703 j io_work_loop
704
705#
02a029b3 706# _TIF_SIGPENDING or is set, call do_signal
1da177e4 707#
25d83cbf 708io_sigpending:
411788ea 709 TRACE_IRQS_ON
25d83cbf
HC		 710 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
711 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4 712 brasl %r14,do_signal # call do_signal
25d83cbf 713 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
411788ea 714 TRACE_IRQS_OFF
e1c3ad96 715 j io_work_loop
1da177e4 716
753c4dd6
MS		 717#
718# _TIF_NOTIFY_RESUME or is set, call do_notify_resume
719#
720io_notify_resume:
721 TRACE_IRQS_ON
722 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
723 la %r2,SP_PTREGS(%r15) # load pt_regs
724 brasl %r14,do_notify_resume # call do_notify_resume
725 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
726 TRACE_IRQS_OFF
727 j io_work_loop
728
1da177e4
LT		 729/*
730 * External interrupt handler routine
731 */
25d83cbf 732 .globl ext_int_handler
1da177e4 733ext_int_handler:
1da177e4 734 stck __LC_INT_CLOCK
9cfb9b3c 735 stpt __LC_ASYNC_ENTER_TIMER
1da177e4 736 SAVE_ALL_BASE __LC_SAVE_AREA+32
63b12246 737 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
77fa2245 738 CREATE_STACK_FRAME __LC_EXT_OLD_PSW,__LC_SAVE_AREA+32
1da177e4
LT		 739 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
740 jz ext_no_vtime
741 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
742 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
743 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
744ext_no_vtime:
1da177e4 745 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
1f194a4c 746 TRACE_IRQS_OFF
25d83cbf
HC		 747 la %r2,SP_PTREGS(%r15) # address of register-save area
748 llgh %r3,__LC_EXT_INT_CODE # get interruption code
749 brasl %r14,do_extint
1da177e4
LT		 750 j io_return
751
ae6aa2ea
MS		 752__critical_end:
753
1da177e4
LT		 754/*
755 * Machine check handler routines
756 */
25d83cbf 757 .globl mcck_int_handler
1da177e4 758mcck_int_handler:
9cfb9b3c 759 stck __LC_INT_CLOCK
77fa2245
HC		 760 la %r1,4095 # revalidate r1
761 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
25d83cbf 762 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
1da177e4 763 SAVE_ALL_BASE __LC_SAVE_AREA+64
77fa2245 764 la %r12,__LC_MCK_OLD_PSW
25d83cbf 765 tm __LC_MCCK_CODE,0x80 # system damage?
77fa2245 766 jo mcck_int_main # yes -> rest of mcck code invalid
63b12246
MS		 767 la %r14,4095
768 mvc __LC_SAVE_AREA+104(8),__LC_ASYNC_ENTER_TIMER
769 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
770 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
771 jo 1f
772 la %r14,__LC_SYNC_ENTER_TIMER
773 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
774 jl 0f
775 la %r14,__LC_ASYNC_ENTER_TIMER
7760: clc 0(8,%r14),__LC_EXIT_TIMER
777 jl 0f
778 la %r14,__LC_EXIT_TIMER
7790: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
780 jl 0f
781 la %r14,__LC_LAST_UPDATE_TIMER
7820: spt 0(%r14)
783 mvc __LC_ASYNC_ENTER_TIMER(8),0(%r14)
c185b783 7841: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
77fa2245 785 jno mcck_int_main # no -> skip cleanup critical
25d83cbf 786 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
77fa2245
HC		 787 jnz mcck_int_main # from user -> load kernel stack
788 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
789 jhe mcck_int_main
25d83cbf 790 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
77fa2245 791 jl mcck_int_main
25d83cbf 792 brasl %r14,cleanup_critical
77fa2245 793mcck_int_main:
25d83cbf 794 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
77fa2245
HC		 795 slgr %r14,%r15
796 srag %r14,%r14,PAGE_SHIFT
797 jz 0f
25d83cbf 798 lg %r15,__LC_PANIC_STACK # load panic stack
77fa2245 7990: CREATE_STACK_FRAME __LC_MCK_OLD_PSW,__LC_SAVE_AREA+64
ae6aa2ea
MS		 800 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
801 jno mcck_no_vtime # no -> no timer update
63b12246 802 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
ae6aa2ea
MS		 803 jz mcck_no_vtime
804 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
805 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
806 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
807mcck_no_vtime:
77fa2245
HC		 808 lg %r9,__LC_THREAD_INFO # load pointer to thread_info struct
809 la %r2,SP_PTREGS(%r15) # load pt_regs
810 brasl %r14,s390_do_machine_check
25d83cbf 811 tm SP_PSW+1(%r15),0x01 # returning to user ?
77fa2245
HC		 812 jno mcck_return
813 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
814 aghi %r1,-SP_SIZE
815 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
816 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
817 lgr %r15,%r1
818 stosm __SF_EMPTY(%r15),0x04 # turn dat on
819 tm __TI_flags+7(%r9),_TIF_MCCK_PENDING
820 jno mcck_return
1f194a4c 821 TRACE_IRQS_OFF
77fa2245 822 brasl %r14,s390_handle_mcck
1f194a4c 823 TRACE_IRQS_ON
1da177e4 824mcck_return:
63b12246
MS		 825 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
826 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
827 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
63b12246
MS		 828 mvc __LC_ASYNC_ENTER_TIMER(8),__LC_SAVE_AREA+104
829 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
830 jno 0f
831 stpt __LC_EXIT_TIMER
c185b783 8320: lpswe __LC_RETURN_MCCK_PSW # back to caller
1da177e4 833
1da177e4
LT		 834/*
835 * Restart interruption handler, kick starter for additional CPUs
836 */
84b36a8e 837#ifdef CONFIG_SMP
2bc89b5e 838 __CPUINIT
25d83cbf 839 .globl restart_int_handler
1da177e4 840restart_int_handler:
5b409ed1
MS		 841 basr %r1,0
842restart_base:
843 spt restart_vtime-restart_base(%r1)
844 stck __LC_LAST_UPDATE_CLOCK
845 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
846 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
25d83cbf
HC		 847 lg %r15,__LC_SAVE_AREA+120 # load ksp
848 lghi %r10,__LC_CREGS_SAVE_AREA
849 lctlg %c0,%c15,0(%r10) # get new ctl regs
850 lghi %r10,__LC_AREGS_SAVE_AREA
851 lam %a0,%a15,0(%r10)
852 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
5b409ed1
MS		 853 lg %r1,__LC_THREAD_INFO
854 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
855 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
856 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
25d83cbf
HC		 857 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
858 jg start_secondary
5b409ed1
MS		 859 .align 8
860restart_vtime:
861 .long 0x7fffffff,0xffffffff
84b36a8e 862 .previous
1da177e4
LT		 863#else
864/*
865 * If we do not run with SMP enabled, let the new CPU crash ...
866 */
25d83cbf 867 .globl restart_int_handler
1da177e4 868restart_int_handler:
25d83cbf 869 basr %r1,0
1da177e4 870restart_base:
25d83cbf
HC		 871 lpswe restart_crash-restart_base(%r1)
872 .align 8
1da177e4 873restart_crash:
25d83cbf 874 .long 0x000a0000,0x00000000,0x00000000,0x00000000
1da177e4
LT		 875restart_go:
876#endif
877
878#ifdef CONFIG_CHECK_STACK
879/*
880 * The synchronous or the asynchronous stack overflowed. We are dead.
881 * No need to properly save the registers, we are going to panic anyway.
882 * Setup a pt_regs so that show_trace can provide a good call trace.
883 */
884stack_overflow:
885 lg %r15,__LC_PANIC_STACK # change to panic stack
9514e231 886 aghi %r15,-SP_SIZE
1da177e4
LT		 887 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
888 stmg %r0,%r11,SP_R0(%r15) # store gprs %r0-%r11 to kernel stack
889 la %r1,__LC_SAVE_AREA
890 chi %r12,__LC_SVC_OLD_PSW
891 je 0f
892 chi %r12,__LC_PGM_OLD_PSW
893 je 0f
9514e231 894 la %r1,__LC_SAVE_AREA+32
25d83cbf 8950: mvc SP_R12(32,%r15),0(%r1) # move %r12-%r15 to stack
9e74a6b8 896 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
25d83cbf
HC		 897 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
898 la %r2,SP_PTREGS(%r15) # load pt_regs
1da177e4
LT		 899 jg kernel_stack_overflow
900#endif
901
902cleanup_table_system_call:
903 .quad system_call, sysc_do_svc
904cleanup_table_sysc_return:
905 .quad sysc_return, sysc_leave
906cleanup_table_sysc_leave:
411788ea 907 .quad sysc_leave, sysc_done
1da177e4 908cleanup_table_sysc_work_loop:
411788ea 909 .quad sysc_work_loop, sysc_work_done
63b12246
MS		 910cleanup_table_io_return:
911 .quad io_return, io_leave
ae6aa2ea
MS		 912cleanup_table_io_leave:
913 .quad io_leave, io_done
914cleanup_table_io_work_loop:
411788ea 915 .quad io_work_loop, io_work_done
1da177e4
LT		 916
917cleanup_critical:
918 clc 8(8,%r12),BASED(cleanup_table_system_call)
919 jl 0f
920 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
921 jl cleanup_system_call
9220:
923 clc 8(8,%r12),BASED(cleanup_table_sysc_return)
924 jl 0f
925 clc 8(8,%r12),BASED(cleanup_table_sysc_return+8)
926 jl cleanup_sysc_return
9270:
928 clc 8(8,%r12),BASED(cleanup_table_sysc_leave)
929 jl 0f
930 clc 8(8,%r12),BASED(cleanup_table_sysc_leave+8)
931 jl cleanup_sysc_leave
9320:
933 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop)
934 jl 0f
935 clc 8(8,%r12),BASED(cleanup_table_sysc_work_loop+8)
77fa2245 936 jl cleanup_sysc_return
63b12246
MS		 9370:
938 clc 8(8,%r12),BASED(cleanup_table_io_return)
939 jl 0f
940 clc 8(8,%r12),BASED(cleanup_table_io_return+8)
941 jl cleanup_io_return
ae6aa2ea
MS		 9420:
943 clc 8(8,%r12),BASED(cleanup_table_io_leave)
944 jl 0f
945 clc 8(8,%r12),BASED(cleanup_table_io_leave+8)
946 jl cleanup_io_leave
9470:
948 clc 8(8,%r12),BASED(cleanup_table_io_work_loop)
949 jl 0f
950 clc 8(8,%r12),BASED(cleanup_table_io_work_loop+8)
951 jl cleanup_io_return
1da177e4
LT		 9520:
953 br %r14
954
955cleanup_system_call:
956 mvc __LC_RETURN_PSW(16),0(%r12)
ae6aa2ea
MS		 957 cghi %r12,__LC_MCK_OLD_PSW
958 je 0f
959 la %r12,__LC_SAVE_AREA+32
960 j 1f
9610: la %r12,__LC_SAVE_AREA+64
9621:
1da177e4
LT		 963 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
964 jh 0f
965 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
9660: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
967 jhe cleanup_vtime
1da177e4
LT		 968 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
969 jh 0f
ae6aa2ea
MS		 970 mvc __LC_SAVE_AREA(32),0(%r12)
9710: stg %r13,8(%r12)
972 stg %r12,__LC_SAVE_AREA+96 # argh
63b12246 973 SAVE_ALL_SYNC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
77fa2245 974 CREATE_STACK_FRAME __LC_SVC_OLD_PSW,__LC_SAVE_AREA
ae6aa2ea
MS		 975 lg %r12,__LC_SAVE_AREA+96 # argh
976 stg %r15,24(%r12)
1da177e4 977 llgh %r7,__LC_SVC_INT_CODE
1da177e4
LT		 978cleanup_vtime:
979 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
980 jhe cleanup_stime
1da177e4
LT		 981 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
982cleanup_stime:
983 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
984 jh cleanup_update
985 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
986cleanup_update:
987 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
1da177e4
LT		 988 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
989 la %r12,__LC_RETURN_PSW
990 br %r14
991cleanup_system_call_insn:
992 .quad sysc_saveall
25d83cbf
HC		 993 .quad system_call
994 .quad sysc_vtime
995 .quad sysc_stime
996 .quad sysc_update
1da177e4
LT		 997
998cleanup_sysc_return:
999 mvc __LC_RETURN_PSW(8),0(%r12)
1000 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_return)
1001 la %r12,__LC_RETURN_PSW
1002 br %r14
1003
1004cleanup_sysc_leave:
1005 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn)
c742b31c 1006 je 3f
1da177e4 1007 clc 8(8,%r12),BASED(cleanup_sysc_leave_insn+8)
c742b31c
MS		 1008 jhe 0f
1009 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
10100: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea 1011 cghi %r12,__LC_MCK_OLD_PSW
c742b31c 1012 jne 1f
ae6aa2ea 1013 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
c742b31c
MS		 1014 j 2f
10151: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
10162: lmg %r0,%r11,SP_R0(%r15)
1da177e4 1017 lg %r15,SP_R15(%r15)
c742b31c 10183: la %r12,__LC_RETURN_PSW
1da177e4
LT		 1019 br %r14
1020cleanup_sysc_leave_insn:
411788ea 1021 .quad sysc_done - 4
c742b31c 1022 .quad sysc_done - 16
1da177e4 1023
ae6aa2ea
MS		 1024cleanup_io_return:
1025 mvc __LC_RETURN_PSW(8),0(%r12)
1026 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_work_loop)
1027 la %r12,__LC_RETURN_PSW
1028 br %r14
1029
1030cleanup_io_leave:
1031 clc 8(8,%r12),BASED(cleanup_io_leave_insn)
c742b31c 1032 je 3f
ae6aa2ea 1033 clc 8(8,%r12),BASED(cleanup_io_leave_insn+8)
c742b31c
MS		 1034 jhe 0f
1035 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
10360: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
ae6aa2ea 1037 cghi %r12,__LC_MCK_OLD_PSW
c742b31c 1038 jne 1f
ae6aa2ea 1039 mvc __LC_SAVE_AREA+64(32),SP_R12(%r15)
c742b31c
MS		 1040 j 2f
10411: mvc __LC_SAVE_AREA+32(32),SP_R12(%r15)
10422: lmg %r0,%r11,SP_R0(%r15)
ae6aa2ea 1043 lg %r15,SP_R15(%r15)
c742b31c 10443: la %r12,__LC_RETURN_PSW
ae6aa2ea
MS		 1045 br %r14
1046cleanup_io_leave_insn:
411788ea 1047 .quad io_done - 4
c742b31c 1048 .quad io_done - 16
ae6aa2ea 1049
1da177e4
LT		 1050/*
1051 * Integer constants
1052 */
25d83cbf 1053 .align 4
1da177e4 1054.Lconst:
25d83cbf
HC		 1055.Lnr_syscalls: .long NR_syscalls
1056.L0x0130: .short 0x130
1057.L0x0140: .short 0x140
1058.L0x0150: .short 0x150
1059.L0x0160: .short 0x160
1060.L0x0170: .short 0x170
1da177e4 1061.Lcritical_start:
25d83cbf 1062 .quad __critical_start
1da177e4 1063.Lcritical_end:
25d83cbf 1064 .quad __critical_end
1da177e4 1065
25d83cbf 1066 .section .rodata, "a"
1da177e4 1067#define SYSCALL(esa,esame,emu) .long esame
9bf1226b 1068 .globl sys_call_table
1da177e4
LT		 1069sys_call_table:
1070#include "syscalls.S"
1071#undef SYSCALL
1072
347a8dc3 1073#ifdef CONFIG_COMPAT
1da177e4
LT		 1074
1075#define SYSCALL(esa,esame,emu) .long emu
1da177e4
LT		 1076sys_call_table_emu:
1077#include "syscalls.S"
1078#undef SYSCALL
1079#endif
Linux 6.x block layer and io_uring tree(s)