[linux-2.6-block.git] / arch / s390 / kernel / base.S

/*
 *  arch/s390/kernel/base.S
 *
 *    Copyright IBM Corp. 2006,2007
 *    Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
 *		 Michael Holzheu <holzheu@de.ibm.com>
 */

#include <linux/linkage.h>
#include <asm/asm-offsets.h>
#include <asm/ptrace.h>

#ifdef CONFIG_64BIT

ENTRY(s390_base_mcck_handler)
	basr	%r13,0
0:	lg	%r15,__LC_PANIC_STACK	# load panic stack
	aghi	%r15,-STACK_FRAME_OVERHEAD
	larl	%r1,s390_base_mcck_handler_fn
	lg	%r1,0(%r1)
	ltgr	%r1,%r1
	jz	1f
	basr	%r14,%r1
1:	la	%r1,4095
	lmg	%r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
	lpswe	__LC_MCK_OLD_PSW

	.section .bss
	.align 8
	.globl	s390_base_mcck_handler_fn
s390_base_mcck_handler_fn:
	.quad	0
	.previous

ENTRY(s390_base_ext_handler)
	stmg	%r0,%r15,__LC_SAVE_AREA_ASYNC
	basr	%r13,0
0:	aghi	%r15,-STACK_FRAME_OVERHEAD
	larl	%r1,s390_base_ext_handler_fn
	lg	%r1,0(%r1)
	ltgr	%r1,%r1
	jz	1f
	basr	%r14,%r1
1:	lmg	%r0,%r15,__LC_SAVE_AREA_ASYNC
	ni	__LC_EXT_OLD_PSW+1,0xfd	# clear wait state bit
	lpswe	__LC_EXT_OLD_PSW

	.section .bss
	.align 8
	.globl s390_base_ext_handler_fn
s390_base_ext_handler_fn:
	.quad	0
	.previous

ENTRY(s390_base_pgm_handler)
	stmg	%r0,%r15,__LC_SAVE_AREA_SYNC
	basr	%r13,0
0:	aghi	%r15,-STACK_FRAME_OVERHEAD
	larl	%r1,s390_base_pgm_handler_fn
	lg	%r1,0(%r1)
	ltgr	%r1,%r1
	jz	1f
	basr	%r14,%r1
	lmg	%r0,%r15,__LC_SAVE_AREA_SYNC
	lpswe	__LC_PGM_OLD_PSW
1:	lpswe	disabled_wait_psw-0b(%r13)

	.align	8
disabled_wait_psw:
	.quad	0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler

	.section .bss
	.align 8
	.globl s390_base_pgm_handler_fn
s390_base_pgm_handler_fn:
	.quad	0
	.previous

#
# Calls diag 308 subcode 1 and continues execution
#
# The following conditions must be ensured before calling this function:
# * Prefix register = 0
# * Lowcore protection is disabled
#
ENTRY(diag308_reset)
	larl	%r4,.Lctlregs		# Save control registers
	stctg	%c0,%c15,0(%r4)
	larl	%r4,.Lfpctl		# Floating point control register
	stfpc	0(%r4)
	larl	%r4,.Lcontinue_psw	# Save PSW flags
	epsw	%r2,%r3
	stm	%r2,%r3,0(%r4)
	larl	%r4,.Lrestart_psw	# Setup restart PSW at absolute 0
	lghi	%r3,0
	lg	%r4,0(%r4)		# Save PSW
	sturg	%r4,%r3			# Use sturg, because of large pages
	lghi	%r1,1
	diag	%r1,%r1,0x308
.Lrestart_part2:
	lhi	%r0,0			# Load r0 with zero
	lhi	%r1,2			# Use mode 2 = ESAME (dump)
	sigp	%r1,%r0,0x12		# Switch to ESAME mode
	sam64				# Switch to 64 bit addressing mode
	larl	%r4,.Lctlregs		# Restore control registers
	lctlg	%c0,%c15,0(%r4)
	larl	%r4,.Lfpctl		# Restore floating point ctl register
	lfpc	0(%r4)
	larl	%r4,.Lcontinue_psw	# Restore PSW flags
	lpswe	0(%r4)
.Lcontinue:
	br	%r14
.align 16
.Lrestart_psw:
	.long	0x00080000,0x80000000 + .Lrestart_part2

	.section .data..nosave,"aw",@progbits
.align 8
.Lcontinue_psw:
	.quad	0,.Lcontinue
	.previous

	.section .bss
.align 8
.Lctlregs:
	.rept	16
	.quad	0
	.endr
.Lfpctl:
	.long	0
	.previous

#else /* CONFIG_64BIT */

ENTRY(s390_base_mcck_handler)
	basr	%r13,0
0:	l	%r15,__LC_PANIC_STACK	# load panic stack
	ahi	%r15,-STACK_FRAME_OVERHEAD
	l	%r1,2f-0b(%r13)
	l	%r1,0(%r1)
	ltr	%r1,%r1
	jz	1f
	basr	%r14,%r1
1:	lm	%r0,%r15,__LC_GPREGS_SAVE_AREA
	lpsw	__LC_MCK_OLD_PSW

2:	.long	s390_base_mcck_handler_fn

	.section .bss
	.align 4
	.globl	s390_base_mcck_handler_fn
s390_base_mcck_handler_fn:
	.long	0
	.previous

ENTRY(s390_base_ext_handler)
	stm	%r0,%r15,__LC_SAVE_AREA_ASYNC
	basr	%r13,0
0:	ahi	%r15,-STACK_FRAME_OVERHEAD
	l	%r1,2f-0b(%r13)
	l	%r1,0(%r1)
	ltr	%r1,%r1
	jz	1f
	basr	%r14,%r1
1:	lm	%r0,%r15,__LC_SAVE_AREA_ASYNC
	ni	__LC_EXT_OLD_PSW+1,0xfd	# clear wait state bit
	lpsw	__LC_EXT_OLD_PSW

2:	.long	s390_base_ext_handler_fn

	.section .bss
	.align 4
	.globl	s390_base_ext_handler_fn
s390_base_ext_handler_fn:
	.long	0
	.previous

ENTRY(s390_base_pgm_handler)
	stm	%r0,%r15,__LC_SAVE_AREA_SYNC
	basr	%r13,0
0:	ahi	%r15,-STACK_FRAME_OVERHEAD
	l	%r1,2f-0b(%r13)
	l	%r1,0(%r1)
	ltr	%r1,%r1
	jz	1f
	basr	%r14,%r1
	lm	%r0,%r15,__LC_SAVE_AREA_SYNC
	lpsw	__LC_PGM_OLD_PSW

1:	lpsw	disabled_wait_psw-0b(%r13)

2:	.long	s390_base_pgm_handler_fn

disabled_wait_psw:
	.align	8
	.long	0x000a0000,0x00000000 + s390_base_pgm_handler

	.section .bss
	.align 4
	.globl	s390_base_pgm_handler_fn
s390_base_pgm_handler_fn:
	.long	0
	.previous

#endif /* CONFIG_64BIT */
Commit	Line	Data
ab14de6c HC	1	/*
	2	* arch/s390/kernel/base.S
	3	*
	4	* Copyright IBM Corp. 2006,2007
	5	* Author(s): Heiko Carstens <heiko.carstens@de.ibm.com>
	6	* Michael Holzheu <holzheu@de.ibm.com>
	7	*/
	8
144d634a	9	#include <linux/linkage.h>
cbb870c8	10	#include <asm/asm-offsets.h>
ab14de6c	11	#include <asm/ptrace.h>
ab14de6c HC	12
	13	#ifdef CONFIG_64BIT
	14
144d634a	15	ENTRY(s390_base_mcck_handler)
ab14de6c HC	16	basr %r13,0
	17	0: lg %r15,__LC_PANIC_STACK # load panic stack
	18	aghi %r15,-STACK_FRAME_OVERHEAD
	19	larl %r1,s390_base_mcck_handler_fn
	20	lg %r1,0(%r1)
	21	ltgr %r1,%r1
	22	jz 1f
	23	basr %r14,%r1
	24	1: la %r1,4095
	25	lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)
	26	lpswe __LC_MCK_OLD_PSW
	27
	28	.section .bss
144d634a	29	.align 8
ab14de6c HC	30	.globl s390_base_mcck_handler_fn
	31	s390_base_mcck_handler_fn:
	32	.quad 0
	33	.previous
	34
144d634a	35	ENTRY(s390_base_ext_handler)
c5328901	36	stmg %r0,%r15,__LC_SAVE_AREA_ASYNC
ab14de6c HC	37	basr %r13,0
	38	0: aghi %r15,-STACK_FRAME_OVERHEAD
	39	larl %r1,s390_base_ext_handler_fn
	40	lg %r1,0(%r1)
	41	ltgr %r1,%r1
	42	jz 1f
	43	basr %r14,%r1
c5328901	44	1: lmg %r0,%r15,__LC_SAVE_AREA_ASYNC
ab14de6c HC	45	ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
	46	lpswe __LC_EXT_OLD_PSW
	47
	48	.section .bss
144d634a	49	.align 8
ab14de6c HC	50	.globl s390_base_ext_handler_fn
	51	s390_base_ext_handler_fn:
	52	.quad 0
	53	.previous
	54
144d634a	55	ENTRY(s390_base_pgm_handler)
c5328901	56	stmg %r0,%r15,__LC_SAVE_AREA_SYNC
ab14de6c HC	57	basr %r13,0
	58	0: aghi %r15,-STACK_FRAME_OVERHEAD
	59	larl %r1,s390_base_pgm_handler_fn
	60	lg %r1,0(%r1)
	61	ltgr %r1,%r1
	62	jz 1f
	63	basr %r14,%r1
c5328901	64	lmg %r0,%r15,__LC_SAVE_AREA_SYNC
ab14de6c HC	65	lpswe __LC_PGM_OLD_PSW
	66	1: lpswe disabled_wait_psw-0b(%r13)
	67
	68	.align 8
	69	disabled_wait_psw:
	70	.quad 0x0002000180000000,0x0000000000000000 + s390_base_pgm_handler
	71
	72	.section .bss
144d634a	73	.align 8
ab14de6c HC	74	.globl s390_base_pgm_handler_fn
	75	s390_base_pgm_handler_fn:
	76	.quad 0
	77	.previous
	78
9dc7356e MH	79	#
	80	# Calls diag 308 subcode 1 and continues execution
	81	#
	82	# The following conditions must be ensured before calling this function:
	83	# * Prefix register = 0
	84	# * Lowcore protection is disabled
	85	#
	86	ENTRY(diag308_reset)
	87	larl %r4,.Lctlregs # Save control registers
	88	stctg %c0,%c15,0(%r4)
60a0c68d MH	89	larl %r4,.Lfpctl # Floating point control register
60a0c68d MH	90	stfpc 0(%r4)
fa7c0043 MH	91	larl %r4,.Lcontinue_psw # Save PSW flags
	92	epsw %r2,%r3
	93	stm %r2,%r3,0(%r4)
9dc7356e MH	94	larl %r4,.Lrestart_psw # Setup restart PSW at absolute 0
	95	lghi %r3,0
	96	lg %r4,0(%r4) # Save PSW
	97	sturg %r4,%r3 # Use sturg, because of large pages
	98	lghi %r1,1
	99	diag %r1,%r1,0x308
	100	.Lrestart_part2:
	101	lhi %r0,0 # Load r0 with zero
	102	lhi %r1,2 # Use mode 2 = ESAME (dump)
	103	sigp %r1,%r0,0x12 # Switch to ESAME mode
	104	sam64 # Switch to 64 bit addressing mode
	105	larl %r4,.Lctlregs # Restore control registers
	106	lctlg %c0,%c15,0(%r4)
60a0c68d MH	107	larl %r4,.Lfpctl # Restore floating point ctl register
60a0c68d MH	108	lfpc 0(%r4)
fa7c0043 MH	109	larl %r4,.Lcontinue_psw # Restore PSW flags
	110	lpswe 0(%r4)
	111	.Lcontinue:
9dc7356e MH	112	br %r14
	113	.align 16
	114	.Lrestart_psw:
	115	.long 0x00080000,0x80000000 + .Lrestart_part2
	116
fa7c0043 MH	117	.section .data..nosave,"aw",@progbits
	118	.align 8
	119	.Lcontinue_psw:
	120	.quad 0,.Lcontinue
	121	.previous
	122
9dc7356e MH	123	.section .bss
	124	.align 8
	125	.Lctlregs:
	126	.rept 16
	127	.quad 0
	128	.endr
60a0c68d MH	129	.Lfpctl:
60a0c68d MH	130	.long 0
9dc7356e MH	131	.previous
9dc7356e MH	132
ab14de6c HC	133	#else /* CONFIG_64BIT */
ab14de6c HC	134
144d634a	135	ENTRY(s390_base_mcck_handler)
ab14de6c HC	136	basr %r13,0
	137	0: l %r15,__LC_PANIC_STACK # load panic stack
	138	ahi %r15,-STACK_FRAME_OVERHEAD
	139	l %r1,2f-0b(%r13)
	140	l %r1,0(%r1)
	141	ltr %r1,%r1
	142	jz 1f
	143	basr %r14,%r1
	144	1: lm %r0,%r15,__LC_GPREGS_SAVE_AREA
	145	lpsw __LC_MCK_OLD_PSW
	146
	147	2: .long s390_base_mcck_handler_fn
	148
	149	.section .bss
144d634a	150	.align 4
ab14de6c HC	151	.globl s390_base_mcck_handler_fn
	152	s390_base_mcck_handler_fn:
	153	.long 0
	154	.previous
	155
144d634a	156	ENTRY(s390_base_ext_handler)
c5328901	157	stm %r0,%r15,__LC_SAVE_AREA_ASYNC
ab14de6c HC	158	basr %r13,0
	159	0: ahi %r15,-STACK_FRAME_OVERHEAD
	160	l %r1,2f-0b(%r13)
	161	l %r1,0(%r1)
	162	ltr %r1,%r1
	163	jz 1f
	164	basr %r14,%r1
c5328901	165	1: lm %r0,%r15,__LC_SAVE_AREA_ASYNC
ab14de6c HC	166	ni __LC_EXT_OLD_PSW+1,0xfd # clear wait state bit
	167	lpsw __LC_EXT_OLD_PSW
	168
	169	2: .long s390_base_ext_handler_fn
	170
	171	.section .bss
144d634a	172	.align 4
ab14de6c HC	173	.globl s390_base_ext_handler_fn
	174	s390_base_ext_handler_fn:
	175	.long 0
	176	.previous
	177
144d634a	178	ENTRY(s390_base_pgm_handler)
c5328901	179	stm %r0,%r15,__LC_SAVE_AREA_SYNC
ab14de6c HC	180	basr %r13,0
	181	0: ahi %r15,-STACK_FRAME_OVERHEAD
	182	l %r1,2f-0b(%r13)
	183	l %r1,0(%r1)
	184	ltr %r1,%r1
	185	jz 1f
	186	basr %r14,%r1
c5328901	187	lm %r0,%r15,__LC_SAVE_AREA_SYNC
ab14de6c HC	188	lpsw __LC_PGM_OLD_PSW
	189
	190	1: lpsw disabled_wait_psw-0b(%r13)
	191
	192	2: .long s390_base_pgm_handler_fn
	193
	194	disabled_wait_psw:
	195	.align 8
	196	.long 0x000a0000,0x00000000 + s390_base_pgm_handler
	197
	198	.section .bss
144d634a	199	.align 4
ab14de6c HC	200	.globl s390_base_pgm_handler_fn
	201	s390_base_pgm_handler_fn:
	202	.long 0
	203	.previous
	204
	205	#endif /* CONFIG_64BIT */