ARM: meson: merge Kconfig symbol MACH_MESON8B into MACH_MESON8
[linux-2.6-block.git] / arch / s390 / kernel / asm-offsets.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
1da177e4
LT
2/*
3 * Generate definitions needed by assembly language modules.
4 * This code generates raw asm output which is post-processed to extract
5 * and format the required data.
6 */
7
cbb870c8
HC
8#define ASM_OFFSETS_C
9
7a88d7a8 10#include <linux/kbuild.h>
95d38fd0 11#include <linux/kvm_host.h>
cbb870c8 12#include <linux/sched.h>
b5f87f15 13#include <asm/idle.h>
b020632e 14#include <asm/vdso.h>
480e5926 15#include <asm/pgtable.h>
1e133ab2 16#include <asm/gmap.h>
3037a52f 17#include <asm/nmi.h>
1da177e4 18
987bcdac
MS
19/*
20 * Make sure that the compiler is new enough. We want a compiler that
21 * is known to work with the "Q" assembler constraint.
22 */
f318a122
MS
23#if __GNUC__ < 4 || (__GNUC__ == 4 && __GNUC_MINOR__ < 3)
24#error Your compiler is too old; please use version 4.3 or newer
987bcdac
MS
25#endif
26
1da177e4
LT
27int main(void)
28{
6a62b485 29 /* task struct offsets */
d5c352cd 30 OFFSET(__TASK_stack, task_struct, stack);
6a62b485
MS
31 OFFSET(__TASK_thread, task_struct, thread);
32 OFFSET(__TASK_pid, task_struct, pid);
1da177e4 33 BLANK();
6a62b485
MS
34 /* thread struct offsets */
35 OFFSET(__THREAD_ksp, thread_struct, ksp);
ef280c85
MS
36 OFFSET(__THREAD_sysc_table, thread_struct, sys_call_table);
37 OFFSET(__THREAD_last_break, thread_struct, last_break);
6a62b485
MS
38 OFFSET(__THREAD_FPU_fpc, thread_struct, fpu.fpc);
39 OFFSET(__THREAD_FPU_regs, thread_struct, fpu.regs);
40 OFFSET(__THREAD_per_cause, thread_struct, per_event.cause);
41 OFFSET(__THREAD_per_address, thread_struct, per_event.address);
42 OFFSET(__THREAD_per_paid, thread_struct, per_event.paid);
43 OFFSET(__THREAD_trap_tdb, thread_struct, trap_tdb);
1da177e4 44 BLANK();
6a62b485 45 /* thread info offsets */
d5c352cd 46 OFFSET(__TI_flags, task_struct, thread_info.flags);
1da177e4 47 BLANK();
6a62b485
MS
48 /* pt_regs offsets */
49 OFFSET(__PT_ARGS, pt_regs, args);
50 OFFSET(__PT_PSW, pt_regs, psw);
51 OFFSET(__PT_GPRS, pt_regs, gprs);
52 OFFSET(__PT_ORIG_GPR2, pt_regs, orig_gpr2);
53 OFFSET(__PT_INT_CODE, pt_regs, int_code);
54 OFFSET(__PT_INT_PARM, pt_regs, int_parm);
55 OFFSET(__PT_INT_PARM_LONG, pt_regs, int_parm_long);
56 OFFSET(__PT_FLAGS, pt_regs, flags);
4ca4d7bf 57 DEFINE(__PT_SIZE, sizeof(struct pt_regs));
1da177e4 58 BLANK();
6a62b485
MS
59 /* stack_frame offsets */
60 OFFSET(__SF_BACKCHAIN, stack_frame, back_chain);
61 OFFSET(__SF_GPRS, stack_frame, gprs);
62 OFFSET(__SF_EMPTY, stack_frame, empty1);
c929500d
QH
63 OFFSET(__SF_SIE_CONTROL, stack_frame, empty1[0]);
64 OFFSET(__SF_SIE_SAVEAREA, stack_frame, empty1[1]);
65 OFFSET(__SF_SIE_REASON, stack_frame, empty1[2]);
92fa7a13 66 OFFSET(__SF_SIE_FLAGS, stack_frame, empty1[3]);
b020632e
MS
67 BLANK();
68 /* timeval/timezone offsets for use by vdso */
6a62b485
MS
69 OFFSET(__VDSO_UPD_COUNT, vdso_data, tb_update_count);
70 OFFSET(__VDSO_XTIME_STAMP, vdso_data, xtime_tod_stamp);
71 OFFSET(__VDSO_XTIME_SEC, vdso_data, xtime_clock_sec);
72 OFFSET(__VDSO_XTIME_NSEC, vdso_data, xtime_clock_nsec);
73 OFFSET(__VDSO_XTIME_CRS_SEC, vdso_data, xtime_coarse_sec);
74 OFFSET(__VDSO_XTIME_CRS_NSEC, vdso_data, xtime_coarse_nsec);
75 OFFSET(__VDSO_WTOM_SEC, vdso_data, wtom_clock_sec);
76 OFFSET(__VDSO_WTOM_NSEC, vdso_data, wtom_clock_nsec);
77 OFFSET(__VDSO_WTOM_CRS_SEC, vdso_data, wtom_coarse_sec);
78 OFFSET(__VDSO_WTOM_CRS_NSEC, vdso_data, wtom_coarse_nsec);
79 OFFSET(__VDSO_TIMEZONE, vdso_data, tz_minuteswest);
80 OFFSET(__VDSO_ECTG_OK, vdso_data, ectg_available);
81 OFFSET(__VDSO_TK_MULT, vdso_data, tk_mult);
82 OFFSET(__VDSO_TK_SHIFT, vdso_data, tk_shift);
75c7b6f3
MS
83 OFFSET(__VDSO_TS_DIR, vdso_data, ts_dir);
84 OFFSET(__VDSO_TS_END, vdso_data, ts_end);
6a62b485
MS
85 OFFSET(__VDSO_ECTG_BASE, vdso_per_cpu_data, ectg_timer_base);
86 OFFSET(__VDSO_ECTG_USER, vdso_per_cpu_data, ectg_user_time);
249c543b
MS
87 OFFSET(__VDSO_CPU_NR, vdso_per_cpu_data, cpu_nr);
88 OFFSET(__VDSO_NODE_ID, vdso_per_cpu_data, node_id);
6a62b485 89 BLANK();
b020632e 90 /* constants used by the vdso */
b3423982
HC
91 DEFINE(__CLOCK_REALTIME, CLOCK_REALTIME);
92 DEFINE(__CLOCK_MONOTONIC, CLOCK_MONOTONIC);
b7eacb59
MS
93 DEFINE(__CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
94 DEFINE(__CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
b5e64b3d 95 DEFINE(__CLOCK_THREAD_CPUTIME_ID, CLOCK_THREAD_CPUTIME_ID);
b3423982 96 DEFINE(__CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
b7eacb59 97 DEFINE(__CLOCK_COARSE_RES, LOW_RES_NSEC);
cbb870c8 98 BLANK();
4c1051e3 99 /* idle data offsets */
6a62b485
MS
100 OFFSET(__CLOCK_IDLE_ENTER, s390_idle_data, clock_idle_enter);
101 OFFSET(__CLOCK_IDLE_EXIT, s390_idle_data, clock_idle_exit);
102 OFFSET(__TIMER_IDLE_ENTER, s390_idle_data, timer_idle_enter);
103 OFFSET(__TIMER_IDLE_EXIT, s390_idle_data, timer_idle_exit);
8b646bd7 104 BLANK();
6a62b485 105 /* hardware defined lowcore locations 0x000 - 0x1ff */
c667aeac
HC
106 OFFSET(__LC_EXT_PARAMS, lowcore, ext_params);
107 OFFSET(__LC_EXT_CPU_ADDR, lowcore, ext_cpu_addr);
108 OFFSET(__LC_EXT_INT_CODE, lowcore, ext_int_code);
109 OFFSET(__LC_SVC_ILC, lowcore, svc_ilc);
110 OFFSET(__LC_SVC_INT_CODE, lowcore, svc_code);
111 OFFSET(__LC_PGM_ILC, lowcore, pgm_ilc);
112 OFFSET(__LC_PGM_INT_CODE, lowcore, pgm_code);
113 OFFSET(__LC_DATA_EXC_CODE, lowcore, data_exc_code);
114 OFFSET(__LC_MON_CLASS_NR, lowcore, mon_class_num);
115 OFFSET(__LC_PER_CODE, lowcore, per_code);
116 OFFSET(__LC_PER_ATMID, lowcore, per_atmid);
117 OFFSET(__LC_PER_ADDRESS, lowcore, per_address);
118 OFFSET(__LC_EXC_ACCESS_ID, lowcore, exc_access_id);
119 OFFSET(__LC_PER_ACCESS_ID, lowcore, per_access_id);
120 OFFSET(__LC_OP_ACCESS_ID, lowcore, op_access_id);
121 OFFSET(__LC_AR_MODE_ID, lowcore, ar_mode_id);
122 OFFSET(__LC_TRANS_EXC_CODE, lowcore, trans_exc_code);
123 OFFSET(__LC_MON_CODE, lowcore, monitor_code);
124 OFFSET(__LC_SUBCHANNEL_ID, lowcore, subchannel_id);
125 OFFSET(__LC_SUBCHANNEL_NR, lowcore, subchannel_nr);
126 OFFSET(__LC_IO_INT_PARM, lowcore, io_int_parm);
127 OFFSET(__LC_IO_INT_WORD, lowcore, io_int_word);
128 OFFSET(__LC_STFL_FAC_LIST, lowcore, stfl_fac_list);
129 OFFSET(__LC_STFLE_FAC_LIST, lowcore, stfle_fac_list);
130 OFFSET(__LC_MCCK_CODE, lowcore, mcck_interruption_code);
8953fb08 131 OFFSET(__LC_EXT_DAMAGE_CODE, lowcore, external_damage_code);
c667aeac
HC
132 OFFSET(__LC_MCCK_FAIL_STOR_ADDR, lowcore, failing_storage_address);
133 OFFSET(__LC_LAST_BREAK, lowcore, breaking_event_addr);
134 OFFSET(__LC_RST_OLD_PSW, lowcore, restart_old_psw);
135 OFFSET(__LC_EXT_OLD_PSW, lowcore, external_old_psw);
136 OFFSET(__LC_SVC_OLD_PSW, lowcore, svc_old_psw);
137 OFFSET(__LC_PGM_OLD_PSW, lowcore, program_old_psw);
138 OFFSET(__LC_MCK_OLD_PSW, lowcore, mcck_old_psw);
139 OFFSET(__LC_IO_OLD_PSW, lowcore, io_old_psw);
140 OFFSET(__LC_RST_NEW_PSW, lowcore, restart_psw);
141 OFFSET(__LC_EXT_NEW_PSW, lowcore, external_new_psw);
142 OFFSET(__LC_SVC_NEW_PSW, lowcore, svc_new_psw);
143 OFFSET(__LC_PGM_NEW_PSW, lowcore, program_new_psw);
144 OFFSET(__LC_MCK_NEW_PSW, lowcore, mcck_new_psw);
145 OFFSET(__LC_IO_NEW_PSW, lowcore, io_new_psw);
6a62b485 146 /* software defined lowcore locations 0x200 - 0xdff*/
c667aeac
HC
147 OFFSET(__LC_SAVE_AREA_SYNC, lowcore, save_area_sync);
148 OFFSET(__LC_SAVE_AREA_ASYNC, lowcore, save_area_async);
149 OFFSET(__LC_SAVE_AREA_RESTART, lowcore, save_area_restart);
150 OFFSET(__LC_CPU_FLAGS, lowcore, cpu_flags);
151 OFFSET(__LC_RETURN_PSW, lowcore, return_psw);
152 OFFSET(__LC_RETURN_MCCK_PSW, lowcore, return_mcck_psw);
153 OFFSET(__LC_SYNC_ENTER_TIMER, lowcore, sync_enter_timer);
154 OFFSET(__LC_ASYNC_ENTER_TIMER, lowcore, async_enter_timer);
155 OFFSET(__LC_MCCK_ENTER_TIMER, lowcore, mcck_enter_timer);
156 OFFSET(__LC_EXIT_TIMER, lowcore, exit_timer);
157 OFFSET(__LC_USER_TIMER, lowcore, user_timer);
158 OFFSET(__LC_SYSTEM_TIMER, lowcore, system_timer);
159 OFFSET(__LC_STEAL_TIMER, lowcore, steal_timer);
160 OFFSET(__LC_LAST_UPDATE_TIMER, lowcore, last_update_timer);
161 OFFSET(__LC_LAST_UPDATE_CLOCK, lowcore, last_update_clock);
162 OFFSET(__LC_INT_CLOCK, lowcore, int_clock);
163 OFFSET(__LC_MCCK_CLOCK, lowcore, mcck_clock);
3037a52f 164 OFFSET(__LC_CLOCK_COMPARATOR, lowcore, clock_comparator);
6e2ef5e4 165 OFFSET(__LC_BOOT_CLOCK, lowcore, boot_clock);
c667aeac 166 OFFSET(__LC_CURRENT, lowcore, current_task);
c667aeac
HC
167 OFFSET(__LC_KERNEL_STACK, lowcore, kernel_stack);
168 OFFSET(__LC_ASYNC_STACK, lowcore, async_stack);
169 OFFSET(__LC_PANIC_STACK, lowcore, panic_stack);
170 OFFSET(__LC_RESTART_STACK, lowcore, restart_stack);
171 OFFSET(__LC_RESTART_FN, lowcore, restart_fn);
172 OFFSET(__LC_RESTART_DATA, lowcore, restart_data);
173 OFFSET(__LC_RESTART_SOURCE, lowcore, restart_source);
174 OFFSET(__LC_USER_ASCE, lowcore, user_asce);
0aaba41b 175 OFFSET(__LC_VDSO_ASCE, lowcore, vdso_asce);
c667aeac
HC
176 OFFSET(__LC_LPP, lowcore, lpp);
177 OFFSET(__LC_CURRENT_PID, lowcore, current_pid);
178 OFFSET(__LC_PERCPU_OFFSET, lowcore, percpu_offset);
179 OFFSET(__LC_VDSO_PER_CPU, lowcore, vdso_per_cpu_data);
180 OFFSET(__LC_MACHINE_FLAGS, lowcore, machine_flags);
c360192b 181 OFFSET(__LC_PREEMPT_COUNT, lowcore, preempt_count);
c667aeac 182 OFFSET(__LC_GMAP, lowcore, gmap);
6a62b485 183 /* software defined ABI-relevant lowcore locations 0xe00 - 0xe20 */
c667aeac 184 OFFSET(__LC_DUMP_REIPL, lowcore, ipib);
6a62b485 185 /* hardware defined lowcore locations 0x1000 - 0x18ff */
916cda1a 186 OFFSET(__LC_MCESAD, lowcore, mcesad);
c667aeac
HC
187 OFFSET(__LC_EXT_PARAMS2, lowcore, ext_params2);
188 OFFSET(__LC_FPREGS_SAVE_AREA, lowcore, floating_pt_save_area);
189 OFFSET(__LC_GPREGS_SAVE_AREA, lowcore, gpregs_save_area);
190 OFFSET(__LC_PSW_SAVE_AREA, lowcore, psw_save_area);
191 OFFSET(__LC_PREFIX_SAVE_AREA, lowcore, prefixreg_save_area);
192 OFFSET(__LC_FP_CREG_SAVE_AREA, lowcore, fpt_creg_save_area);
193 OFFSET(__LC_TOD_PROGREG_SAVE_AREA, lowcore, tod_progreg_save_area);
194 OFFSET(__LC_CPU_TIMER_SAVE_AREA, lowcore, cpu_timer_save_area);
195 OFFSET(__LC_CLOCK_COMP_SAVE_AREA, lowcore, clock_comp_save_area);
196 OFFSET(__LC_AREGS_SAVE_AREA, lowcore, access_regs_save_area);
197 OFFSET(__LC_CREGS_SAVE_AREA, lowcore, cregs_save_area);
198 OFFSET(__LC_PGM_TDB, lowcore, pgm_tdb);
8b646bd7 199 BLANK();
3037a52f
MS
200 /* extended machine check save area */
201 OFFSET(__MCESA_GS_SAVE_AREA, mcesa, guarded_storage_save_area);
202 BLANK();
6a62b485
MS
203 /* gmap/sie offsets */
204 OFFSET(__GMAP_ASCE, gmap, asce);
205 OFFSET(__SIE_PROG0C, kvm_s390_sie_block, prog0c);
206 OFFSET(__SIE_PROG20, kvm_s390_sie_block, prog20);
1da177e4
LT
207 return 0;
208}