[S390] implement interrupt-enabling rwlocks
[linux-block.git] / arch / s390 / include / asm / spinlock.h
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1da177e4
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1/*
2 * include/asm-s390/spinlock.h
3 *
4 * S390 version
5 * Copyright (C) 1999 IBM Deutschland Entwicklung GmbH, IBM Corporation
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com)
7 *
8 * Derived from "include/asm-i386/spinlock.h"
9 */
10
11#ifndef __ASM_SPINLOCK_H
12#define __ASM_SPINLOCK_H
13
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14#include <linux/smp.h>
15
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16#if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ > 2)
17
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18static inline int
19_raw_compare_and_swap(volatile unsigned int *lock,
20 unsigned int old, unsigned int new)
21{
22 asm volatile(
23 " cs %0,%3,%1"
24 : "=d" (old), "=Q" (*lock)
25 : "0" (old), "d" (new), "Q" (*lock)
26 : "cc", "memory" );
27 return old;
28}
29
30#else /* __GNUC__ */
31
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32static inline int
33_raw_compare_and_swap(volatile unsigned int *lock,
34 unsigned int old, unsigned int new)
35{
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36 asm volatile(
37 " cs %0,%3,0(%4)"
38 : "=d" (old), "=m" (*lock)
39 : "0" (old), "d" (new), "a" (lock), "m" (*lock)
40 : "cc", "memory" );
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41 return old;
42}
1da177e4 43
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44#endif /* __GNUC__ */
45
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46/*
47 * Simple spin lock operations. There are two variants, one clears IRQ's
48 * on the local processor, one does not.
49 *
50 * We make no fairness assumptions. They have a cost.
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51 *
52 * (the type definitions are in asm/spinlock_types.h)
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53 */
54
3c1fcfe2 55#define __raw_spin_is_locked(x) ((x)->owner_cpu != 0)
fb1c8f93 56#define __raw_spin_unlock_wait(lock) \
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57 do { while (__raw_spin_is_locked(lock)) \
58 _raw_spin_relax(lock); } while (0)
1da177e4 59
3b4beb31 60extern void _raw_spin_lock_wait(raw_spinlock_t *);
894cdde2 61extern void _raw_spin_lock_wait_flags(raw_spinlock_t *, unsigned long flags);
3b4beb31 62extern int _raw_spin_trylock_retry(raw_spinlock_t *);
3c1fcfe2 63extern void _raw_spin_relax(raw_spinlock_t *lock);
951f22d5 64
fb1c8f93 65static inline void __raw_spin_lock(raw_spinlock_t *lp)
1da177e4 66{
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67 int old;
68
69 old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
3b4beb31 70 if (likely(old == 0))
3c1fcfe2 71 return;
3b4beb31 72 _raw_spin_lock_wait(lp);
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73}
74
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75static inline void __raw_spin_lock_flags(raw_spinlock_t *lp,
76 unsigned long flags)
77{
78 int old;
79
80 old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
81 if (likely(old == 0))
82 return;
83 _raw_spin_lock_wait_flags(lp, flags);
84}
85
fb1c8f93 86static inline int __raw_spin_trylock(raw_spinlock_t *lp)
1da177e4 87{
3c1fcfe2 88 int old;
951f22d5 89
3c1fcfe2 90 old = _raw_compare_and_swap(&lp->owner_cpu, 0, ~smp_processor_id());
3b4beb31 91 if (likely(old == 0))
951f22d5 92 return 1;
3b4beb31 93 return _raw_spin_trylock_retry(lp);
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94}
95
fb1c8f93 96static inline void __raw_spin_unlock(raw_spinlock_t *lp)
1da177e4 97{
3c1fcfe2 98 _raw_compare_and_swap(&lp->owner_cpu, lp->owner_cpu, 0);
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99}
100
101/*
102 * Read-write spinlocks, allowing multiple readers
103 * but only one writer.
104 *
105 * NOTE! it is quite common to have readers in interrupts
106 * but no interrupt writers. For those circumstances we
107 * can "mix" irq-safe locks - any writer needs to get a
108 * irq-safe write-lock, but readers can get non-irqsafe
109 * read-locks.
110 */
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111
112/**
113 * read_can_lock - would read_trylock() succeed?
114 * @lock: the rwlock in question.
115 */
fb1c8f93 116#define __raw_read_can_lock(x) ((int)(x)->lock >= 0)
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117
118/**
119 * write_can_lock - would write_trylock() succeed?
120 * @lock: the rwlock in question.
121 */
fb1c8f93 122#define __raw_write_can_lock(x) ((x)->lock == 0)
1da177e4 123
fb1c8f93 124extern void _raw_read_lock_wait(raw_rwlock_t *lp);
ce58ae6f 125extern void _raw_read_lock_wait_flags(raw_rwlock_t *lp, unsigned long flags);
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126extern int _raw_read_trylock_retry(raw_rwlock_t *lp);
127extern void _raw_write_lock_wait(raw_rwlock_t *lp);
ce58ae6f 128extern void _raw_write_lock_wait_flags(raw_rwlock_t *lp, unsigned long flags);
fb1c8f93 129extern int _raw_write_trylock_retry(raw_rwlock_t *lp);
951f22d5 130
fb1c8f93 131static inline void __raw_read_lock(raw_rwlock_t *rw)
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132{
133 unsigned int old;
134 old = rw->lock & 0x7fffffffU;
135 if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
136 _raw_read_lock_wait(rw);
137}
138
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139static inline void __raw_read_lock_flags(raw_rwlock_t *rw, unsigned long flags)
140{
141 unsigned int old;
142 old = rw->lock & 0x7fffffffU;
143 if (_raw_compare_and_swap(&rw->lock, old, old + 1) != old)
144 _raw_read_lock_wait_flags(rw, flags);
145}
146
fb1c8f93 147static inline void __raw_read_unlock(raw_rwlock_t *rw)
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148{
149 unsigned int old, cmp;
150
151 old = rw->lock;
152 do {
153 cmp = old;
154 old = _raw_compare_and_swap(&rw->lock, old, old - 1);
155 } while (cmp != old);
156}
157
fb1c8f93 158static inline void __raw_write_lock(raw_rwlock_t *rw)
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159{
160 if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
161 _raw_write_lock_wait(rw);
162}
163
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164static inline void __raw_write_lock_flags(raw_rwlock_t *rw, unsigned long flags)
165{
166 if (unlikely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) != 0))
167 _raw_write_lock_wait_flags(rw, flags);
168}
169
fb1c8f93 170static inline void __raw_write_unlock(raw_rwlock_t *rw)
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171{
172 _raw_compare_and_swap(&rw->lock, 0x80000000, 0);
173}
174
fb1c8f93 175static inline int __raw_read_trylock(raw_rwlock_t *rw)
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176{
177 unsigned int old;
178 old = rw->lock & 0x7fffffffU;
179 if (likely(_raw_compare_and_swap(&rw->lock, old, old + 1) == old))
180 return 1;
181 return _raw_read_trylock_retry(rw);
182}
183
fb1c8f93 184static inline int __raw_write_trylock(raw_rwlock_t *rw)
1da177e4 185{
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186 if (likely(_raw_compare_and_swap(&rw->lock, 0, 0x80000000) == 0))
187 return 1;
188 return _raw_write_trylock_retry(rw);
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189}
190
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191#define _raw_read_relax(lock) cpu_relax()
192#define _raw_write_relax(lock) cpu_relax()
193
1da177e4 194#endif /* __ASM_SPINLOCK_H */