[linux-2.6-block.git] / arch / s390 / include / asm / setup.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *  S390 version
 *    Copyright IBM Corp. 1999, 2017
 */
#ifndef _ASM_S390_SETUP_H
#define _ASM_S390_SETUP_H

#include <linux/bits.h>
#include <uapi/asm/setup.h>
#include <linux/build_bug.h>

#define PARMAREA		0x10400

#define COMMAND_LINE_SIZE CONFIG_COMMAND_LINE_SIZE

#define LPP_MAGIC		BIT(31)
#define LPP_PID_MASK		_AC(0xffffffff, UL)

/* Offsets to entry points in kernel/head.S  */

#define STARTUP_NORMAL_OFFSET	0x10000
#define STARTUP_KDUMP_OFFSET	0x10010

#define LEGACY_COMMAND_LINE_SIZE	896

#ifndef __ASSEMBLY__

#include <asm/lowcore.h>
#include <asm/types.h>

struct parmarea {
	unsigned long ipl_device;			/* 0x10400 */
	unsigned long initrd_start;			/* 0x10408 */
	unsigned long initrd_size;			/* 0x10410 */
	unsigned long oldmem_base;			/* 0x10418 */
	unsigned long oldmem_size;			/* 0x10420 */
	unsigned long kernel_version;			/* 0x10428 */
	unsigned long max_command_line_size;		/* 0x10430 */
	char pad1[0x10480-0x10438];			/* 0x10438 - 0x10480 */
	char command_line[COMMAND_LINE_SIZE];		/* 0x10480 */
};

extern struct parmarea parmarea;

extern unsigned int zlib_dfltcc_support;
#define ZLIB_DFLTCC_DISABLED		0
#define ZLIB_DFLTCC_FULL		1
#define ZLIB_DFLTCC_DEFLATE_ONLY	2
#define ZLIB_DFLTCC_INFLATE_ONLY	3
#define ZLIB_DFLTCC_FULL_DEBUG		4

extern unsigned long ident_map_size;
extern unsigned long max_mappable;

/* The Write Back bit position in the physaddr is given by the SLPC PCI */
extern unsigned long mio_wb_bit_mask;

/*
 * Console mode. Override with conmode=
 */
extern unsigned int console_mode;
extern unsigned int console_devno;
extern unsigned int console_irq;

#define CONSOLE_IS_UNDEFINED	(console_mode == 0)
#define CONSOLE_IS_SCLP		(console_mode == 1)
#define CONSOLE_IS_3215		(console_mode == 2)
#define CONSOLE_IS_3270		(console_mode == 3)
#define CONSOLE_IS_VT220	(console_mode == 4)
#define CONSOLE_IS_HVC		(console_mode == 5)
#define SET_CONSOLE_SCLP	do { console_mode = 1; } while (0)
#define SET_CONSOLE_3215	do { console_mode = 2; } while (0)
#define SET_CONSOLE_3270	do { console_mode = 3; } while (0)
#define SET_CONSOLE_VT220	do { console_mode = 4; } while (0)
#define SET_CONSOLE_HVC		do { console_mode = 5; } while (0)

void register_early_console(void);

#ifdef CONFIG_VMCP
void vmcp_cma_reserve(void);
#else
static inline void vmcp_cma_reserve(void) { }
#endif

void report_user_fault(struct pt_regs *regs, long signr, int is_mm_fault);

extern void (*_machine_restart)(char *command);
extern void (*_machine_halt)(void);
extern void (*_machine_power_off)(void);

struct oldmem_data {
	unsigned long start;
	unsigned long size;
};
extern struct oldmem_data oldmem_data;

static __always_inline u32 gen_lpswe(unsigned long addr)
{
	BUILD_BUG_ON(addr > 0xfff);
	return 0xb2b20000 | addr;
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_S390_SETUP_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4	2	/*
1da177e4	3	* S390 version
15ceb8c9	4	* Copyright IBM Corp. 1999, 2017
1da177e4	5	*/
1da177e4 LT	6	#ifndef _ASM_S390_SETUP_H
	7	#define _ASM_S390_SETUP_H
	8
fe6ba88b	9	#include <linux/bits.h>
9807f759	10	#include <uapi/asm/setup.h>
0b38b5e1	11	#include <linux/build_bug.h>
7d1362c0	12
1da177e4	13	#define PARMAREA 0x10400
087c4d74	14
622021cd	15	#define COMMAND_LINE_SIZE CONFIG_COMMAND_LINE_SIZE
fe6ba88b MY	16
fe6ba88b MY	17	#define LPP_MAGIC BIT(31)
544e8dd7	18	#define LPP_PID_MASK _AC(0xffffffff, UL)
e22cf8ca	19
15ceb8c9 PR	20	/* Offsets to entry points in kernel/head.S */
	21
	22	#define STARTUP_NORMAL_OFFSET 0x10000
	23	#define STARTUP_KDUMP_OFFSET 0x10010
	24
5ecb2da6 SS	25	#define LEGACY_COMMAND_LINE_SIZE 896
5ecb2da6 SS	26
1da177e4 LT	27	#ifndef __ASSEMBLY__
1da177e4 LT	28
cbb870c8 HC	29	#include <asm/lowcore.h>
	30	#include <asm/types.h>
	31
d0d249d7 PR	32	struct parmarea {
	33	unsigned long ipl_device; /* 0x10400 */
	34	unsigned long initrd_start; /* 0x10408 */
	35	unsigned long initrd_size; /* 0x10410 */
	36	unsigned long oldmem_base; /* 0x10418 */
	37	unsigned long oldmem_size; /* 0x10420 */
6abe2819	38	unsigned long kernel_version; /* 0x10428 */
5ecb2da6 SS	39	unsigned long max_command_line_size; /* 0x10430 */
	40	char pad1[0x10480-0x10438]; /* 0x10438 - 0x10480 */
	41	char command_line[COMMAND_LINE_SIZE]; /* 0x10480 */
d0d249d7 PR	42	};
d0d249d7 PR	43
f73c632d HC	44	extern struct parmarea parmarea;
f73c632d HC	45
c65e6815 MZ	46	extern unsigned int zlib_dfltcc_support;
	47	#define ZLIB_DFLTCC_DISABLED 0
	48	#define ZLIB_DFLTCC_FULL 1
	49	#define ZLIB_DFLTCC_DEFLATE_ONLY 2
	50	#define ZLIB_DFLTCC_INFLATE_ONLY 3
	51	#define ZLIB_DFLTCC_FULL_DEBUG 4
	52
73045a08	53	extern unsigned long ident_map_size;
94fd5220	54	extern unsigned long max_mappable;
36a2bd42	55
b02002cc NS	56	/* The Write Back bit position in the physaddr is given by the SLPC PCI */
	57	extern unsigned long mio_wb_bit_mask;
	58
1da177e4 LT	59	/*
	60	* Console mode. Override with conmode=
	61	*/
	62	extern unsigned int console_mode;
	63	extern unsigned int console_devno;
	64	extern unsigned int console_irq;
	65
	66	#define CONSOLE_IS_UNDEFINED (console_mode == 0)
	67	#define CONSOLE_IS_SCLP (console_mode == 1)
	68	#define CONSOLE_IS_3215 (console_mode == 2)
	69	#define CONSOLE_IS_3270 (console_mode == 3)
8f50af49 PO	70	#define CONSOLE_IS_VT220 (console_mode == 4)
8f50af49 PO	71	#define CONSOLE_IS_HVC (console_mode == 5)
1da177e4 LT	72	#define SET_CONSOLE_SCLP do { console_mode = 1; } while (0)
	73	#define SET_CONSOLE_3215 do { console_mode = 2; } while (0)
	74	#define SET_CONSOLE_3270 do { console_mode = 3; } while (0)
8f50af49 PO	75	#define SET_CONSOLE_VT220 do { console_mode = 4; } while (0)
8f50af49 PO	76	#define SET_CONSOLE_HVC do { console_mode = 5; } while (0)
1da177e4	77
6708948e HC	78	void register_early_console(void);
6708948e HC	79
3f429842 HC	80	#ifdef CONFIG_VMCP
	81	void vmcp_cma_reserve(void);
	82	#else
	83	static inline void vmcp_cma_reserve(void) { }
	84	#endif
	85
5d7eccec HC	86	void report_user_fault(struct pt_regs *regs, long signr, int is_mm_fault);
5d7eccec HC	87
a0616cde DH	88	extern void (_machine_restart)(char command);
	89	extern void (*_machine_halt)(void);
	90	extern void (*_machine_power_off)(void);
	91
e9e7870f AE	92	struct oldmem_data {
	93	unsigned long start;
	94	unsigned long size;
	95	};
	96	extern struct oldmem_data oldmem_data;
	97
029a4f4b	98	static __always_inline u32 gen_lpswe(unsigned long addr)
0b38b5e1 SS	99	{
	100	BUILD_BUG_ON(addr > 0xfff);
	101	return 0xb2b20000 \| addr;
	102	}
0defa3c1	103	#endif /* __ASSEMBLY__ */
0defa3c1	104	#endif /* _ASM_S390_SETUP_H */