[linux-block.git] / arch / s390 / include / asm / ptrace.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *  S390 version
 *    Copyright IBM Corp. 1999, 2000
 *    Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
 */
#ifndef _S390_PTRACE_H
#define _S390_PTRACE_H

#include <linux/const.h>
#include <uapi/asm/ptrace.h>

#define PIF_SYSCALL		0	/* inside a system call */
#define PIF_PER_TRAP		1	/* deliver sigtrap on return to user */
#define PIF_SYSCALL_RESTART	2	/* restart the current system call */

#define _PIF_SYSCALL		_BITUL(PIF_SYSCALL)
#define _PIF_PER_TRAP		_BITUL(PIF_PER_TRAP)
#define _PIF_SYSCALL_RESTART	_BITUL(PIF_SYSCALL_RESTART)

#ifndef __ASSEMBLY__

#define PSW_KERNEL_BITS	(PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_ASC_HOME | \
			 PSW_MASK_EA | PSW_MASK_BA)
#define PSW_USER_BITS	(PSW_MASK_DAT | PSW_MASK_IO | PSW_MASK_EXT | \
			 PSW_DEFAULT_KEY | PSW_MASK_BASE | PSW_MASK_MCHECK | \
			 PSW_MASK_PSTATE | PSW_ASC_PRIMARY)

struct psw_bits {
	unsigned long	     :	1;
	unsigned long per    :	1; /* PER-Mask */
	unsigned long	     :	3;
	unsigned long dat    :	1; /* DAT Mode */
	unsigned long io     :	1; /* Input/Output Mask */
	unsigned long ext    :	1; /* External Mask */
	unsigned long key    :	4; /* PSW Key */
	unsigned long	     :	1;
	unsigned long mcheck :	1; /* Machine-Check Mask */
	unsigned long wait   :	1; /* Wait State */
	unsigned long pstate :	1; /* Problem State */
	unsigned long as     :	2; /* Address Space Control */
	unsigned long cc     :	2; /* Condition Code */
	unsigned long pm     :	4; /* Program Mask */
	unsigned long ri     :	1; /* Runtime Instrumentation */
	unsigned long	     :	6;
	unsigned long eaba   :	2; /* Addressing Mode */
	unsigned long	     : 31;
	unsigned long ia     : 64; /* Instruction Address */
};

enum {
	PSW_BITS_AMODE_24BIT = 0,
	PSW_BITS_AMODE_31BIT = 1,
	PSW_BITS_AMODE_64BIT = 3
};

enum {
	PSW_BITS_AS_PRIMARY	= 0,
	PSW_BITS_AS_ACCREG	= 1,
	PSW_BITS_AS_SECONDARY	= 2,
	PSW_BITS_AS_HOME	= 3
};

#define psw_bits(__psw) (*({			\
	typecheck(psw_t, __psw);		\
	&(*(struct psw_bits *)(&(__psw)));	\
}))

/*
 * The pt_regs struct defines the way the registers are stored on
 * the stack during a system call.
 */
struct pt_regs 
{
	unsigned long args[1];
	psw_t psw;
	unsigned long gprs[NUM_GPRS];
	unsigned long orig_gpr2;
	unsigned int int_code;
	unsigned int int_parm;
	unsigned long int_parm_long;
	unsigned long flags;
};

/*
 * Program event recording (PER) register set.
 */
struct per_regs {
	unsigned long control;		/* PER control bits */
	unsigned long start;		/* PER starting address */
	unsigned long end;		/* PER ending address */
};

/*
 * PER event contains information about the cause of the last PER exception.
 */
struct per_event {
	unsigned short cause;		/* PER code, ATMID and AI */
	unsigned long address;		/* PER address */
	unsigned char paid;		/* PER access identification */
};

/*
 * Simplified per_info structure used to decode the ptrace user space ABI.
 */
struct per_struct_kernel {
	unsigned long cr9;		/* PER control bits */
	unsigned long cr10;		/* PER starting address */
	unsigned long cr11;		/* PER ending address */
	unsigned long bits;		/* Obsolete software bits */
	unsigned long starting_addr;	/* User specified start address */
	unsigned long ending_addr;	/* User specified end address */
	unsigned short perc_atmid;	/* PER trap ATMID */
	unsigned long address;		/* PER trap instruction address */
	unsigned char access_id;	/* PER trap access identification */
};

#define PER_EVENT_MASK			0xEB000000UL

#define PER_EVENT_BRANCH		0x80000000UL
#define PER_EVENT_IFETCH		0x40000000UL
#define PER_EVENT_STORE			0x20000000UL
#define PER_EVENT_STORE_REAL		0x08000000UL
#define PER_EVENT_TRANSACTION_END	0x02000000UL
#define PER_EVENT_NULLIFICATION		0x01000000UL

#define PER_CONTROL_MASK		0x00e00000UL

#define PER_CONTROL_BRANCH_ADDRESS	0x00800000UL
#define PER_CONTROL_SUSPENSION		0x00400000UL
#define PER_CONTROL_ALTERATION		0x00200000UL

static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
{
	regs->flags |= (1UL << flag);
}

static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
{
	regs->flags &= ~(1UL << flag);
}

static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
{
	return !!(regs->flags & (1UL << flag));
}

/*
 * These are defined as per linux/ptrace.h, which see.
 */
#define arch_has_single_step()	(1)
#define arch_has_block_step()	(1)

#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
#define instruction_pointer(regs) ((regs)->psw.addr)
#define user_stack_pointer(regs)((regs)->gprs[15])
#define profile_pc(regs) instruction_pointer(regs)

static inline long regs_return_value(struct pt_regs *regs)
{
	return regs->gprs[2];
}

static inline void instruction_pointer_set(struct pt_regs *regs,
					   unsigned long val)
{
	regs->psw.addr = val;
}

int regs_query_register_offset(const char *name);
const char *regs_query_register_name(unsigned int offset);
unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);

static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
{
	return regs->gprs[15];
}

#endif /* __ASSEMBLY__ */
#endif /* _S390_PTRACE_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4	2	/*
1da177e4	3	* S390 version
a53c8fab	4	* Copyright IBM Corp. 1999, 2000
1da177e4 LT	5	* Author(s): Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
1da177e4 LT	6	*/
1da177e4 LT	7	#ifndef _S390_PTRACE_H
	8	#define _S390_PTRACE_H
	9
92778b99	10	#include <linux/const.h>
9807f759	11	#include <uapi/asm/ptrace.h>
1da177e4	12
d3a73acb MS	13	#define PIF_SYSCALL 0 /* inside a system call */
d3a73acb MS	14	#define PIF_PER_TRAP 1 /* deliver sigtrap on return to user */
23fefe11	15	#define PIF_SYSCALL_RESTART 2 /* restart the current system call */
d3a73acb	16
92778b99 HC	17	#define _PIF_SYSCALL _BITUL(PIF_SYSCALL)
92778b99 HC	18	#define _PIF_PER_TRAP _BITUL(PIF_PER_TRAP)
23fefe11	19	#define _PIF_SYSCALL_RESTART _BITUL(PIF_SYSCALL_RESTART)
d3a73acb	20
1da177e4	21	#ifndef __ASSEMBLY__
63dd9b44	22
e258d719 MS	23	#define PSW_KERNEL_BITS (PSW_DEFAULT_KEY \| PSW_MASK_BASE \| PSW_ASC_HOME \| \
	24	PSW_MASK_EA \| PSW_MASK_BA)
	25	#define PSW_USER_BITS (PSW_MASK_DAT \| PSW_MASK_IO \| PSW_MASK_EXT \| \
	26	PSW_DEFAULT_KEY \| PSW_MASK_BASE \| PSW_MASK_MCHECK \| \
	27	PSW_MASK_PSTATE \| PSW_ASC_PRIMARY)
274f5946	28
1365632b	29	struct psw_bits {
a7525982 HC	30	unsigned long : 1;
	31	unsigned long per : 1; /* PER-Mask */
	32	unsigned long : 3;
	33	unsigned long dat : 1; /* DAT Mode */
	34	unsigned long io : 1; /* Input/Output Mask */
	35	unsigned long ext : 1; /* External Mask */
	36	unsigned long key : 4; /* PSW Key */
	37	unsigned long : 1;
	38	unsigned long mcheck : 1; /* Machine-Check Mask */
	39	unsigned long wait : 1; /* Wait State */
	40	unsigned long pstate : 1; /* Problem State */
	41	unsigned long as : 2; /* Address Space Control */
	42	unsigned long cc : 2; /* Condition Code */
	43	unsigned long pm : 4; /* Program Mask */
	44	unsigned long ri : 1; /* Runtime Instrumentation */
	45	unsigned long : 6;
	46	unsigned long eaba : 2; /* Addressing Mode */
	47	unsigned long : 31;
	48	unsigned long ia : 64; /* Instruction Address */
1365632b HC	49	};
	50
	51	enum {
8bb3fdd6 HC	52	PSW_BITS_AMODE_24BIT = 0,
	53	PSW_BITS_AMODE_31BIT = 1,
	54	PSW_BITS_AMODE_64BIT = 3
1365632b HC	55	};
	56
	57	enum {
8bb3fdd6 HC	58	PSW_BITS_AS_PRIMARY = 0,
	59	PSW_BITS_AS_ACCREG = 1,
	60	PSW_BITS_AS_SECONDARY = 2,
	61	PSW_BITS_AS_HOME = 3
1365632b HC	62	};
	63
	64	#define psw_bits(__psw) (*({ \
	65	typecheck(psw_t, __psw); \
	66	&((struct psw_bits )(&(__psw))); \
	67	}))
	68
1da177e4 LT	69	/*
	70	* The pt_regs struct defines the way the registers are stored on
	71	* the stack during a system call.
	72	*/
	73	struct pt_regs
	74	{
	75	unsigned long args[1];
	76	psw_t psw;
	77	unsigned long gprs[NUM_GPRS];
	78	unsigned long orig_gpr2;
aa33c8cb	79	unsigned int int_code;
48f6b00c	80	unsigned int int_parm;
aa33c8cb	81	unsigned long int_parm_long;
d3a73acb	82	unsigned long flags;
1da177e4	83	};
5e9a2692 MS	84
	85	/*
	86	* Program event recording (PER) register set.
	87	*/
	88	struct per_regs {
	89	unsigned long control; /* PER control bits */
	90	unsigned long start; /* PER starting address */
	91	unsigned long end; /* PER ending address */
	92	};
	93
	94	/*
	95	* PER event contains information about the cause of the last PER exception.
	96	*/
	97	struct per_event {
	98	unsigned short cause; /* PER code, ATMID and AI */
	99	unsigned long address; /* PER address */
	100	unsigned char paid; /* PER access identification */
	101	};
	102
	103	/*
	104	* Simplified per_info structure used to decode the ptrace user space ABI.
	105	*/
	106	struct per_struct_kernel {
	107	unsigned long cr9; /* PER control bits */
	108	unsigned long cr10; /* PER starting address */
	109	unsigned long cr11; /* PER ending address */
	110	unsigned long bits; /* Obsolete software bits */
	111	unsigned long starting_addr; /* User specified start address */
	112	unsigned long ending_addr; /* User specified end address */
	113	unsigned short perc_atmid; /* PER trap ATMID */
	114	unsigned long address; /* PER trap instruction address */
	115	unsigned char access_id; /* PER trap access identification */
	116	};
	117
d35339a4	118	#define PER_EVENT_MASK 0xEB000000UL
5e9a2692 MS	119
	120	#define PER_EVENT_BRANCH 0x80000000UL
	121	#define PER_EVENT_IFETCH 0x40000000UL
	122	#define PER_EVENT_STORE 0x20000000UL
	123	#define PER_EVENT_STORE_REAL 0x08000000UL
d35339a4	124	#define PER_EVENT_TRANSACTION_END 0x02000000UL
5e9a2692 MS	125	#define PER_EVENT_NULLIFICATION 0x01000000UL
5e9a2692 MS	126
d35339a4	127	#define PER_CONTROL_MASK 0x00e00000UL
5e9a2692 MS	128
5e9a2692 MS	129	#define PER_CONTROL_BRANCH_ADDRESS 0x00800000UL
d35339a4	130	#define PER_CONTROL_SUSPENSION 0x00400000UL
5e9a2692 MS	131	#define PER_CONTROL_ALTERATION 0x00200000UL
5e9a2692 MS	132
d3a73acb MS	133	static inline void set_pt_regs_flag(struct pt_regs *regs, int flag)
d3a73acb MS	134	{
ac25e790	135	regs->flags \|= (1UL << flag);
d3a73acb MS	136	}
	137
	138	static inline void clear_pt_regs_flag(struct pt_regs *regs, int flag)
	139	{
ac25e790	140	regs->flags &= ~(1UL << flag);
d3a73acb MS	141	}
	142
	143	static inline int test_pt_regs_flag(struct pt_regs *regs, int flag)
	144	{
ac25e790	145	return !!(regs->flags & (1UL << flag));
d3a73acb MS	146	}
d3a73acb MS	147
0ac30be4 RM	148	/*
	149	* These are defined as per linux/ptrace.h, which see.
	150	*/
	151	#define arch_has_single_step() (1)
818a330c	152	#define arch_has_block_step() (1)
0ac30be4	153
1da177e4	154	#define user_mode(regs) (((regs)->psw.mask & PSW_MASK_PSTATE) != 0)
9cb1ccec	155	#define instruction_pointer(regs) ((regs)->psw.addr)
753c4dd6	156	#define user_stack_pointer(regs)((regs)->gprs[15])
1da177e4	157	#define profile_pc(regs) instruction_pointer(regs)
952974ac	158
d7e7528b EP	159	static inline long regs_return_value(struct pt_regs *regs)
	160	{
	161	return regs->gprs[2];
	162	}
	163
2a0a5b22 JW	164	static inline void instruction_pointer_set(struct pt_regs *regs,
	165	unsigned long val)
	166	{
fecc868a	167	regs->psw.addr = val;
2a0a5b22 JW	168	}
2a0a5b22 JW	169
952974ac HC	170	int regs_query_register_offset(const char *name);
	171	const char *regs_query_register_name(unsigned int offset);
	172	unsigned long regs_get_register(struct pt_regs *regs, unsigned int offset);
	173	unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n);
	174
	175	static inline unsigned long kernel_stack_pointer(struct pt_regs *regs)
	176	{
9cb1ccec	177	return regs->gprs[15];
952974ac HC	178	}
952974ac HC	179
1da177e4	180	#endif /* __ASSEMBLY__ */
1da177e4	181	#endif /* _S390_PTRACE_H */