Commit | Line | Data |
---|---|---|
b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * S390 version |
4 | * | |
5 | * Derived from "include/asm-i386/mmu_context.h" | |
6 | */ | |
7 | ||
8 | #ifndef __S390_MMU_CONTEXT_H | |
9 | #define __S390_MMU_CONTEXT_H | |
10 | ||
c1821c2e | 11 | #include <asm/pgalloc.h> |
7c0f6ba6 | 12 | #include <linux/uaccess.h> |
589ee628 | 13 | #include <linux/mm_types.h> |
050eef36 | 14 | #include <asm/tlbflush.h> |
ebe1cd53 | 15 | #include <asm/ctlreg.h> |
8e58ab5c | 16 | #include <asm-generic/mm_hooks.h> |
d6dd61c8 | 17 | |
93e2dfd3 | 18 | #define init_new_context init_new_context |
6f457e1a MS |
19 | static inline int init_new_context(struct task_struct *tsk, |
20 | struct mm_struct *mm) | |
21 | { | |
1058c163 AG |
22 | unsigned long asce_type, init_entry; |
23 | ||
60f07c8e | 24 | spin_lock_init(&mm->context.lock); |
3446c13b | 25 | INIT_LIST_HEAD(&mm->context.gmap_list); |
1b948d6c | 26 | cpumask_clear(&mm->context.cpu_attach_mask); |
64f31d58 | 27 | atomic_set(&mm->context.flush_count, 0); |
07fbdf7f | 28 | atomic_set(&mm->context.protected_count, 0); |
44b6cc81 | 29 | mm->context.gmap_asce = 0; |
050eef36 | 30 | mm->context.flush_mm = 0; |
0b46e0a3 | 31 | #ifdef CONFIG_PGSTE |
23fefe11 MS |
32 | mm->context.alloc_pgste = page_table_allocate_pgste || |
33 | test_thread_flag(TIF_PGSTE) || | |
53c4ab70 | 34 | (current->mm && current->mm->context.alloc_pgste); |
3eabaee9 | 35 | mm->context.has_pgste = 0; |
55531b74 | 36 | mm->context.uses_skeys = 0; |
c9f0a2b8 | 37 | mm->context.uses_cmm = 0; |
06201e00 | 38 | mm->context.allow_cow_sharing = 1; |
a9e00d83 | 39 | mm->context.allow_gmap_hpage_1m = 0; |
0b46e0a3 | 40 | #endif |
723cacbd | 41 | switch (mm->context.asce_limit) { |
1058c163 | 42 | default: |
723cacbd | 43 | /* |
1058c163 AG |
44 | * context created by exec, the value of asce_limit can |
45 | * only be zero in this case | |
723cacbd | 46 | */ |
1058c163 AG |
47 | VM_BUG_ON(mm->context.asce_limit); |
48 | /* continue as 3-level task */ | |
f7555608 | 49 | mm->context.asce_limit = _REGION2_SIZE; |
1058c163 AG |
50 | fallthrough; |
51 | case _REGION2_SIZE: | |
52 | /* forked 3-level task */ | |
53 | init_entry = _REGION3_ENTRY_EMPTY; | |
54 | asce_type = _ASCE_TYPE_REGION3; | |
723cacbd | 55 | break; |
f7555608 | 56 | case TASK_SIZE_MAX: |
1058c163 AG |
57 | /* forked 5-level task */ |
58 | init_entry = _REGION1_ENTRY_EMPTY; | |
59 | asce_type = _ASCE_TYPE_REGION1; | |
0b89ede6 | 60 | break; |
f1c1174f | 61 | case _REGION1_SIZE: |
1058c163 AG |
62 | /* forked 4-level task */ |
63 | init_entry = _REGION2_ENTRY_EMPTY; | |
64 | asce_type = _ASCE_TYPE_REGION2; | |
723cacbd | 65 | break; |
3446c13b | 66 | } |
1058c163 AG |
67 | mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH | |
68 | _ASCE_USER_BITS | asce_type; | |
69 | crst_table_init((unsigned long *) mm->pgd, init_entry); | |
6f457e1a MS |
70 | return 0; |
71 | } | |
1da177e4 | 72 | |
bdb8c935 AG |
73 | static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next, |
74 | struct task_struct *tsk) | |
1da177e4 | 75 | { |
53e857f3 MS |
76 | int cpu = smp_processor_id(); |
77 | ||
b4d70a61 | 78 | if (next == &init_mm) |
208da1d5 | 79 | get_lowcore()->user_asce = s390_invalid_asce; |
b4d70a61 | 80 | else |
208da1d5 | 81 | get_lowcore()->user_asce.val = next->context.asce; |
64f31d58 | 82 | cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); |
87d59863 | 83 | /* Clear previous user-ASCE from CR7 */ |
2372d391 | 84 | local_ctl_load(7, &s390_invalid_asce); |
a3866208 MS |
85 | if (prev != next) |
86 | cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); | |
53e857f3 | 87 | } |
bdb8c935 AG |
88 | #define switch_mm_irqs_off switch_mm_irqs_off |
89 | ||
90 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, | |
91 | struct task_struct *tsk) | |
92 | { | |
93 | unsigned long flags; | |
94 | ||
95 | local_irq_save(flags); | |
96 | switch_mm_irqs_off(prev, next, tsk); | |
97 | local_irq_restore(flags); | |
98 | } | |
53e857f3 MS |
99 | |
100 | #define finish_arch_post_lock_switch finish_arch_post_lock_switch | |
101 | static inline void finish_arch_post_lock_switch(void) | |
102 | { | |
103 | struct task_struct *tsk = current; | |
104 | struct mm_struct *mm = tsk->mm; | |
105 | ||
f8b13505 MS |
106 | if (mm) { |
107 | preempt_disable(); | |
64f31d58 | 108 | while (atomic_read(&mm->context.flush_count)) |
f8b13505 | 109 | cpu_relax(); |
b3e5dc45 | 110 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); |
60f07c8e | 111 | __tlb_flush_mm_lazy(mm); |
f8b13505 MS |
112 | preempt_enable(); |
113 | } | |
208da1d5 | 114 | local_ctl_load(7, &get_lowcore()->user_asce); |
1da177e4 LT |
115 | } |
116 | ||
93e2dfd3 | 117 | #define activate_mm activate_mm |
4448aaf0 | 118 | static inline void activate_mm(struct mm_struct *prev, |
1da177e4 LT |
119 | struct mm_struct *next) |
120 | { | |
beef560b | 121 | switch_mm(prev, next, current); |
b3e5dc45 | 122 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(next)); |
208da1d5 | 123 | local_ctl_load(7, &get_lowcore()->user_asce); |
1da177e4 LT |
124 | } |
125 | ||
93e2dfd3 NP |
126 | #include <asm-generic/mmu_context.h> |
127 | ||
c1821c2e | 128 | #endif /* __S390_MMU_CONTEXT_H */ |