Merge tag 'pci-v6.16-fixes-3' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci
[linux-2.6-block.git] / arch / s390 / include / asm / mmu_context.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 2/*
1da177e4
LT
3 * S390 version
4 *
5 * Derived from "include/asm-i386/mmu_context.h"
6 */
7
8#ifndef __S390_MMU_CONTEXT_H
9#define __S390_MMU_CONTEXT_H
10
c1821c2e 11#include <asm/pgalloc.h>
7c0f6ba6 12#include <linux/uaccess.h>
589ee628 13#include <linux/mm_types.h>
050eef36 14#include <asm/tlbflush.h>
ebe1cd53 15#include <asm/ctlreg.h>
8b72f5a9 16#include <asm/asce.h>
8e58ab5c 17#include <asm-generic/mm_hooks.h>
d6dd61c8 18
93e2dfd3 19#define init_new_context init_new_context
6f457e1a
MS
20static inline int init_new_context(struct task_struct *tsk,
21 struct mm_struct *mm)
22{
1058c163
AG
23 unsigned long asce_type, init_entry;
24
60f07c8e 25 spin_lock_init(&mm->context.lock);
3446c13b 26 INIT_LIST_HEAD(&mm->context.gmap_list);
1b948d6c 27 cpumask_clear(&mm->context.cpu_attach_mask);
64f31d58 28 atomic_set(&mm->context.flush_count, 0);
07fbdf7f 29 atomic_set(&mm->context.protected_count, 0);
44b6cc81 30 mm->context.gmap_asce = 0;
050eef36 31 mm->context.flush_mm = 0;
0b46e0a3 32#ifdef CONFIG_PGSTE
3eabaee9 33 mm->context.has_pgste = 0;
55531b74 34 mm->context.uses_skeys = 0;
c9f0a2b8 35 mm->context.uses_cmm = 0;
06201e00 36 mm->context.allow_cow_sharing = 1;
a9e00d83 37 mm->context.allow_gmap_hpage_1m = 0;
0b46e0a3 38#endif
723cacbd 39 switch (mm->context.asce_limit) {
1058c163 40 default:
723cacbd 41 /*
1058c163
AG
42 * context created by exec, the value of asce_limit can
43 * only be zero in this case
723cacbd 44 */
1058c163
AG
45 VM_BUG_ON(mm->context.asce_limit);
46 /* continue as 3-level task */
f7555608 47 mm->context.asce_limit = _REGION2_SIZE;
1058c163
AG
48 fallthrough;
49 case _REGION2_SIZE:
50 /* forked 3-level task */
51 init_entry = _REGION3_ENTRY_EMPTY;
52 asce_type = _ASCE_TYPE_REGION3;
723cacbd 53 break;
f7555608 54 case TASK_SIZE_MAX:
1058c163
AG
55 /* forked 5-level task */
56 init_entry = _REGION1_ENTRY_EMPTY;
57 asce_type = _ASCE_TYPE_REGION1;
0b89ede6 58 break;
f1c1174f 59 case _REGION1_SIZE:
1058c163
AG
60 /* forked 4-level task */
61 init_entry = _REGION2_ENTRY_EMPTY;
62 asce_type = _ASCE_TYPE_REGION2;
723cacbd 63 break;
3446c13b 64 }
1058c163
AG
65 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
66 _ASCE_USER_BITS | asce_type;
67 crst_table_init((unsigned long *) mm->pgd, init_entry);
6f457e1a
MS
68 return 0;
69}
1da177e4 70
bdb8c935
AG
71static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
72 struct task_struct *tsk)
1da177e4 73{
53e857f3
MS
74 int cpu = smp_processor_id();
75
b4d70a61 76 if (next == &init_mm)
208da1d5 77 get_lowcore()->user_asce = s390_invalid_asce;
b4d70a61 78 else
208da1d5 79 get_lowcore()->user_asce.val = next->context.asce;
64f31d58 80 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
8b72f5a9
HC
81 /* Clear previous user-ASCE from CR1 and CR7 */
82 local_ctl_load(1, &s390_invalid_asce);
2372d391 83 local_ctl_load(7, &s390_invalid_asce);
a3866208
MS
84 if (prev != next)
85 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
53e857f3 86}
bdb8c935
AG
87#define switch_mm_irqs_off switch_mm_irqs_off
88
89static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
90 struct task_struct *tsk)
91{
92 unsigned long flags;
93
94 local_irq_save(flags);
95 switch_mm_irqs_off(prev, next, tsk);
96 local_irq_restore(flags);
97}
53e857f3
MS
98
99#define finish_arch_post_lock_switch finish_arch_post_lock_switch
100static inline void finish_arch_post_lock_switch(void)
101{
102 struct task_struct *tsk = current;
103 struct mm_struct *mm = tsk->mm;
8b72f5a9 104 unsigned long flags;
53e857f3 105
f8b13505
MS
106 if (mm) {
107 preempt_disable();
64f31d58 108 while (atomic_read(&mm->context.flush_count))
f8b13505 109 cpu_relax();
b3e5dc45 110 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
60f07c8e 111 __tlb_flush_mm_lazy(mm);
f8b13505
MS
112 preempt_enable();
113 }
8b72f5a9
HC
114 local_irq_save(flags);
115 if (test_thread_flag(TIF_ASCE_PRIMARY))
116 local_ctl_load(1, &get_lowcore()->kernel_asce);
117 else
118 local_ctl_load(1, &get_lowcore()->user_asce);
208da1d5 119 local_ctl_load(7, &get_lowcore()->user_asce);
8b72f5a9 120 local_irq_restore(flags);
1da177e4
LT
121}
122
93e2dfd3 123#define activate_mm activate_mm
4448aaf0 124static inline void activate_mm(struct mm_struct *prev,
1da177e4
LT
125 struct mm_struct *next)
126{
fe201641 127 switch_mm_irqs_off(prev, next, current);
b3e5dc45 128 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
8b72f5a9
HC
129 if (test_thread_flag(TIF_ASCE_PRIMARY))
130 local_ctl_load(1, &get_lowcore()->kernel_asce);
131 else
132 local_ctl_load(1, &get_lowcore()->user_asce);
208da1d5 133 local_ctl_load(7, &get_lowcore()->user_asce);
1da177e4
LT
134}
135
93e2dfd3
NP
136#include <asm-generic/mmu_context.h>
137
c1821c2e 138#endif /* __S390_MMU_CONTEXT_H */