Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * S390 version |
3 | * | |
4 | * Derived from "include/asm-i386/mmu_context.h" | |
5 | */ | |
6 | ||
7 | #ifndef __S390_MMU_CONTEXT_H | |
8 | #define __S390_MMU_CONTEXT_H | |
9 | ||
c1821c2e | 10 | #include <asm/pgalloc.h> |
146e4b3c | 11 | #include <asm/uaccess.h> |
050eef36 | 12 | #include <asm/tlbflush.h> |
a0616cde | 13 | #include <asm/ctl_reg.h> |
d6dd61c8 | 14 | |
6f457e1a MS |
15 | static inline int init_new_context(struct task_struct *tsk, |
16 | struct mm_struct *mm) | |
17 | { | |
1b948d6c | 18 | cpumask_clear(&mm->context.cpu_attach_mask); |
050eef36 MS |
19 | atomic_set(&mm->context.attach_count, 0); |
20 | mm->context.flush_mm = 0; | |
146e4b3c | 21 | mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS; |
6f457e1a | 22 | #ifdef CONFIG_64BIT |
6252d702 | 23 | mm->context.asce_bits |= _ASCE_TYPE_REGION3; |
6f457e1a | 24 | #endif |
3eabaee9 | 25 | mm->context.has_pgste = 0; |
6252d702 MS |
26 | mm->context.asce_limit = STACK_TOP_MAX; |
27 | crst_table_init((unsigned long *) mm->pgd, pgd_entry_type(mm)); | |
6f457e1a MS |
28 | return 0; |
29 | } | |
1da177e4 LT |
30 | |
31 | #define destroy_context(mm) do { } while (0) | |
32 | ||
f4815ac6 | 33 | #ifndef CONFIG_64BIT |
c1821c2e | 34 | #define LCTL_OPCODE "lctl" |
c1821c2e GS |
35 | #else |
36 | #define LCTL_OPCODE "lctlg" | |
c1821c2e GS |
37 | #endif |
38 | ||
02a8f3ab | 39 | static inline void update_user_asce(struct mm_struct *mm) |
1da177e4 | 40 | { |
146e4b3c MS |
41 | pgd_t *pgd = mm->pgd; |
42 | ||
43 | S390_lowcore.user_asce = mm->context.asce_bits | __pa(pgd); | |
e258d719 MS |
44 | /* Load primary space page table origin. */ |
45 | asm volatile(LCTL_OPCODE" 1,1,%0\n" : : "m" (S390_lowcore.user_asce)); | |
6252d702 | 46 | set_fs(current->thread.mm_segment); |
1da177e4 LT |
47 | } |
48 | ||
02a8f3ab MS |
49 | static inline void clear_user_asce(struct mm_struct *mm) |
50 | { | |
51 | S390_lowcore.user_asce = S390_lowcore.kernel_asce; | |
52 | asm volatile(LCTL_OPCODE" 1,1,%0\n" : : "m" (S390_lowcore.user_asce)); | |
53 | asm volatile(LCTL_OPCODE" 7,7,%0\n" : : "m" (S390_lowcore.user_asce)); | |
54 | } | |
55 | ||
1da177e4 | 56 | static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next, |
c1821c2e | 57 | struct task_struct *tsk) |
1da177e4 | 58 | { |
53e857f3 MS |
59 | int cpu = smp_processor_id(); |
60 | ||
61 | if (prev == next) | |
62 | return; | |
1b948d6c MS |
63 | if (MACHINE_HAS_TLB_LC) |
64 | cpumask_set_cpu(cpu, &next->context.cpu_attach_mask); | |
53e857f3 | 65 | if (atomic_inc_return(&next->context.attach_count) >> 16) { |
02a8f3ab | 66 | /* Delay update_user_asce until all TLB flushes are done. */ |
53e857f3 | 67 | set_tsk_thread_flag(tsk, TIF_TLB_WAIT); |
02a8f3ab MS |
68 | /* Clear old ASCE by loading the kernel ASCE. */ |
69 | clear_user_asce(next); | |
53e857f3 MS |
70 | } else { |
71 | cpumask_set_cpu(cpu, mm_cpumask(next)); | |
02a8f3ab | 72 | update_user_asce(next); |
53e857f3 MS |
73 | if (next->context.flush_mm) |
74 | /* Flush pending TLBs */ | |
75 | __tlb_flush_mm(next); | |
76 | } | |
050eef36 MS |
77 | atomic_dec(&prev->context.attach_count); |
78 | WARN_ON(atomic_read(&prev->context.attach_count) < 0); | |
1b948d6c MS |
79 | if (MACHINE_HAS_TLB_LC) |
80 | cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); | |
53e857f3 MS |
81 | } |
82 | ||
83 | #define finish_arch_post_lock_switch finish_arch_post_lock_switch | |
84 | static inline void finish_arch_post_lock_switch(void) | |
85 | { | |
86 | struct task_struct *tsk = current; | |
87 | struct mm_struct *mm = tsk->mm; | |
88 | ||
89 | if (!test_tsk_thread_flag(tsk, TIF_TLB_WAIT)) | |
90 | return; | |
91 | preempt_disable(); | |
92 | clear_tsk_thread_flag(tsk, TIF_TLB_WAIT); | |
93 | while (atomic_read(&mm->context.attach_count) >> 16) | |
94 | cpu_relax(); | |
95 | ||
96 | cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm)); | |
02a8f3ab | 97 | update_user_asce(mm); |
53e857f3 MS |
98 | if (mm->context.flush_mm) |
99 | __tlb_flush_mm(mm); | |
100 | preempt_enable(); | |
1da177e4 LT |
101 | } |
102 | ||
3610cce8 | 103 | #define enter_lazy_tlb(mm,tsk) do { } while (0) |
1da177e4 LT |
104 | #define deactivate_mm(tsk,mm) do { } while (0) |
105 | ||
4448aaf0 | 106 | static inline void activate_mm(struct mm_struct *prev, |
1da177e4 LT |
107 | struct mm_struct *next) |
108 | { | |
109 | switch_mm(prev, next, current); | |
1da177e4 LT |
110 | } |
111 | ||
0f6f281b MS |
112 | static inline void arch_dup_mmap(struct mm_struct *oldmm, |
113 | struct mm_struct *mm) | |
114 | { | |
115 | #ifdef CONFIG_64BIT | |
116 | if (oldmm->context.asce_limit < mm->context.asce_limit) | |
117 | crst_table_downgrade(mm, oldmm->context.asce_limit); | |
118 | #endif | |
119 | } | |
120 | ||
121 | static inline void arch_exit_mmap(struct mm_struct *mm) | |
122 | { | |
123 | } | |
124 | ||
c1821c2e | 125 | #endif /* __S390_MMU_CONTEXT_H */ |