[linux-2.6-block.git] / arch / s390 / include / asm / lowcore.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *    Copyright IBM Corp. 1999, 2012
 *    Author(s): Hartmut Penner <hp@de.ibm.com>,
 *		 Martin Schwidefsky <schwidefsky@de.ibm.com>,
 *		 Denis Joseph Barrow,
 */

#ifndef _ASM_S390_LOWCORE_H
#define _ASM_S390_LOWCORE_H

#include <linux/types.h>
#include <asm/machine.h>
#include <asm/ptrace.h>
#include <asm/ctlreg.h>
#include <asm/cpu.h>
#include <asm/types.h>
#include <asm/alternative.h>

#define LC_ORDER 1
#define LC_PAGES 2

#define LOWCORE_ALT_ADDRESS	_AC(0x70000, UL)

#ifndef __ASSEMBLY__

struct pgm_tdb {
	u64 data[32];
};

struct lowcore {
	__u8	pad_0x0000[0x0014-0x0000];	/* 0x0000 */
	__u32	ipl_parmblock_ptr;		/* 0x0014 */
	__u8	pad_0x0018[0x0080-0x0018];	/* 0x0018 */
	__u32	ext_params;			/* 0x0080 */
	union {
		struct {
			__u16 ext_cpu_addr;	/* 0x0084 */
			__u16 ext_int_code;	/* 0x0086 */
		};
		__u32 ext_int_code_addr;
	};
	__u32	svc_int_code;			/* 0x0088 */
	union {
		struct {
			__u16	pgm_ilc;	/* 0x008c */
			__u16	pgm_code;	/* 0x008e */
		};
		__u32 pgm_int_code;
	};
	__u32	data_exc_code;			/* 0x0090 */
	__u16	mon_class_num;			/* 0x0094 */
	union {
		struct {
			__u8	per_code;	/* 0x0096 */
			__u8	per_atmid;	/* 0x0097 */
		};
		__u16 per_code_combined;
	};
	__u64	per_address;			/* 0x0098 */
	__u8	exc_access_id;			/* 0x00a0 */
	__u8	per_access_id;			/* 0x00a1 */
	__u8	op_access_id;			/* 0x00a2 */
	__u8	ar_mode_id;			/* 0x00a3 */
	__u8	pad_0x00a4[0x00a8-0x00a4];	/* 0x00a4 */
	__u64	trans_exc_code;			/* 0x00a8 */
	__u64	monitor_code;			/* 0x00b0 */
	union {
		struct {
			__u16	subchannel_id;	/* 0x00b8 */
			__u16	subchannel_nr;	/* 0x00ba */
			__u32	io_int_parm;	/* 0x00bc */
			__u32	io_int_word;	/* 0x00c0 */
		};
		struct tpi_info	tpi_info;	/* 0x00b8 */
	};
	__u8	pad_0x00c4[0x00c8-0x00c4];	/* 0x00c4 */
	__u32	stfl_fac_list;			/* 0x00c8 */
	__u8	pad_0x00cc[0x00e8-0x00cc];	/* 0x00cc */
	__u64	mcck_interruption_code;		/* 0x00e8 */
	__u8	pad_0x00f0[0x00f4-0x00f0];	/* 0x00f0 */
	__u32	external_damage_code;		/* 0x00f4 */
	__u64	failing_storage_address;	/* 0x00f8 */
	__u8	pad_0x0100[0x0110-0x0100];	/* 0x0100 */
	__u64	pgm_last_break;			/* 0x0110 */
	__u8	pad_0x0118[0x0120-0x0118];	/* 0x0118 */
	psw_t	restart_old_psw;		/* 0x0120 */
	psw_t	external_old_psw;		/* 0x0130 */
	psw_t	svc_old_psw;			/* 0x0140 */
	psw_t	program_old_psw;		/* 0x0150 */
	psw_t	mcck_old_psw;			/* 0x0160 */
	psw_t	io_old_psw;			/* 0x0170 */
	__u8	pad_0x0180[0x01a0-0x0180];	/* 0x0180 */
	psw_t	restart_psw;			/* 0x01a0 */
	psw_t	external_new_psw;		/* 0x01b0 */
	psw_t	svc_new_psw;			/* 0x01c0 */
	psw_t	program_new_psw;		/* 0x01d0 */
	psw_t	mcck_new_psw;			/* 0x01e0 */
	psw_t	io_new_psw;			/* 0x01f0 */

	/* Save areas. */
	__u64	save_area[8];			/* 0x0200 */
	__u8	pad_0x0240[0x0280-0x0240];	/* 0x0240 */
	__u64	save_area_restart[1];		/* 0x0280 */

	__u64	pcpu;				/* 0x0288 */

	/* Return psws. */
	psw_t	return_psw;			/* 0x0290 */
	psw_t	return_mcck_psw;		/* 0x02a0 */

	__u64	last_break;			/* 0x02b0 */

	/* CPU accounting and timing values. */
	__u64	sys_enter_timer;		/* 0x02b8 */
	__u64	mcck_enter_timer;		/* 0x02c0 */
	__u64	exit_timer;			/* 0x02c8 */
	__u64	user_timer;			/* 0x02d0 */
	__u64	guest_timer;			/* 0x02d8 */
	__u64	system_timer;			/* 0x02e0 */
	__u64	hardirq_timer;			/* 0x02e8 */
	__u64	softirq_timer;			/* 0x02f0 */
	__u64	steal_timer;			/* 0x02f8 */
	__u64	avg_steal_timer;		/* 0x0300 */
	__u64	last_update_timer;		/* 0x0308 */
	__u64	last_update_clock;		/* 0x0310 */
	__u64	int_clock;			/* 0x0318 */
	__u8	pad_0x0320[0x0328-0x0320];	/* 0x0320 */
	__u64	clock_comparator;		/* 0x0328 */
	__u8	pad_0x0330[0x0340-0x0330];	/* 0x0330 */

	/* Current process. */
	__u64	current_task;			/* 0x0340 */
	__u64	kernel_stack;			/* 0x0348 */

	/* Interrupt, DAT-off and restartstack. */
	__u64	async_stack;			/* 0x0350 */
	__u64	nodat_stack;			/* 0x0358 */
	__u64	restart_stack;			/* 0x0360 */
	__u64	mcck_stack;			/* 0x0368 */
	/* Restart function and parameter. */
	__u64	restart_fn;			/* 0x0370 */
	__u64	restart_data;			/* 0x0378 */
	__u32	restart_source;			/* 0x0380 */
	__u32	restart_flags;			/* 0x0384 */

	/* Address space pointer. */
	struct ctlreg kernel_asce;		/* 0x0388 */
	struct ctlreg user_asce;		/* 0x0390 */

	/*
	 * The lpp and current_pid fields form a
	 * 64-bit value that is set as program
	 * parameter with the LPP instruction.
	 */
	__u32	lpp;				/* 0x0398 */
	__u32	current_pid;			/* 0x039c */

	/* SMP info area */
	__u32	cpu_nr;				/* 0x03a0 */
	__u32	softirq_pending;		/* 0x03a4 */
	__s32	preempt_count;			/* 0x03a8 */
	__u32	spinlock_lockval;		/* 0x03ac */
	__u32	spinlock_index;			/* 0x03b0 */
	__u8	pad_0x03b4[0x03b8-0x03b4];	/* 0x03b4 */
	__u64	percpu_offset;			/* 0x03b8 */
	__u8	pad_0x03c0[0x0400-0x03c0];	/* 0x03c0 */

	__u32	return_lpswe;			/* 0x0400 */
	__u32	return_mcck_lpswe;		/* 0x0404 */
	__u8	pad_0x040a[0x0e00-0x0408];	/* 0x0408 */

	/*
	 * 0xe00 contains the address of the IPL Parameter Information
	 * block. Dump tools need IPIB for IPL after dump.
	 * Note: do not change the position of any fields in 0x0e00-0x0f00
	 */
	__u64	ipib;				/* 0x0e00 */
	__u32	ipib_checksum;			/* 0x0e08 */
	__u64	vmcore_info;			/* 0x0e0c */
	__u8	pad_0x0e14[0x0e18-0x0e14];	/* 0x0e14 */
	__u64	os_info;			/* 0x0e18 */
	__u8	pad_0x0e20[0x11b0-0x0e20];	/* 0x0e20 */

	/* Pointer to the machine check extended save area */
	__u64	mcesad;				/* 0x11b0 */

	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
	__u64	ext_params2;			/* 0x11B8 */
	__u8	pad_0x11c0[0x1200-0x11C0];	/* 0x11C0 */

	/* CPU register save area: defined by architecture */
	__u64	floating_pt_save_area[16];	/* 0x1200 */
	__u64	gpregs_save_area[16];		/* 0x1280 */
	psw_t	psw_save_area;			/* 0x1300 */
	__u8	pad_0x1310[0x1318-0x1310];	/* 0x1310 */
	__u32	prefixreg_save_area;		/* 0x1318 */
	__u32	fpt_creg_save_area;		/* 0x131c */
	__u8	pad_0x1320[0x1324-0x1320];	/* 0x1320 */
	__u32	tod_progreg_save_area;		/* 0x1324 */
	__u32	cpu_timer_save_area[2];		/* 0x1328 */
	__u32	clock_comp_save_area[2];	/* 0x1330 */
	__u64	last_break_save_area;		/* 0x1338 */
	__u32	access_regs_save_area[16];	/* 0x1340 */
	struct ctlreg cregs_save_area[16];	/* 0x1380 */
	__u8	pad_0x1400[0x1500-0x1400];	/* 0x1400 */
	/* Cryptography-counter designation */
	__u64	ccd;				/* 0x1500 */
	/* AI-extension counter designation */
	__u64	aicd;				/* 0x1508 */
	__u8	pad_0x1510[0x1800-0x1510];	/* 0x1510 */

	/* Transaction abort diagnostic block */
	struct pgm_tdb pgm_tdb;			/* 0x1800 */
	__u8	pad_0x1900[0x2000-0x1900];	/* 0x1900 */
} __packed __aligned(8192);

static __always_inline struct lowcore *get_lowcore(void)
{
	struct lowcore *lc;

	if (__is_defined(__DECOMPRESSOR))
		return NULL;
	asm_inline(
		ALTERNATIVE("	lghi	%[lc],0",
			    "	llilh	%[lc],%[alt]",
			    ALT_FEATURE(MFEATURE_LOWCORE))
		: [lc] "=d" (lc)
		: [alt] "i" (LOWCORE_ALT_ADDRESS >> 16));
	return lc;
}

extern struct lowcore *lowcore_ptr[];

static inline void set_prefix(__u32 address)
{
	asm volatile("spx %0" : : "Q" (address) : "memory");
}

#else /* __ASSEMBLY__ */

.macro GET_LC reg
	ALTERNATIVE "lghi	\reg,0",					\
		__stringify(llilh	\reg, LOWCORE_ALT_ADDRESS >> 16),	\
		ALT_FEATURE(MFEATURE_LOWCORE)
.endm

.macro STMG_LC start, end, savearea
	ALTERNATIVE "stmg	\start, \end, \savearea",				\
		__stringify(stmg	\start, \end, LOWCORE_ALT_ADDRESS + \savearea),	\
		ALT_FEATURE(MFEATURE_LOWCORE)
.endm

#endif /* __ASSEMBLY__ */
#endif /* _ASM_S390_LOWCORE_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4	2	/*
a53c8fab	3	* Copyright IBM Corp. 1999, 2012
cbb870c8 HC	4	* Author(s): Hartmut Penner <hp@de.ibm.com>,
	5	* Martin Schwidefsky <schwidefsky@de.ibm.com>,
	6	* Denis Joseph Barrow,
1da177e4 LT	7	*/
	8
	9	#ifndef _ASM_S390_LOWCORE_H
	10	#define _ASM_S390_LOWCORE_H
	11
1da177e4	12	#include <linux/types.h>
e4da8249	13	#include <asm/machine.h>
cbb870c8	14	#include <asm/ptrace.h>
527618ab	15	#include <asm/ctlreg.h>
cbb870c8	16	#include <asm/cpu.h>
a62bc073	17	#include <asm/types.h>
5ade5be4	18	#include <asm/alternative.h>
1da177e4	19
cbb870c8 HC	20	#define LC_ORDER 1
	21	#define LC_PAGES 2
	22
5ade5be4 SS	23	#define LOWCORE_ALT_ADDRESS _AC(0x70000, UL)
	24
	25	#ifndef __ASSEMBLY__
	26
755112b3 SS	27	struct pgm_tdb {
	28	u64 data[32];
	29	};
	30
c667aeac	31	struct lowcore {
cbb870c8 HC	32	__u8 pad_0x0000[0x0014-0x0000]; /* 0x0000 */
cbb870c8 HC	33	__u32 ipl_parmblock_ptr; /* 0x0014 */
866ba284 MS	34	__u8 pad_0x0018[0x0080-0x0018]; /* 0x0018 */
866ba284 MS	35	__u32 ext_params; /* 0x0080 */
6c6a07fc SS	36	union {
	37	struct {
	38	__u16 ext_cpu_addr; /* 0x0084 */
	39	__u16 ext_int_code; /* 0x0086 */
21aadf2e	40	};
6c6a07fc	41	__u32 ext_int_code_addr;
21aadf2e	42	};
af9ad822	43	__u32 svc_int_code; /* 0x0088 */
52b739e2 HC	44	union {
	45	struct {
	46	__u16 pgm_ilc; /* 0x008c */
	47	__u16 pgm_code; /* 0x008e */
	48	};
	49	__u32 pgm_int_code;
	50	};
866ba284 MS	51	__u32 data_exc_code; /* 0x0090 */
866ba284 MS	52	__u16 mon_class_num; /* 0x0094 */
998e7800 HC	53	union {
	54	struct {
	55	__u8 per_code; /* 0x0096 */
	56	__u8 per_atmid; /* 0x0097 */
	57	};
	58	__u16 per_code_combined;
	59	};
94038a99	60	__u64 per_address; /* 0x0098 */
866ba284 MS	61	__u8 exc_access_id; /* 0x00a0 */
	62	__u8 per_access_id; /* 0x00a1 */
	63	__u8 op_access_id; /* 0x00a2 */
3d53b46c	64	__u8 ar_mode_id; /* 0x00a3 */
866ba284	65	__u8 pad_0x00a4[0x00a8-0x00a4]; /* 0x00a4 */
94038a99 MS	66	__u64 trans_exc_code; /* 0x00a8 */
94038a99 MS	67	__u64 monitor_code; /* 0x00b0 */
0a500447 SS	68	union {
	69	struct {
	70	__u16 subchannel_id; /* 0x00b8 */
	71	__u16 subchannel_nr; /* 0x00ba */
	72	__u32 io_int_parm; /* 0x00bc */
	73	__u32 io_int_word; /* 0x00c0 */
	74	};
	75	struct tpi_info tpi_info; /* 0x00b8 */
	76	};
866ba284 MS	77	__u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
	78	__u32 stfl_fac_list; /* 0x00c8 */
	79	__u8 pad_0x00cc[0x00e8-0x00cc]; /* 0x00cc */
004f0bba	80	__u64 mcck_interruption_code; /* 0x00e8 */
866ba284 MS	81	__u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
866ba284 MS	82	__u32 external_damage_code; /* 0x00f4 */
94038a99	83	__u64 failing_storage_address; /* 0x00f8 */
cbb870c8	84	__u8 pad_0x0100[0x0110-0x0100]; /* 0x0100 */
26c21aa4	85	__u64 pgm_last_break; /* 0x0110 */
cbb870c8	86	__u8 pad_0x0118[0x0120-0x0118]; /* 0x0118 */
866ba284 MS	87	psw_t restart_old_psw; /* 0x0120 */
	88	psw_t external_old_psw; /* 0x0130 */
	89	psw_t svc_old_psw; /* 0x0140 */
	90	psw_t program_old_psw; /* 0x0150 */
	91	psw_t mcck_old_psw; /* 0x0160 */
	92	psw_t io_old_psw; /* 0x0170 */
	93	__u8 pad_0x0180[0x01a0-0x0180]; /* 0x0180 */
	94	psw_t restart_psw; /* 0x01a0 */
	95	psw_t external_new_psw; /* 0x01b0 */
	96	psw_t svc_new_psw; /* 0x01c0 */
	97	psw_t program_new_psw; /* 0x01d0 */
	98	psw_t mcck_new_psw; /* 0x01e0 */
	99	psw_t io_new_psw; /* 0x01f0 */
	100
c5328901	101	/* Save areas. */
ee3daf7c SS	102	__u64 save_area[8]; /* 0x0200 */
ee3daf7c SS	103	__u8 pad_0x0240[0x0280-0x0240]; /* 0x0240 */
c5328901	104	__u64 save_area_restart[1]; /* 0x0280 */
d3a73acb	105
d3604ffb	106	__u64 pcpu; /* 0x0288 */
c5328901 MS	107
	108	/* Return psws. */
	109	psw_t return_psw; /* 0x0290 */
	110	psw_t return_mcck_psw; /* 0x02a0 */
866ba284	111
3b051e89 SS	112	__u64 last_break; /* 0x02b0 */
3b051e89 SS	113
866ba284	114	/* CPU accounting and timing values. */
3b051e89	115	__u64 sys_enter_timer; /* 0x02b8 */
c5328901 MS	116	__u64 mcck_enter_timer; /* 0x02c0 */
	117	__u64 exit_timer; /* 0x02c8 */
	118	__u64 user_timer; /* 0x02d0 */
b7394a5f MS	119	__u64 guest_timer; /* 0x02d8 */
	120	__u64 system_timer; /* 0x02e0 */
	121	__u64 hardirq_timer; /* 0x02e8 */
	122	__u64 softirq_timer; /* 0x02f0 */
	123	__u64 steal_timer; /* 0x02f8 */
152e9b86 MS	124	__u64 avg_steal_timer; /* 0x0300 */
	125	__u64 last_update_timer; /* 0x0308 */
	126	__u64 last_update_clock; /* 0x0310 */
efccd4e0 SS	127	__u64 int_clock; /* 0x0318 */
efccd4e0 SS	128	__u8 pad_0x0320[0x0328-0x0320]; /* 0x0320 */
152e9b86	129	__u64 clock_comparator; /* 0x0328 */
f931f67c	130	__u8 pad_0x0330[0x0340-0x0330]; /* 0x0330 */
866ba284 MS	131
866ba284 MS	132	/* Current process. */
152e9b86 MS	133	__u64 current_task; /* 0x0340 */
152e9b86 MS	134	__u64 kernel_stack; /* 0x0348 */
8b646bd7	135
ce3dc447	136	/* Interrupt, DAT-off and restartstack. */
152e9b86 MS	137	__u64 async_stack; /* 0x0350 */
	138	__u64 nodat_stack; /* 0x0358 */
	139	__u64 restart_stack; /* 0x0360 */
b61b1595	140	__u64 mcck_stack; /* 0x0368 */
8b646bd7	141	/* Restart function and parameter. */
b61b1595 SS	142	__u64 restart_fn; /* 0x0370 */
b61b1595 SS	143	__u64 restart_data; /* 0x0378 */
915fea04 AG	144	__u32 restart_source; /* 0x0380 */
915fea04 AG	145	__u32 restart_flags; /* 0x0384 */
866ba284 MS	146
866ba284 MS	147	/* Address space pointer. */
527618ab HC	148	struct ctlreg kernel_asce; /* 0x0388 */
527618ab HC	149	struct ctlreg user_asce; /* 0x0390 */
e22cf8ca CB	150
	151	/*
	152	* The lpp and current_pid fields form a
	153	* 64-bit value that is set as program
	154	* parameter with the LPP instruction.
	155	*/
152e9b86 MS	156	__u32 lpp; /* 0x0398 */
152e9b86 MS	157	__u32 current_pid; /* 0x039c */
866ba284 MS	158
866ba284 MS	159	/* SMP info area */
152e9b86 MS	160	__u32 cpu_nr; /* 0x03a0 */
152e9b86 MS	161	__u32 softirq_pending; /* 0x03a4 */
4ae98789	162	__s32 preempt_count; /* 0x03a8 */
152e9b86 MS	163	__u32 spinlock_lockval; /* 0x03ac */
152e9b86 MS	164	__u32 spinlock_index; /* 0x03b0 */
4eed43de	165	__u8 pad_0x03b4[0x03b8-0x03b4]; /* 0x03b4 */
152e9b86	166	__u64 percpu_offset; /* 0x03b8 */
1f266fd7	167	__u8 pad_0x03c0[0x0400-0x03c0]; /* 0x03c0 */
f19fbd5e	168
4efd417f VG	169	__u32 return_lpswe; /* 0x0400 */
	170	__u32 return_mcck_lpswe; /* 0x0404 */
	171	__u8 pad_0x040a[0x0e00-0x0408]; /* 0x0408 */
866ba284 MS	172
	173	/*
	174	* 0xe00 contains the address of the IPL Parameter Information
	175	* block. Dump tools need IPIB for IPL after dump.
	176	* Note: do not change the position of any fields in 0x0e00-0x0f00
	177	*/
	178	__u64 ipib; /* 0x0e00 */
	179	__u32 ipib_checksum; /* 0x0e08 */
fbe76568	180	__u64 vmcore_info; /* 0x0e0c */
4857d4bb MH	181	__u8 pad_0x0e14[0x0e18-0x0e14]; /* 0x0e14 */
4857d4bb MH	182	__u64 os_info; /* 0x0e18 */
17e89e13	183	__u8 pad_0x0e20[0x11b0-0x0e20]; /* 0x0e20 */
80703617	184
916cda1a MS	185	/* Pointer to the machine check extended save area */
916cda1a MS	186	__u64 mcesad; /* 0x11b0 */
866ba284 MS	187
	188	/* 64 bit extparam used for pfault/diag 250: defined by architecture */
	189	__u64 ext_params2; /* 0x11B8 */
	190	__u8 pad_0x11c0[0x1200-0x11C0]; /* 0x11C0 */
	191
	192	/* CPU register save area: defined by architecture */
	193	__u64 floating_pt_save_area[16]; /* 0x1200 */
	194	__u64 gpregs_save_area[16]; /* 0x1280 */
cbb870c8	195	psw_t psw_save_area; /* 0x1300 */
866ba284 MS	196	__u8 pad_0x1310[0x1318-0x1310]; /* 0x1310 */
	197	__u32 prefixreg_save_area; /* 0x1318 */
	198	__u32 fpt_creg_save_area; /* 0x131c */
	199	__u8 pad_0x1320[0x1324-0x1320]; /* 0x1320 */
	200	__u32 tod_progreg_save_area; /* 0x1324 */
	201	__u32 cpu_timer_save_area[2]; /* 0x1328 */
	202	__u32 clock_comp_save_area[2]; /* 0x1330 */
3b051e89	203	__u64 last_break_save_area; /* 0x1338 */
866ba284	204	__u32 access_regs_save_area[16]; /* 0x1340 */
527618ab	205	struct ctlreg cregs_save_area[16]; /* 0x1380 */
39d62336 TR	206	__u8 pad_0x1400[0x1500-0x1400]; /* 0x1400 */
	207	/* Cryptography-counter designation */
	208	__u64 ccd; /* 0x1500 */
c432fefe TR	209	/* AI-extension counter designation */
	210	__u64 aicd; /* 0x1508 */
	211	__u8 pad_0x1510[0x1800-0x1510]; /* 0x1510 */
d35339a4 MS	212
d35339a4 MS	213	/* Transaction abort diagnostic block */
755112b3	214	struct pgm_tdb pgm_tdb; /* 0x1800 */
916cda1a	215	__u8 pad_0x1900[0x2000-0x1900]; /* 0x1900 */
3ad4c05a	216	} __packed __aligned(8192);
cbb870c8	217
7e8f89e5 SS	218	static __always_inline struct lowcore *get_lowcore(void)
7e8f89e5 SS	219	{
5ade5be4 SS	220	struct lowcore *lc;
	221
	222	if (__is_defined(__DECOMPRESSOR))
	223	return NULL;
430693c8	224	asm_inline(
df4623fb	225	ALTERNATIVE(" lghi %[lc],0",
430693c8 HC	226	" llilh %[lc],%[alt]",
	227	ALT_FEATURE(MFEATURE_LOWCORE))
	228	: [lc] "=d" (lc)
	229	: [alt] "i" (LOWCORE_ALT_ADDRESS >> 16));
5ade5be4	230	return lc;
7e8f89e5 SS	231	}
7e8f89e5 SS	232
c667aeac	233	extern struct lowcore *lowcore_ptr[];
1da177e4	234
4448aaf0	235	static inline void set_prefix(__u32 address)
1da177e4	236	{
11776eaa	237	asm volatile("spx %0" : : "Q" (address) : "memory");
1da177e4 LT	238	}
1da177e4 LT	239
5ade5be4 SS	240	#else /* __ASSEMBLY__ */
	241
	242	.macro GET_LC reg
df4623fb	243	ALTERNATIVE "lghi \reg,0", \
5ade5be4	244	__stringify(llilh \reg, LOWCORE_ALT_ADDRESS >> 16), \
e4da8249	245	ALT_FEATURE(MFEATURE_LOWCORE)
5ade5be4 SS	246	.endm
5ade5be4 SS	247
9e1e275f SS	248	.macro STMG_LC start, end, savearea
	249	ALTERNATIVE "stmg \start, \end, \savearea", \
	250	__stringify(stmg \start, \end, LOWCORE_ALT_ADDRESS + \savearea), \
e4da8249	251	ALT_FEATURE(MFEATURE_LOWCORE)
9e1e275f SS	252	.endm
9e1e275f SS	253
5ade5be4	254	#endif /* __ASSEMBLY__ */
cbb870c8	255	#endif /* _ASM_S390_LOWCORE_H */