[linux-block.git] / arch / s390 / include / asm / bitops.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 *    Copyright IBM Corp. 1999,2013
 *
 *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
 *
 * The description below was taken in large parts from the powerpc
 * bitops header file:
 * Within a word, bits are numbered LSB first.  Lot's of places make
 * this assumption by directly testing bits with (val & (1<<nr)).
 * This can cause confusion for large (> 1 word) bitmaps on a
 * big-endian system because, unlike little endian, the number of each
 * bit depends on the word size.
 *
 * The bitop functions are defined to work on unsigned longs, so the bits
 * end up numbered:
 *   |63..............0|127............64|191...........128|255...........192|
 *
 * We also have special functions which work with an MSB0 encoding.
 * The bits are numbered:
 *   |0..............63|64............127|128...........191|192...........255|
 *
 * The main difference is that bit 0-63 in the bit number field needs to be
 * reversed compared to the LSB0 encoded bit fields. This can be achieved by
 * XOR with 0x3f.
 *
 */

#ifndef _S390_BITOPS_H
#define _S390_BITOPS_H

#ifndef _LINUX_BITOPS_H
#error only <linux/bitops.h> can be included directly
#endif

#include <linux/typecheck.h>
#include <linux/compiler.h>
#include <linux/types.h>
#include <asm/atomic_ops.h>
#include <asm/barrier.h>

#define __BITOPS_WORDS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)

static inline unsigned long *
__bitops_word(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long addr;

	addr = (unsigned long)ptr + ((nr ^ (nr & (BITS_PER_LONG - 1))) >> 3);
	return (unsigned long *)addr;
}

static inline unsigned char *
__bitops_byte(unsigned long nr, volatile unsigned long *ptr)
{
	return ((unsigned char *)ptr) + ((nr ^ (BITS_PER_LONG - 8)) >> 3);
}

static inline void set_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long *addr = __bitops_word(nr, ptr);
	unsigned long mask;

#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
	if (__builtin_constant_p(nr)) {
		unsigned char *caddr = __bitops_byte(nr, ptr);

		asm volatile(
			"oi	%0,%b1\n"
			: "+Q" (*caddr)
			: "i" (1 << (nr & 7))
			: "cc", "memory");
		return;
	}
#endif
	mask = 1UL << (nr & (BITS_PER_LONG - 1));
	__atomic64_or(mask, (long *)addr);
}

static inline void clear_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long *addr = __bitops_word(nr, ptr);
	unsigned long mask;

#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
	if (__builtin_constant_p(nr)) {
		unsigned char *caddr = __bitops_byte(nr, ptr);

		asm volatile(
			"ni	%0,%b1\n"
			: "+Q" (*caddr)
			: "i" (~(1 << (nr & 7)))
			: "cc", "memory");
		return;
	}
#endif
	mask = ~(1UL << (nr & (BITS_PER_LONG - 1)));
	__atomic64_and(mask, (long *)addr);
}

static inline void change_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long *addr = __bitops_word(nr, ptr);
	unsigned long mask;

#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
	if (__builtin_constant_p(nr)) {
		unsigned char *caddr = __bitops_byte(nr, ptr);

		asm volatile(
			"xi	%0,%b1\n"
			: "+Q" (*caddr)
			: "i" (1 << (nr & 7))
			: "cc", "memory");
		return;
	}
#endif
	mask = 1UL << (nr & (BITS_PER_LONG - 1));
	__atomic64_xor(mask, (long *)addr);
}

static inline bool
test_and_set_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long *addr = __bitops_word(nr, ptr);
	unsigned long old, mask;

	mask = 1UL << (nr & (BITS_PER_LONG - 1));
	old = __atomic64_or_barrier(mask, (long *)addr);
	return (old & mask) != 0;
}

static inline bool
test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long *addr = __bitops_word(nr, ptr);
	unsigned long old, mask;

	mask = ~(1UL << (nr & (BITS_PER_LONG - 1)));
	old = __atomic64_and_barrier(mask, (long *)addr);
	return (old & ~mask) != 0;
}

static inline bool
test_and_change_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned long *addr = __bitops_word(nr, ptr);
	unsigned long old, mask;

	mask = 1UL << (nr & (BITS_PER_LONG - 1));
	old = __atomic64_xor_barrier(mask, (long *)addr);
	return (old & mask) != 0;
}

static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned char *addr = __bitops_byte(nr, ptr);

	*addr |= 1 << (nr & 7);
}

static inline void 
__clear_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned char *addr = __bitops_byte(nr, ptr);

	*addr &= ~(1 << (nr & 7));
}

static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned char *addr = __bitops_byte(nr, ptr);

	*addr ^= 1 << (nr & 7);
}

static inline bool
__test_and_set_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned char *addr = __bitops_byte(nr, ptr);
	unsigned char ch;

	ch = *addr;
	*addr |= 1 << (nr & 7);
	return (ch >> (nr & 7)) & 1;
}

static inline bool
__test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned char *addr = __bitops_byte(nr, ptr);
	unsigned char ch;

	ch = *addr;
	*addr &= ~(1 << (nr & 7));
	return (ch >> (nr & 7)) & 1;
}

static inline bool
__test_and_change_bit(unsigned long nr, volatile unsigned long *ptr)
{
	unsigned char *addr = __bitops_byte(nr, ptr);
	unsigned char ch;

	ch = *addr;
	*addr ^= 1 << (nr & 7);
	return (ch >> (nr & 7)) & 1;
}

static inline bool test_bit(unsigned long nr, const volatile unsigned long *ptr)
{
	const volatile unsigned char *addr;

	addr = ((const volatile unsigned char *)ptr);
	addr += (nr ^ (BITS_PER_LONG - 8)) >> 3;
	return (*addr >> (nr & 7)) & 1;
}

static inline bool test_and_set_bit_lock(unsigned long nr,
					 volatile unsigned long *ptr)
{
	if (test_bit(nr, ptr))
		return 1;
	return test_and_set_bit(nr, ptr);
}

static inline void clear_bit_unlock(unsigned long nr,
				    volatile unsigned long *ptr)
{
	smp_mb__before_atomic();
	clear_bit(nr, ptr);
}

static inline void __clear_bit_unlock(unsigned long nr,
				      volatile unsigned long *ptr)
{
	smp_mb();
	__clear_bit(nr, ptr);
}

/*
 * Functions which use MSB0 bit numbering.
 * The bits are numbered:
 *   |0..............63|64............127|128...........191|192...........255|
 */
unsigned long find_first_bit_inv(const unsigned long *addr, unsigned long size);
unsigned long find_next_bit_inv(const unsigned long *addr, unsigned long size,
				unsigned long offset);

#define for_each_set_bit_inv(bit, addr, size)				\
	for ((bit) = find_first_bit_inv((addr), (size));		\
	     (bit) < (size);						\
	     (bit) = find_next_bit_inv((addr), (size), (bit) + 1))

static inline void set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
	return set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}

static inline void clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
	return clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}

static inline bool test_and_clear_bit_inv(unsigned long nr,
					  volatile unsigned long *ptr)
{
	return test_and_clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}

static inline void __set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
	return __set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}

static inline void __clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
{
	return __clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}

static inline bool test_bit_inv(unsigned long nr,
				const volatile unsigned long *ptr)
{
	return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
}

#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES

/**
 * __flogr - find leftmost one
 * @word - The word to search
 *
 * Returns the bit number of the most significant bit set,
 * where the most significant bit has bit number 0.
 * If no bit is set this function returns 64.
 */
static inline unsigned char __flogr(unsigned long word)
{
	if (__builtin_constant_p(word)) {
		unsigned long bit = 0;

		if (!word)
			return 64;
		if (!(word & 0xffffffff00000000UL)) {
			word <<= 32;
			bit += 32;
		}
		if (!(word & 0xffff000000000000UL)) {
			word <<= 16;
			bit += 16;
		}
		if (!(word & 0xff00000000000000UL)) {
			word <<= 8;
			bit += 8;
		}
		if (!(word & 0xf000000000000000UL)) {
			word <<= 4;
			bit += 4;
		}
		if (!(word & 0xc000000000000000UL)) {
			word <<= 2;
			bit += 2;
		}
		if (!(word & 0x8000000000000000UL)) {
			word <<= 1;
			bit += 1;
		}
		return bit;
	} else {
		register unsigned long bit asm("4") = word;
		register unsigned long out asm("5");

		asm volatile(
			"       flogr   %[bit],%[bit]\n"
			: [bit] "+d" (bit), [out] "=d" (out) : : "cc");
		return bit;
	}
}

/**
 * __ffs - find first bit in word.
 * @word: The word to search
 *
 * Undefined if no bit exists, so code should check against 0 first.
 */
static inline unsigned long __ffs(unsigned long word)
{
	return __flogr(-word & word) ^ (BITS_PER_LONG - 1);
}

/**
 * ffs - find first bit set
 * @word: the word to search
 *
 * This is defined the same way as the libc and
 * compiler builtin ffs routines (man ffs).
 */
static inline int ffs(int word)
{
	unsigned long mask = 2 * BITS_PER_LONG - 1;
	unsigned int val = (unsigned int)word;

	return (1 + (__flogr(-val & val) ^ (BITS_PER_LONG - 1))) & mask;
}

/**
 * __fls - find last (most-significant) set bit in a long word
 * @word: the word to search
 *
 * Undefined if no set bit exists, so code should check against 0 first.
 */
static inline unsigned long __fls(unsigned long word)
{
	return __flogr(word) ^ (BITS_PER_LONG - 1);
}

/**
 * fls64 - find last set bit in a 64-bit word
 * @word: the word to search
 *
 * This is defined in a similar way as the libc and compiler builtin
 * ffsll, but returns the position of the most significant set bit.
 *
 * fls64(value) returns 0 if value is 0 or the position of the last
 * set bit if value is nonzero. The last (most significant) bit is
 * at position 64.
 */
static inline int fls64(unsigned long word)
{
	unsigned long mask = 2 * BITS_PER_LONG - 1;

	return (1 + (__flogr(word) ^ (BITS_PER_LONG - 1))) & mask;
}

/**
 * fls - find last (most-significant) bit set
 * @word: the word to search
 *
 * This is defined the same way as ffs.
 * Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
 */
static inline int fls(unsigned int word)
{
	return fls64(word);
}

#else /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */

#include <asm-generic/bitops/__ffs.h>
#include <asm-generic/bitops/ffs.h>
#include <asm-generic/bitops/__fls.h>
#include <asm-generic/bitops/fls.h>
#include <asm-generic/bitops/fls64.h>

#endif /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */

#include <asm-generic/bitops/ffz.h>
#include <asm-generic/bitops/find.h>
#include <asm-generic/bitops/hweight.h>
#include <asm-generic/bitops/sched.h>
#include <asm-generic/bitops/le.h>
#include <asm-generic/bitops/ext2-atomic-setbit.h>

#endif /* _S390_BITOPS_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4	2	/*
746479cd	3	* Copyright IBM Corp. 1999,2013
1da177e4	4	*
746479cd HC	5	* Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
	6	*
	7	* The description below was taken in large parts from the powerpc
	8	* bitops header file:
	9	* Within a word, bits are numbered LSB first. Lot's of places make
	10	* this assumption by directly testing bits with (val & (1<<nr)).
	11	* This can cause confusion for large (> 1 word) bitmaps on a
	12	* big-endian system because, unlike little endian, the number of each
	13	* bit depends on the word size.
	14	*
48002bd5 HC	15	* The bitop functions are defined to work on unsigned longs, so the bits
48002bd5 HC	16	* end up numbered:
db85eaeb	17	* \|63..............0\|127............64\|191...........128\|255...........192\|
746479cd	18	*
48002bd5 HC	19	* We also have special functions which work with an MSB0 encoding.
48002bd5 HC	20	* The bits are numbered:
746479cd	21	* \|0..............63\|64............127\|128...........191\|192...........255\|
746479cd	22	*
48002bd5 HC	23	* The main difference is that bit 0-63 in the bit number field needs to be
	24	* reversed compared to the LSB0 encoded bit fields. This can be achieved by
	25	* XOR with 0x3f.
1da177e4 LT	26	*
1da177e4 LT	27	*/
c406abd3	28
a53c8fab HC	29	#ifndef _S390_BITOPS_H
	30	#define _S390_BITOPS_H
	31
0624517d JS	32	#ifndef _LINUX_BITOPS_H
	33	#error only <linux/bitops.h> can be included directly
	34	#endif
	35
370b0b5f	36	#include <linux/typecheck.h>
1da177e4	37	#include <linux/compiler.h>
0a5c3c2f	38	#include <linux/types.h>
1993dbc7	39	#include <asm/atomic_ops.h>
0ccc8b7a HC	40	#include <asm/barrier.h>
0ccc8b7a HC	41
01c2475f	42	#define __BITOPS_WORDS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)
1da177e4	43
370b0b5f HC	44	static inline unsigned long *
	45	__bitops_word(unsigned long nr, volatile unsigned long *ptr)
	46	{
	47	unsigned long addr;
	48
	49	addr = (unsigned long)ptr + ((nr ^ (nr & (BITS_PER_LONG - 1))) >> 3);
	50	return (unsigned long *)addr;
	51	}
	52
	53	static inline unsigned char *
	54	__bitops_byte(unsigned long nr, volatile unsigned long *ptr)
	55	{
	56	return ((unsigned char *)ptr) + ((nr ^ (BITS_PER_LONG - 8)) >> 3);
	57	}
	58
	59	static inline void set_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	60	{
370b0b5f HC	61	unsigned long *addr = __bitops_word(nr, ptr);
370b0b5f HC	62	unsigned long mask;
1da177e4	63
4ae80325 HC	64	#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
	65	if (__builtin_constant_p(nr)) {
	66	unsigned char *caddr = __bitops_byte(nr, ptr);
	67
	68	asm volatile(
	69	"oi %0,%b1\n"
	70	: "+Q" (*caddr)
	71	: "i" (1 << (nr & 7))
0ccc8b7a	72	: "cc", "memory");
4ae80325 HC	73	return;
	74	}
	75	#endif
01c2475f	76	mask = 1UL << (nr & (BITS_PER_LONG - 1));
4ae98789	77	__atomic64_or(mask, (long *)addr);
1da177e4 LT	78	}
1da177e4 LT	79
370b0b5f	80	static inline void clear_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	81	{
370b0b5f HC	82	unsigned long *addr = __bitops_word(nr, ptr);
370b0b5f HC	83	unsigned long mask;
1da177e4	84
4ae80325 HC	85	#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
	86	if (__builtin_constant_p(nr)) {
	87	unsigned char *caddr = __bitops_byte(nr, ptr);
	88
	89	asm volatile(
	90	"ni %0,%b1\n"
	91	: "+Q" (*caddr)
	92	: "i" (~(1 << (nr & 7)))
0ccc8b7a	93	: "cc", "memory");
4ae80325 HC	94	return;
	95	}
	96	#endif
01c2475f	97	mask = ~(1UL << (nr & (BITS_PER_LONG - 1)));
4ae98789	98	__atomic64_and(mask, (long *)addr);
1da177e4 LT	99	}
1da177e4 LT	100
370b0b5f	101	static inline void change_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	102	{
370b0b5f HC	103	unsigned long *addr = __bitops_word(nr, ptr);
370b0b5f HC	104	unsigned long mask;
1da177e4	105
4ae80325 HC	106	#ifdef CONFIG_HAVE_MARCH_ZEC12_FEATURES
	107	if (__builtin_constant_p(nr)) {
	108	unsigned char *caddr = __bitops_byte(nr, ptr);
	109
	110	asm volatile(
	111	"xi %0,%b1\n"
	112	: "+Q" (*caddr)
	113	: "i" (1 << (nr & 7))
0ccc8b7a	114	: "cc", "memory");
4ae80325 HC	115	return;
	116	}
	117	#endif
01c2475f	118	mask = 1UL << (nr & (BITS_PER_LONG - 1));
4ae98789	119	__atomic64_xor(mask, (long *)addr);
1da177e4 LT	120	}
1da177e4 LT	121
0a5c3c2f	122	static inline bool
370b0b5f	123	test_and_set_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	124	{
370b0b5f HC	125	unsigned long *addr = __bitops_word(nr, ptr);
370b0b5f HC	126	unsigned long old, mask;
1da177e4	127
01c2475f	128	mask = 1UL << (nr & (BITS_PER_LONG - 1));
4ae98789	129	old = __atomic64_or_barrier(mask, (long *)addr);
1da177e4 LT	130	return (old & mask) != 0;
	131	}
	132
0a5c3c2f	133	static inline bool
370b0b5f	134	test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	135	{
370b0b5f HC	136	unsigned long *addr = __bitops_word(nr, ptr);
370b0b5f HC	137	unsigned long old, mask;
1da177e4	138
01c2475f	139	mask = ~(1UL << (nr & (BITS_PER_LONG - 1)));
4ae98789	140	old = __atomic64_and_barrier(mask, (long *)addr);
e344e52c	141	return (old & ~mask) != 0;
1da177e4 LT	142	}
1da177e4 LT	143
0a5c3c2f	144	static inline bool
370b0b5f	145	test_and_change_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	146	{
370b0b5f HC	147	unsigned long *addr = __bitops_word(nr, ptr);
370b0b5f HC	148	unsigned long old, mask;
1da177e4	149
01c2475f	150	mask = 1UL << (nr & (BITS_PER_LONG - 1));
4ae98789	151	old = __atomic64_xor_barrier(mask, (long *)addr);
1da177e4 LT	152	return (old & mask) != 0;
1da177e4 LT	153	}
1da177e4	154
1da177e4 LT	155	static inline void __set_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4 LT	156	{
370b0b5f	157	unsigned char *addr = __bitops_byte(nr, ptr);
1da177e4	158
370b0b5f	159	*addr \|= 1 << (nr & 7);
1da177e4 LT	160	}
1da177e4 LT	161
1da177e4 LT	162	static inline void
	163	__clear_bit(unsigned long nr, volatile unsigned long *ptr)
	164	{
370b0b5f	165	unsigned char *addr = __bitops_byte(nr, ptr);
1da177e4	166
370b0b5f	167	*addr &= ~(1 << (nr & 7));
1da177e4 LT	168	}
1da177e4 LT	169
1da177e4 LT	170	static inline void __change_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4 LT	171	{
370b0b5f	172	unsigned char *addr = __bitops_byte(nr, ptr);
1da177e4	173
370b0b5f	174	*addr ^= 1 << (nr & 7);
1da177e4 LT	175	}
1da177e4 LT	176
0a5c3c2f	177	static inline bool
370b0b5f	178	__test_and_set_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	179	{
370b0b5f	180	unsigned char *addr = __bitops_byte(nr, ptr);
1da177e4 LT	181	unsigned char ch;
1da177e4 LT	182
370b0b5f HC	183	ch = *addr;
370b0b5f HC	184	*addr \|= 1 << (nr & 7);
1da177e4 LT	185	return (ch >> (nr & 7)) & 1;
1da177e4 LT	186	}
1da177e4	187
0a5c3c2f	188	static inline bool
370b0b5f	189	__test_and_clear_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	190	{
370b0b5f	191	unsigned char *addr = __bitops_byte(nr, ptr);
1da177e4 LT	192	unsigned char ch;
1da177e4 LT	193
370b0b5f HC	194	ch = *addr;
370b0b5f HC	195	*addr &= ~(1 << (nr & 7));
1da177e4 LT	196	return (ch >> (nr & 7)) & 1;
1da177e4 LT	197	}
1da177e4	198
0a5c3c2f	199	static inline bool
370b0b5f	200	__test_and_change_bit(unsigned long nr, volatile unsigned long *ptr)
1da177e4	201	{
370b0b5f	202	unsigned char *addr = __bitops_byte(nr, ptr);
1da177e4 LT	203	unsigned char ch;
1da177e4 LT	204
370b0b5f HC	205	ch = *addr;
370b0b5f HC	206	*addr ^= 1 << (nr & 7);
1da177e4 LT	207	return (ch >> (nr & 7)) & 1;
1da177e4 LT	208	}
1da177e4	209
0a5c3c2f	210	static inline bool test_bit(unsigned long nr, const volatile unsigned long *ptr)
1da177e4	211	{
370b0b5f	212	const volatile unsigned char *addr;
1da177e4	213
370b0b5f HC	214	addr = ((const volatile unsigned char *)ptr);
	215	addr += (nr ^ (BITS_PER_LONG - 8)) >> 3;
	216	return (*addr >> (nr & 7)) & 1;
1da177e4 LT	217	}
1da177e4 LT	218
0a5c3c2f VG	219	static inline bool test_and_set_bit_lock(unsigned long nr,
0a5c3c2f VG	220	volatile unsigned long *ptr)
acdc9fc9 MS	221	{
	222	if (test_bit(nr, ptr))
	223	return 1;
	224	return test_and_set_bit(nr, ptr);
	225	}
	226
	227	static inline void clear_bit_unlock(unsigned long nr,
	228	volatile unsigned long *ptr)
	229	{
	230	smp_mb__before_atomic();
	231	clear_bit(nr, ptr);
	232	}
	233
	234	static inline void __clear_bit_unlock(unsigned long nr,
	235	volatile unsigned long *ptr)
	236	{
	237	smp_mb();
	238	__clear_bit(nr, ptr);
	239	}
	240
afff7e2b	241	/*
7d7c7b24	242	* Functions which use MSB0 bit numbering.
48002bd5	243	* The bits are numbered:
7d7c7b24	244	* \|0..............63\|64............127\|128...........191\|192...........255\|
e56e4e87	245	*/
7d7c7b24 HC	246	unsigned long find_first_bit_inv(const unsigned long *addr, unsigned long size);
	247	unsigned long find_next_bit_inv(const unsigned long *addr, unsigned long size,
	248	unsigned long offset);
	249
09214545 HC	250	#define for_each_set_bit_inv(bit, addr, size) \
	251	for ((bit) = find_first_bit_inv((addr), (size)); \
	252	(bit) < (size); \
	253	(bit) = find_next_bit_inv((addr), (size), (bit) + 1))
	254
7d7c7b24 HC	255	static inline void set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
	256	{
	257	return set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
	258	}
	259
	260	static inline void clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
	261	{
	262	return clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
	263	}
	264
0a5c3c2f VG	265	static inline bool test_and_clear_bit_inv(unsigned long nr,
0a5c3c2f VG	266	volatile unsigned long *ptr)
f3ec471a JF	267	{
	268	return test_and_clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
	269	}
	270
7d7c7b24 HC	271	static inline void __set_bit_inv(unsigned long nr, volatile unsigned long *ptr)
	272	{
	273	return __set_bit(nr ^ (BITS_PER_LONG - 1), ptr);
	274	}
	275
	276	static inline void __clear_bit_inv(unsigned long nr, volatile unsigned long *ptr)
	277	{
	278	return __clear_bit(nr ^ (BITS_PER_LONG - 1), ptr);
	279	}
	280
0a5c3c2f VG	281	static inline bool test_bit_inv(unsigned long nr,
0a5c3c2f VG	282	const volatile unsigned long *ptr)
7d7c7b24 HC	283	{
	284	return test_bit(nr ^ (BITS_PER_LONG - 1), ptr);
	285	}
e56e4e87	286
b1cb7e2b HC	287	#ifdef CONFIG_HAVE_MARCH_Z9_109_FEATURES
	288
	289	/**
	290	* __flogr - find leftmost one
	291	* @word - The word to search
	292	*
	293	* Returns the bit number of the most significant bit set,
	294	* where the most significant bit has bit number 0.
	295	* If no bit is set this function returns 64.
	296	*/
	297	static inline unsigned char __flogr(unsigned long word)
	298	{
	299	if (__builtin_constant_p(word)) {
	300	unsigned long bit = 0;
	301
	302	if (!word)
	303	return 64;
	304	if (!(word & 0xffffffff00000000UL)) {
	305	word <<= 32;
	306	bit += 32;
	307	}
	308	if (!(word & 0xffff000000000000UL)) {
	309	word <<= 16;
	310	bit += 16;
	311	}
	312	if (!(word & 0xff00000000000000UL)) {
	313	word <<= 8;
	314	bit += 8;
	315	}
	316	if (!(word & 0xf000000000000000UL)) {
	317	word <<= 4;
	318	bit += 4;
	319	}
	320	if (!(word & 0xc000000000000000UL)) {
	321	word <<= 2;
	322	bit += 2;
	323	}
	324	if (!(word & 0x8000000000000000UL)) {
	325	word <<= 1;
	326	bit += 1;
	327	}
	328	return bit;
	329	} else {
	330	register unsigned long bit asm("4") = word;
	331	register unsigned long out asm("5");
	332
	333	asm volatile(
	334	" flogr %[bit],%[bit]\n"
	335	: [bit] "+d" (bit), [out] "=d" (out) : : "cc");
	336	return bit;
	337	}
	338	}
	339
	340	/**
	341	* __ffs - find first bit in word.
	342	* @word: The word to search
	343	*
	344	* Undefined if no bit exists, so code should check against 0 first.
	345	*/
	346	static inline unsigned long __ffs(unsigned long word)
	347	{
	348	return __flogr(-word & word) ^ (BITS_PER_LONG - 1);
	349	}
	350
351	/**
352	* ffs - find first bit set
353	* @word: the word to search
354	*
355	* This is defined the same way as the libc and
356	* compiler builtin ffs routines (man ffs).
357	*/
358	static inline int ffs(int word)
359	{
360	unsigned long mask = 2 * BITS_PER_LONG - 1;
361	unsigned int val = (unsigned int)word;
362
363	return (1 + (__flogr(-val & val) ^ (BITS_PER_LONG - 1))) & mask;
364	}
365
366	/**
367	* __fls - find last (most-significant) set bit in a long word
368	* @word: the word to search
369	*
370	* Undefined if no set bit exists, so code should check against 0 first.
371	*/
372	static inline unsigned long __fls(unsigned long word)
373	{
374	return __flogr(word) ^ (BITS_PER_LONG - 1);
375	}
376
377	/**
378	* fls64 - find last set bit in a 64-bit word
379	* @word: the word to search
380	*
381	* This is defined in a similar way as the libc and compiler builtin
382	* ffsll, but returns the position of the most significant set bit.
383	*
384	* fls64(value) returns 0 if value is 0 or the position of the last
385	* set bit if value is nonzero. The last (most significant) bit is
386	* at position 64.
387	*/
388	static inline int fls64(unsigned long word)
389	{
390	unsigned long mask = 2 * BITS_PER_LONG - 1;
391
392	return (1 + (__flogr(word) ^ (BITS_PER_LONG - 1))) & mask;
393	}
394
395	/**
396	* fls - find last (most-significant) bit set
397	* @word: the word to search
398	*
399	* This is defined the same way as ffs.
400	* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
401	*/
3fc2579e	402	static inline int fls(unsigned int word)
b1cb7e2b	403	{
3fc2579e	404	return fls64(word);
b1cb7e2b HC	405	}
	406
	407	#else /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */
	408
746479cd HC	409	#include <asm-generic/bitops/__ffs.h>
746479cd HC	410	#include <asm-generic/bitops/ffs.h>
56a6b1eb	411	#include <asm-generic/bitops/__fls.h>
746479cd	412	#include <asm-generic/bitops/fls.h>
7e33db4e	413	#include <asm-generic/bitops/fls64.h>
b1cb7e2b HC	414
	415	#endif /* CONFIG_HAVE_MARCH_Z9_109_FEATURES */
	416
746479cd HC	417	#include <asm-generic/bitops/ffz.h>
746479cd HC	418	#include <asm-generic/bitops/find.h>
7e33db4e	419	#include <asm-generic/bitops/hweight.h>
746479cd	420	#include <asm-generic/bitops/sched.h>
802caabb	421	#include <asm-generic/bitops/le.h>
148817ba	422	#include <asm-generic/bitops/ext2-atomic-setbit.h>
67fe9251	423
1da177e4	424	#endif /* _S390_BITOPS_H */